CN212305299U

CN212305299U - Communication level conversion circuit

Info

Publication number: CN212305299U
Application number: CN202020689689.4U
Authority: CN
Inventors: 王东锋; 邓惠华; 阮水生
Original assignee: Shenzhen Qianhai Zhongdian Huian Technology Co ltd
Current assignee: Shenzhen Qianhai Zhongdian Huian Technology Co ltd
Priority date: 2020-04-29
Filing date: 2020-04-29
Publication date: 2021-01-05
Anticipated expiration: 2030-04-29

Abstract

The embodiment of the utility model discloses communication level conversion circuit, include: the communication level conversion circuit is connected between the first communication module and the second communication module and used for boosting a first signal of the first communication module and then transmitting the boosted first signal to the second communication module. The embodiment of the utility model discloses a communication level conversion circuit through using the triode to replace the IC chip, has solved and has used IC chip conversion level to cause the condition that the cost is too high among the prior art, the circuit is complicated and the IC chip updates and leads to the unable use of conversion circuit too fast, has realized the conversion to the 4G communication level of lower cost to simple structure, the stable effect of conversion level.

Description

Communication level conversion circuit

Technical Field

The embodiment of the utility model provides a relate to level shift technique, especially relate to a communication level shift circuit.

Background

Generally, the level of a General-purpose input/output (GPIO) port of a 4G communication module in the market is 1.8V, while the level of most General-purpose interfaces in the market is 3.3V or 5V, and when the 4G communication module needs to be docked with other devices (such as an MCU, an air switch, and the like) through these 3.3V or 5V interfaces, the level conversion is required to enable normal communication, otherwise the 4G communication module is burned or cannot work. The prior art uses a level conversion IC (Integrated Circuit Chip) for conversion, and the special conversion IC has the disadvantages that 1, the unit price of the IC is higher, which puts pressure on the overall cost of equipment, 2, the risk of board change caused by device halt exists, and 3, the convertible level is wide and cannot be accurately determined.

SUMMERY OF THE UTILITY MODEL

The utility model provides a communication level conversion circuit to the realization is to the conversion of 4G communication level.

In a first aspect, an embodiment of the present invention provides a communication level converting circuit, including:

the communication level conversion circuit is connected between the first communication module and the second communication module and used for boosting a first signal of the first communication module and then transmitting the boosted first signal to the second communication module.

Optionally, the first communication module includes a first transmitting terminal TX1 and a first receiving terminal RX1, and the first transmitting terminal TX1 is configured to transmit a first communication signal.

Optionally, the second communication module includes a second transmitting terminal TX2 and a second receiving terminal RX2, and the second transmitting terminal TX2 is configured to transmit a second communication signal.

Optionally, the communication level converting circuit includes a voltage boosting circuit, and the voltage boosting circuit is configured to boost a first communication signal of the first transmitting terminal TX1 and output the boosted first communication signal from the second receiving terminal RX 2.

Optionally, the boost circuit includes: the transistor-based power amplifier comprises a resistor R1, a transistor Q1, a resistor R2, a first voltage input end V1 and a second voltage input end V2, a collector of the transistor Q1 is connected to a second receiving end RX2, a base of the transistor Q1 is connected to a second end of the resistor R2, an emitter of the transistor Q1 is connected to the first transmitting end TX1, a first end of the resistor R1 is connected to the second voltage input end V2, a second end of the resistor R1 is connected to a collector of the transistor Q1, and a first end of the resistor R2 is connected to the first voltage input end V1.

Optionally, the communication level conversion circuit further includes a voltage reduction circuit, and the voltage reduction circuit is configured to reduce a voltage of the second communication signal from the second transmitting terminal TX2 and output the second communication signal from the first receiving terminal RX 1.

Optionally, the voltage dropping circuit includes: the transistor-based power amplifier comprises a resistor R3, a resistor R4, a transistor Q2, a third voltage input end V3 and a fourth voltage input end V4, wherein an emitter of the transistor Q2 is connected to a second transmitting end TX2, a base of the transistor Q2 is connected to a first end of the resistor R3, a collector of the transistor Q2 is connected to a first receiving end RX1, a second end of the resistor R3 is connected to the fourth voltage input end V4, a first end of the resistor R4 is connected to a collector of the transistor Q2, and a second end of the resistor R4 is connected to the third voltage input end V3.

Optionally, the filter circuit is further included, and the filter circuit is used for the filter circuit to ensure that the waveform of the circuit is complete.

Optionally, the filter circuit includes a first filter circuit and a second filter circuit, the first filter circuit includes a capacitor C1, and the second filter circuit includes a capacitor C2.

Optionally, a first terminal of the capacitor C1 is connected to the first terminal of the resistor R2, a second terminal of the capacitor C1 is connected to the second terminal of the resistor R2, a first terminal of the capacitor C2 is connected to the first terminal of the resistor R3, and a second terminal of the capacitor C2 is connected to the second terminal of the resistor R3.

Drawings

Fig. 1 is a block diagram of a communication level shift circuit according to a first embodiment of the present invention;

fig. 2 is a circuit diagram of a communication level conversion circuit according to an embodiment of the present invention;

fig. 3 is a schematic level diagram of a voltage boosting circuit according to an embodiment of the present invention;

fig. 4 is a schematic level diagram of a voltage step-down circuit according to a first embodiment of the present invention;

fig. 5 is a module connection diagram of a communication level shift circuit according to a second embodiment of the present invention;

fig. 6 is a circuit diagram of a communication level conversion circuit according to a second embodiment of the present invention.

Detailed Description

The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.

Before discussing exemplary embodiments in more detail, it should be noted that some exemplary embodiments are described as processes or methods depicted as flowcharts. Although a flowchart may describe the steps as a sequential process, many of the steps can be performed in parallel, concurrently or simultaneously. In addition, the order of the steps may be rearranged. A process may be terminated when its operations are completed, but may have additional steps not included in the figure. A process may correspond to a method, a function, a procedure, a subroutine, a subprogram, etc.

Furthermore, the terms "first," "second," and the like may be used herein to describe various orientations, actions, steps, elements, or the like, but the orientations, actions, steps, or elements are not limited by these terms. These terms are only used to distinguish one direction, action, step or element from another direction, action, step or element. For example, the first voltage output terminal may be referred to as a second voltage output terminal, and similarly, the second voltage output terminal may be referred to as a first voltage output terminal, without departing from the scope of the present application. Both the first voltage output terminal and the second voltage output terminal are first voltage output terminals, but they are not the same first voltage output terminal. The terms "first", "second", etc. are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.

Example one

Fig. 1 is a module connection diagram of a communication level shift circuit according to an embodiment of the present invention, which is applicable to the case of performing level shift on a 4G communication module.

The communication level conversion circuit is connected between the first communication module 3 and the second communication module 4, and the communication level conversion circuit is used for boosting a first signal of the first communication module 3 and then transmitting the boosted first signal to the second communication module 4. The first communication module 3 includes a first transmitting terminal TX1 and a first receiving terminal RX1, and the first transmitting terminal TX1 is configured to transmit a first communication signal. The second communication module 4 includes a second transmitter TX2 and a second receiver RX2, and the second transmitter TX2 is configured to transmit a second communication signal.

In this embodiment, the first communication module 3 is a 4G communication module, the 4G communication module generally plays a role in communication in a mobile terminal or a PC, and generally, a level required by the 4G communication module during operation is generally 1.8V. The second communication module 4 is generally a control module in a device such as a mobile terminal or a PC, for example, an MCU, and the interface level thereof is 3.3V or 5V, so that the 4G communication module needs to be connected to the control module after level conversion. The first communication signal is data information transmitted from the 4G communication module to the control module, and the second communication signal is information transmitted from the control module to the 4G communication module.

In this embodiment, the communication level conversion circuit includes: referring to fig. 2, the boost circuit 1 and the buck circuit 2, fig. 2 is a circuit diagram of a communication level converting circuit in this embodiment, specifically:

the boost circuit 1 is configured to boost a first communication signal at the first transmitting end TX1 and output the boosted first communication signal from the second receiving end RX 2. The booster circuit 1 includes: the transistor-based power amplifier comprises a resistor R1, a transistor Q1, a resistor R2, a first voltage input end V1 and a second voltage input end V2, a collector of the transistor Q1 is connected to a second receiving end RX2, a base of the transistor Q1 is connected to a second end of the resistor R2, an emitter of the transistor Q1 is connected to the first transmitting end TX1, a first end of the resistor R1 is connected to the second voltage input end V2, a second end of the resistor R1 is connected to a collector of the transistor Q1, and a first end of the resistor R2 is connected to the first voltage input end V1.

In this embodiment, the transistor Q1 is an NPN transistor, and in an alternative embodiment, a MOS transistor or other switching element may be used instead, and the main functions of the transistor Q1 are current amplification and switching. The first voltage output terminal V1 provides a first voltage of 1.8V DC voltage, and the second voltage output terminal V2 provides a second voltage of 3.3V DC voltage. The resistor R1 is a boost resistor, and the resistor R2 is used for limiting current.

The voltage dropping circuit 2 is configured to drop the second communication signal from the second transmitting terminal TX2 and output the second communication signal from the first receiving terminal RX 1. The step-down circuit 2 includes: the transistor-based power amplifier comprises a resistor R3, a resistor R4, a transistor Q2, a third voltage input end V3 and a fourth voltage input end V4, wherein an emitter of the transistor Q2 is connected to a second transmitting end TX2, a base of the transistor Q2 is connected to a first end of the resistor R3, a collector of the transistor Q2 is connected to a first receiving end RX1, a second end of the resistor R3 is connected to the fourth voltage input end V4, a first end of the resistor R4 is connected to a collector of the transistor Q2, and a second end of the resistor R4 is connected to the third voltage input end V3.

In this embodiment, the transistor Q2 is also an NPN transistor, and in an alternative embodiment, a MOS transistor or other switching elements may be used instead. The third voltage output terminal V3 provides the first voltage of 1.8V DC voltage, and the fourth voltage output terminal V4 provides the second voltage of 3.3V DC voltage. The resistor R4 is a boost resistor, and the resistor R3 is used for limiting current.

In this embodiment, when the first transmitting terminal TX1 transmits data to the second receiving terminal RX2, the first transmitting terminal TX1 is initially at a high level of 1.8V, the base of the transistor Q1 is pulled to a voltage of 1.8V at the first voltage output terminal V1 through the resistor R2, and since the emitter and the base of the transistor Q1 are both at a voltage of 1.8V, there is no conduction current between the emitter and the base of the transistor Q1 at this time, the transistor Q1 is in an off state, and the collector is connected to the second voltage output terminal V2 through the resistor R1 to maintain a voltage of 3.3V, and is at a high level for the second receiving terminal RX 2. At this time, the first transmitting terminal TX1 is adjusted to be at a low level of 0V, the base of the triode Q1 is at a voltage of 1.8V of the first voltage output terminal V1, the emitter is at 0V, so that the base and the emitter of the triode Q1 have a voltage difference to generate a conduction current, the triode Q1 is turned on and the collector voltage is pulled down, at this time, the second receiving terminal RX2 is at a low level, a process from high to low is realized, data drives the high-low switching of the collector through the high-low switching of the emitter, thereby realizing the level switching, and ensuring the stability of 4G communication. When the second transmitting terminal TX2 transmits data to the first receiving terminal RX1, the second transmitting terminal TX2 is at a high level, the base of the transistor Q2 reaches 3.3V of the third voltage output terminal V3 through the resistor R3, at this time, the base and the emitter of the transistor Q2 are both 3.3V, and there is no voltage difference, so there is no on-current, the transistor Q2 is turned off, at this time, the collector of the transistor Q2 reaches 1.8V of the fourth voltage output terminal V4 through the resistor R4, and the high level is maintained. At this time, the second transmitting terminal TX2 is switched to a low level, a voltage difference is generated between the base and the emitter of the transistor Q2, a conducting current occurs, the transistor Q2 is turned on, and the collector of the transistor Q2 is pulled down, so that high-to-low level conversion is realized, and level conversion is realized through data.

Referring to fig. 3, fig. 3 is a level diagram of the voltage boost circuit 1 in the present embodiment, where Σ 1 is the level of the first transmitting terminal TX1, Σ 2 is the level of the second receiving terminal RX2, and during the time T1-T2, the level of the first transmitting terminal TX1 is 1.8V, and the level of the second receiving terminal RX2 is 3.3V. During the time T2-T3, the level of the first transmitting terminal TX1 is 0V, and the level of the second receiving terminal RX2 is 0V. During the time T3-T4, the level of the first transmitting terminal TX1 is 1.8V, and the level of the second receiving terminal RX2 is 3.3V. According to fig. 3, when the level of the first transmitting terminal TX1 is high, the level of the second receiving terminal RX2 is also high; when the level of the first transmitting terminal TX1 is low, the level of the second receiving terminal RX2 is also low, so that the high-low level conversion of the voltage boost circuit 1 is realized.

Referring to fig. 4, fig. 4 is a level diagram of the voltage reduction circuit 2 in the present embodiment, where Σ 3 is the second TX2 level, Σ 4 is the second RX1 level, and during the time T1-T2, the second TX2 level is 3.3V, and the second RX1 level is 1.8V. During the time T2-T3, the second sender TX2 is at 0V and the second receiver RX1 is at 0V. During the time T3-T4, the second sender TX2 level is 3.3V, and the second receiver RX1 level is 1.8V. According to fig. 4, when the level of the second TX2 is high, the level of the second RX1 is also high; when the level of the second transmitting terminal TX2 is low, the level of the second receiving terminal RX1 is also low, so that the high-low level conversion of the voltage step-down circuit 2 is realized.

Example two

Fig. 5 is the embodiment of the present invention provides a module connection diagram of a communication level shift circuit, this embodiment is applicable to the situation of carrying out level shift to the 4G communication module, this embodiment is that the filter module 5 has been increased on the basis of the embodiment one, and the filter circuit 5 is used for the filter circuit, and it is complete to guarantee the circuit waveform.

Referring to fig. 6, fig. 6 is a circuit diagram of the communication level shift circuit in the present embodiment, the filter circuit includes a first filter circuit 51 and a second filter circuit 52, the first filter circuit 51 includes a capacitor C1, and the second filter circuit 52 includes a capacitor C2. The first terminal of the capacitor C1 is connected to the first terminal of the resistor R2, the second terminal of the capacitor C1 is connected to the second terminal of the resistor R2, the first terminal of the capacitor C2 is connected to the first terminal of the resistor R3, and the second terminal of the capacitor C2 is connected to the second terminal of the resistor R3.

In this embodiment, 2 filter capacitors C1 and C2 are mainly used to reduce the ac ripple factor and boost the high-efficiency smooth dc output, a capacitor C1 is disposed at two ends of the resistor R2 and is mainly used to ensure the waveform integrity of the switching circuit during the switching process of the high and low levels of the circuit, and a capacitor C2 is disposed at two ends of the resistor R3 and is also used to ensure the waveform integrity of the switching circuit during the switching process of the high and low levels of the circuit.

It should be noted that the foregoing is only a preferred embodiment of the present invention and the technical principles applied. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail with reference to the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the scope of the present invention.

Claims

1. The communication level conversion circuit is characterized in that the communication level conversion circuit is connected between a first communication module and a second communication module, and the communication level conversion circuit is used for boosting a first signal of the first communication module and then transmitting the boosted first signal to the second communication module.

2. The communication level converting circuit of claim 1, wherein the first communication module comprises a first transmitting terminal TX1 and a first receiving terminal RX1, and the first transmitting terminal TX1 is configured to transmit a first communication signal.

3. The communication level converting circuit of claim 2, wherein the second communication module comprises a second transmitter TX2 and a second receiver RX2, and the second transmitter TX2 is configured to transmit a second communication signal.

4. The communication level converting circuit of claim 3, wherein the communication level converting circuit comprises a voltage boosting circuit, and the voltage boosting circuit is configured to boost the first communication signal of the first transmitting terminal TX1 and output the boosted first communication signal from the second receiving terminal RX 2.

5. The communication level conversion circuit according to claim 4, wherein the boosting circuit comprises: the transistor-based power amplifier comprises a resistor R1, a transistor Q1, a resistor R2, a first voltage input end V1 and a second voltage input end V2, a collector of the transistor Q1 is connected to a second receiving end RX2, a base of the transistor Q1 is connected to a second end of the resistor R2, an emitter of the transistor Q1 is connected to the first transmitting end TX1, a first end of the resistor R1 is connected to the second voltage input end V2, a second end of the resistor R1 is connected to a collector of the transistor Q1, and a first end of the resistor R2 is connected to the first voltage input end V1.

6. The communication level converting circuit of claim 5, further comprising a voltage dropping circuit, wherein the voltage dropping circuit is configured to drop the second communication signal from the second transmitter TX2 and output the second communication signal from the first receiver RX 1.

7. The communication level conversion circuit according to claim 6, wherein the voltage-reducing circuit comprises: the transistor-based power amplifier comprises a resistor R3, a resistor R4, a transistor Q2, a third voltage input end V3 and a fourth voltage input end V4, wherein an emitter of the transistor Q2 is connected to a second transmitting end TX2, a base of the transistor Q2 is connected to a first end of the resistor R3, a collector of the transistor Q2 is connected to a first receiving end RX1, a second end of the resistor R3 is connected to the fourth voltage input end V4, a first end of the resistor R4 is connected to a collector of the transistor Q2, and a second end of the resistor R4 is connected to the third voltage input end V3.

8. The communications level shifting circuit of claim 7, further comprising a filter circuit, wherein the filter circuit is configured to filter the circuit to ensure that the circuit waveform is complete.

9. The communication level shifter of claim 8 wherein the filter circuit comprises a first filter circuit and a second filter circuit, the first filter circuit comprising a capacitor C1, the second filter circuit comprising a capacitor C2.

10. The communication level shifter circuit of claim 9, wherein a first terminal of the capacitor C1 is connected to a first terminal of the resistor R2, a second terminal of the capacitor C1 is connected to a second terminal of the resistor R2, a first terminal of the capacitor C2 is connected to a first terminal of the resistor R3, and a second terminal of the capacitor C2 is connected to a second terminal of the resistor R3.