CN220325507U - Interleaved parallel PFC self-adaptive current detection circuit under wide-area working condition - Google Patents
Interleaved parallel PFC self-adaptive current detection circuit under wide-area working condition Download PDFInfo
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Abstract
The utility model discloses a staggered parallel PFC self-adaptive current detection circuit under wide-area working conditions, which comprises a staggered parallel PFC main circuit and a PFC inductance current sampling circuit; the output end of the staggered parallel PFC main circuit is provided with two sampling resistors which are connected in parallel, and each sampling resistor is connected in parallel with a switching tube; the PFC inductance current sampling circuit comprises two PFC branches, each PFC branch is connected with a switching tube of an interleaving PFC main circuit, and the PFC branches comprise a filtering circuit and an amplifying circuit and are used for filtering and amplifying sampling signals of sampling resistors at the output ends of the interleaving PFC main circuits; by connecting a switching tube in parallel with each sampling resistor and controlling the switching state of the switching tube to change the size of the sampling resistor, the amplitude of the sampling signal under the condition of full-range load is more than 2/3 of that of the AD signal, so that more stable and more accurate control of a loop is realized; the gain is changed under different working conditions, so that the harmonic wave of the input current in the whole range is 3% -4%.
Description
Technical Field
The utility model belongs to the technical field of switching power supplies, and particularly relates to a PFC self-adaptive current detection circuit which is connected in parallel in a staggered mode under wide-area working conditions.
Background
The rapid development of power electronics technology makes power electronics widely used, and the harmonic pollution caused by the rapid development of power electronics is also more and more serious, so that the health of a power grid is seriously threatened. The power factor correction circuit can well solve the problem of harmonic pollution of the power electronic device. The staggered parallel PFC circuit is widely applied due to the characteristics of small input harmonic, high power factor and the like. In order to reduce the cost in the staggered parallel PFC circuit, an operational amplifier circuit with a low-resistance sampling resistor is generally used for realizing the sampling of the inductance current. The sampling mode for collecting the inductive current has higher requirements on the impedance of the line and the linearity of the sampling circuit. When the inductance current changes in a large range, the sampling resistance is smaller, the sampling signal is weaker, so that accurate inductance current detection in a wide range cannot be realized, and the input harmonic index of PFC is affected.
Disclosure of Invention
The utility model aims to provide a staggered parallel PFC self-adaptive current detection circuit under wide-area working conditions, which aims to overcome the defect that the existing detection circuit is weak in sampling signal and cannot realize accurate induction current detection.
The interleaved parallel PFC self-adaptive current detection circuit under wide-area working conditions comprises an interleaved parallel PFC main circuit and a PFC inductance current sampling circuit; the output end of the staggered parallel PFC main circuit is provided with two sampling resistors which are connected in parallel, and each sampling resistor is connected in parallel with a switching tube; the PFC inductance current sampling circuit comprises two PFC branches, each PFC branch is connected with a switching tube of an interleaved PFC main circuit, and the PFC branches comprise a filtering circuit and an amplifying circuit and are used for filtering and amplifying sampling signals of sampling resistors at the output ends of the interleaved PFC main circuits.
Preferably, the filter circuit comprises an anode filter circuit and a cathode filter circuit, wherein the input end of the anode filter circuit is connected with the drain electrode of the switch tube connected in parallel with the sampling resistor, and the input end of the cathode filter circuit is connected with the source electrode of the switch tube connected in parallel with the sampling resistor.
Preferably, the filter circuits of the two PFC branches share a negative pole.
Preferably, the interleaved PFC main circuit includes a switching tube Q 1 Switch tube Q 2 Switch tube Q 3 Switch tube Q 4 Boost diode D 1 Boost diode D 2 Boost diode D 3 Boost diode D 4 Boost diode D 5 Boost diode D 6 PFC inductance L 1 Sampling resistor R 1 Sampling resistor R 2 Compensating feedback resistor R3, PFC inductance L 2 And filter capacitor C 0 ；
Boost diode D 1 Positive electrode of (D) and boost diode D 2 Is connected with one end of a power supply AC, and a boost diode D 1 Is connected with the booster diode D 3 Negative electrode of (2), PFC inductance L 1 And PFC inductance L 2 Is a member of the group; boost diode D 3 Positive electrode of (D) and boost diode D 4 The negative pole of (a) is connected with the other end of the power supply AC, and the boosting diode D 2 The positive electrode of (a) is connected with the boost diode D 4 Positive electrode of (a) switching tube Q 3 Source electrode of (B), switch tube Q 4 Source electrode of (C), filter capacitor (C) 0 One end of the load and one end of the load; PFC inductance L 1 Is connected with the boost diode D 5 Positive electrode of (2) and switching tube Q 1 Drain of boost diode D 5 Is connected with the filter capacitor C through the negative electrode 0 The other end of the load and the other end of the PFC inductance L 2 Is connected with the boost diode D 6 Positive electrode of (2) and switching tube Q 2 Drain of boost diode D 6 Is connected with the filter capacitor C through the negative electrode 0 Is arranged at the other end of the tube; switch tube Q 1 Source electrode of (C) is connected with switch tube Q 3 Sampling end of PFC inductance current sampling circuit, switching tube Q 2 Source electrode of (C) is connected with switch tube Q 4 Sampling end of PFC inductance current sampling circuit, switching tube Q 3 A sampling resistor R is connected in parallel between the drain electrode and the source electrode of the transistor 1 Switch tube Q 4 A sampling resistor R is connected in parallel between the drain electrode and the source electrode of the transistor 2 Switch tube Q 4 Is a source of (a)Electrode and filter capacitor C 0 Is connected in parallel with a compensation feedback resistor R between one ends 3 。
Preferably, the switching tube Q 3 And a switching tube Q 4 And all adopt MOS tubes with low voltage and low conduction internal resistance.
Preferably, the filter circuit in the PFC branch comprises a resistor R 28 Resistance R 31 Capacitance C 28 Capacitance C 31 The method comprises the steps of carrying out a first treatment on the surface of the Resistor R 28 One end of (a) is connected with a switch tube Q 3 Drain electrode or switching tube Q of (2) 4 Drain of (d), resistance R 28 The other end of (2) is connected with a capacitor C 28 Capacitance C 28 Is grounded at the other end of the resistor R 28 The other end of the first power supply is connected with the reverse input end of the amplifying circuit; resistor R 31 One end of (a) is connected with a switch tube Q 3 Source and switching tube Q of (2) 4 Source of (1), resistance R 31 The other end of (2) is connected with a capacitor C 31 Capacitance C 31 The other end of the first electrode is grounded; resistor R 31 The other end of the first switch is connected with the same-direction input end of the amplifying circuit.
Preferably, the amplifying circuit comprises an operational amplifier and two groups of switching tubes, wherein the two groups of switching tubes are connected in parallel between the inverting input end and the output end of the operational amplifier, a resistor is connected between the drain electrode of each group of switching tubes and the inverting input end of the operational amplifier, and the inverting input end of the operational amplifier and the resistor R 28 Is connected with a resistor R between the other ends 29 The method comprises the steps of carrying out a first treatment on the surface of the A capacitor and a resistor R are connected in parallel between the inverting input end and the output end of the operational amplifier 30 。
Preferably, the resistance R 30 The resistance is kiloohm level.
Preferably, the amplifying circuit in the PFC branch comprises an operational amplifier and a switching tube Q 5 Switch tube Q 6 And resistance R 30 The output end of the operational amplifier is connected with a switch tube Q 5 Source electrode of (B), switch tube Q 6 Source of (1), resistance R 30 One end of (2) a switching tube Q 5 Drain electrode of (d) and switching tube Q 6 The drain electrode of the (B) is connected with the reverse input end of the operational amplifier, and the non-inverting input end of the operational amplifier is connected with the resistor R 32 One end of the operational amplifier is connected with the resistorR 30 Resistance R at the other end of 32 The other end of (2) is connected with resistor R 31 Is arranged at the other end of the tube; the non-inverting input end of the operational amplifier is also connected with a resistor R 39 One end of (1) resistor R 40 One end of (C) capacitor 39 One end of resistor R 39 And the other end of (C) and the capacitor C 39 The other end of the first electrode is grounded; resistor R 39 The other end of the power supply is connected with a 3.3V power supply; the output end of the operational amplifier in the PFC1 branch is an output end for collecting one path of signals.
Compared with the prior art, the utility model has the following beneficial technical effects:
the utility model relates to a staggered parallel PFC self-adaptive current detection circuit under wide-area working conditions, which comprises a staggered parallel PFC main circuit and a PFC inductance current sampling circuit; the output end of the staggered parallel PFC main circuit is provided with two sampling resistors which are connected in parallel, and each sampling resistor is connected in parallel with a switching tube; the PFC inductance current sampling circuit comprises two PFC branches, each PFC branch is connected with a switching tube of an interleaving PFC main circuit, and the PFC branches comprise a filtering circuit and an amplifying circuit and are used for filtering and amplifying sampling signals of sampling resistors at the output ends of the interleaving PFC main circuits; by connecting a switching tube in parallel with each sampling resistor and controlling the switching state of the switching tube to change the size of the sampling resistor, the amplitude of the sampling signal under the condition of full-range load is more than 2/3 of that of the AD signal, so that more stable and more accurate control of a loop is realized; the gain is changed under different working conditions, so that the harmonic wave of the input current in the whole range is 3% -4%.
Preferably, the feedback resistor of the sampling circuit is connected with the compensation feedback resistor in parallel, the amplification factor of the operational amplifier of the sampling circuit is changed through the switching state of the switching tube connected with the compensation feedback resistor, and the two work together to enable the circuit to realize PFC (power factor correction) stabilization and high-power factor operation through self-adaptive detection filtering, so that the sampling precision is improved.
Drawings
FIG. 1 shows an interleaved parallel power circuit and an adaptive current sampling circuit according to an embodiment of the present utility model.
Fig. 2 is a circuit diagram of operation mode 1 in an embodiment of the present utility model.
Fig. 3 is a circuit diagram of operation mode 2 in an embodiment of the utility model.
Fig. 4 is a circuit diagram of operating mode 3 in an embodiment of the utility model.
Fig. 5 is a circuit diagram of the operation mode 4 in the embodiment of the present utility model.
Detailed Description
In order that those skilled in the art will better understand the present utility model, a technical solution in the embodiments of the present utility model will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present utility model, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present utility model without making any inventive effort, shall fall within the scope of the present utility model.
It should be noted that the terms ", and the like in the description and claims of the present utility model and the above-described drawings are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the utility model described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
The utility model provides a staggered parallel PFC self-adaptive current detection circuit under wide-area working conditions, which is shown in figure 1 and comprises a staggered parallel PFC main circuit and a PFC inductance current sampling circuit;
interleaved parallel PFC main circuitComprising a switching tube Q 1 Switch tube Q 2 Switch tube Q 3 Switch tube Q 4 Boost diode D 1 Boost diode D 2 Boost diode D 3 Boost diode D 4 Boost diode D 5 Boost diode D 6 PFC inductance L 1 Sampling resistor R 1 Sampling resistor R 2 Compensating feedback resistor R 3 PFC inductance L 2 And filter capacitor C 0 ；
Boost diode D 1 Positive electrode of (D) and boost diode D 2 Is connected with one end of a power supply AC, and a boost diode D 1 Is connected with the booster diode D 3 Negative electrode of (2), PFC inductance L 1 And PFC inductance L 2 Is a member of the group; boost diode D 3 Positive electrode of (D) and boost diode D 4 The negative pole of (a) is connected with the other end of the power supply AC, and the boosting diode D 2 The positive electrode of (a) is connected with the boost diode D 4 Positive electrode of (a) switching tube Q 3 Source electrode of (B), switch tube Q 4 Source electrode of (C), filter capacitor (C) 0 One end of the load and one end of the load; PFC inductance L 1 Is connected with the boost diode D 5 Positive electrode of (2) and switching tube Q 1 Drain of boost diode D 5 Is connected with the filter capacitor C through the negative electrode 0 The other end of the load and the other end of the PFC inductance L 2 Is connected with the boost diode D 6 Positive electrode of (2) and switching tube Q 2 Drain of boost diode D 6 Is connected with the filter capacitor C through the negative electrode 0 Is arranged at the other end of the tube; switch tube Q 1 Source electrode of (C) is connected with switch tube Q 3 Sampling end of PFC inductance current sampling circuit, switching tube Q 2 Source electrode of (C) is connected with switch tube Q 4 Sampling end of PFC inductance current sampling circuit, switching tube Q 3 A sampling resistor R is connected in parallel between the drain electrode and the source electrode of the transistor 1 Switch tube Q 4 A sampling resistor R is connected in parallel between the drain electrode and the source electrode of the transistor 2 Switch tube Q 4 Source electrode of (C) and filter capacitor of (C) 0 Is connected in parallel with a compensation feedback resistor R between one ends 3 。
The switch tube Q 1 And a switching tube Q 2 Composition and combinationBridge arms; the switch tube Q 3 And a switching tube Q 4 Respectively with sampling resistor R 1 And sampling resistor R 2 An active sampling resistor which is connected in parallel to form a variable resistor; switch tube Q 1 Drain electrode of (d) and switching tube Q 2 Drain of (D) and boost diode D 5 Boost diode D 6 One end of the positive electrode is respectively connected with an inductor L, and the PFC inductor L 1 In the switching tube Q 1 Store energy when conducting, in the switching tube Q 1 When cut-off, PFC inductance L 1 The voltage of right positive and left negative is induced to store energy when the voltage is conducted to the filter capacitor C through the boost diode D 0 And charging and outputting energy.
Specifically, the switching tube Q 3 And a switching tube Q 4 All adopt MOS tubes with low voltage and low conduction internal resistance; the resistance of the sampling resistor is controlled by controlling the gate-source voltage of the MOS tube.
The PFC inductance current sampling circuit comprises a PFC1 branch and a PFC2 branch, wherein the input ends of the PFC1 branch and the PFC2 branch are respectively connected with a switch tube Q 3 Drain electrode of (d) and switching tube Q 4 As shown in FIG. 1, the input terminal of the PFC1 branch is connected with the switching tube Q 3 The drain electrode of the PFC2 branch circuit is connected with the switch tube Q 4 Is connected with the drain electrode of the transistor; the PFC1 branch and the PFC2 branch are the same and comprise a filter circuit and an amplifying circuit which are used for filtering and amplifying the sampling signal.
Specifically, taking the PFC1 branch as an example, the filter circuit in the PFC1 branch includes a resistor R 28 Resistance R 31 Capacitance C 28 Capacitance C 31 Resistance R 28 One end of the Power Factor Correction (PFC) main circuit is connected in parallel in a staggered way, namely a resistor R 28 One end of (a) is connected with a switch tube Q 3 Drain electrode or switching tube Q of (2) 4 Drain of (d), resistance R 28 The other end of (2) is connected with a capacitor C 28 Capacitance C 28 Is grounded at the other end of the resistor R 28 The other end of the first power supply is connected with the reverse input end of the amplifying circuit; resistor R 28 And capacitor C 28 Forms an anode filter circuit, a resistor R 31 And capacitor C 31 Form a negative electrode filter circuit, a resistor R 31 One end of (a) is connected with a switch tube Q 3 Source and switching tube Q of (2) 4 Source of (1), resistance R 31 The other end of (2) is connected with a capacitor C 31 Capacitance C 31 The other end of the first electrode is grounded; resistor R 31 The other end of the first switch is connected with the same-direction input end of the amplifying circuit. The PFC1 and PFC2 branches share a set of negative filter circuits, as shown in fig. 1. The amplifying circuit comprises an operational amplifier and two groups of switching tubes, wherein the two groups of switching tubes are connected in parallel between the reverse input end and the output end of the operational amplifier, a resistor is connected between the drain electrode of each group of switching tubes and the reverse input end of the operational amplifier, and the reverse input end and the resistor R of the operational amplifier 28 Is connected with a resistor R between the other ends 29 The method comprises the steps of carrying out a first treatment on the surface of the A capacitor and a resistor R are connected in parallel between the inverting input end and the output end of the operational amplifier 30 。
As shown in fig. 1, the amplifying circuit in the PFC1 branch circuit includes an operational amplifier, a switching tube Q 5 Switch tube Q 6 And resistance R 30 The output end of the operational amplifier is connected with a switch tube Q 5 Source electrode of (B), switch tube Q 6 Source of (1), resistance R 30 One end of (2) a switching tube Q 5 Drain electrode of (d) and switching tube Q 6 The drain electrode of the (B) is connected with the reverse input end of the operational amplifier, and the non-inverting input end of the operational amplifier is connected with the resistor R 32 One end, the output end of the operational amplifier is connected with a resistor R 30 Resistance R at the other end of 32 The other end of (2) is connected with resistor R 31 Is arranged at the other end of the tube; the non-inverting input end of the operational amplifier is also connected with a resistor R 39 One end of (1) resistor R 40 One end of (C) capacitor 39 One end of resistor R 39 And the other end of (C) and the capacitor C 39 The other end of the first electrode is grounded; resistor R 39 The other end of the power supply is connected with a 3.3V power supply; the output end of the operational amplifier in the PFC1 branch is an output end for collecting one path of signals.
The filter circuit in the PFC2 branch circuit comprises a resistor R 44 Resistance R 31 Capacitance C 44 Capacitance C 31 Resistance R 44 One end of the Power Factor Correction (PFC) main circuit is connected in parallel in a staggered way, namely a resistor R 44 One end of (a) is connected with a switch tube Q 3 Drain electrode or switching tube Q of (2) 4 Drain of (d), resistance R 44 Another of (2)End connection capacitor C 44 Capacitance C 44 Is grounded at the other end of the resistor R 44 The other end of the Power Factor Correction (PFC) 2 branch is connected with the reverse input end of the amplifying circuit; resistor R 44 And capacitor C 44 Forms an anode filter circuit, a resistor R 31 And capacitor C 31 Form a negative electrode filter circuit, a resistor R 31 One end of (a) is connected with a switch tube Q 3 Source and switching tube Q of (2) 4 Source of (1), resistance R 31 The other end of (2) is connected with a capacitor C 31 Capacitance C 31 The other end of the first electrode is grounded; resistor R 31 The other end of the first switch is connected with the same-direction input end of the amplifying circuit.
The amplifying circuit in the PFC2 branch circuit comprises an operational amplifier and a switching tube Q 7 Switch tube Q 8 And resistance R 43 The method comprises the steps of carrying out a first treatment on the surface of the The output end of the operational amplifier is connected with a switch tube Q 7 Source electrode of (B), switch tube Q 8 Source of (1), resistance R 43 One end of (2) a switching tube Q 7 Drain electrode of (d) and switching tube Q 8 The drain electrode of the (B) is connected with the reverse input end of the operational amplifier, and the non-inverting input end of the operational amplifier is connected with the resistor R 45 One end, the output end of the operational amplifier is connected with a resistor R 43 Resistance R at the other end of 42 The other end of (2) is connected with resistor R 41 Is arranged at the other end of the tube; the non-inverting input end of the operational amplifier is also connected with a resistor R 46 One end of (1) resistor R 47 One end of (C) capacitor 45 One end of the resistor R47 and the other end of the capacitor C 45 The other end of the first electrode is grounded; resistor R 46 The other end of the power supply is connected with a 3.3V power supply; the output end of the operational amplifier in the PFC2 branch is an output end for collecting one path of signals.
In PFC inductance current sampling circuit, resistor R 30 And resistance R 43 The feedback resistance of the operational amplifier circuit is typically in the kiloohm level. The operational amplifier with variable amplification factor of the amplifying circuit passes through the switch tube Q 5 Switch tube Q 6 Switch tube Q 7 Switch tube Q 8 The switching tube of the sampling circuit switches different gears according to the magnitude of the inductance current sampling value to change the amplification factor of the operational amplifier, so that the sampling signal amplitude of the sampling circuit is more than 2/3 of the AD port voltage, and the PFC loop control is improvedAccuracy and stability of (c).
The change of the amplification factor of the operational amplifier is realized by a gear switching mode. At small PFC loads, the inductor current is small due to the resistor R 1 And resistance R 2 The sampling signal of the PFC inductance current sampling circuit is very weak, and the operational amplifier needs to adopt large amplification factor to realize current signal amplification at the moment, and the switching tube Q 5 Switch tube Q 6 Switch tube Q 7 Switch tube Q 8 And the signal amplification can be realized by closing.
The feedback resistors of the two sampling circuits are respectively connected in parallel with two compensating sampling resistors, the compensating sampling resistors switch the actual feedback resistors through MOS switches, the sampling circuit shown in figure 1 has three different switching modes, and the three different switching modes respectively correspond to three gears, such as a switching tube Q 5 Switch tube Q 6 Are all closed; switch tube Q 5 Switch tube Q 6 Are all open; switch tube Q 5 Switch tube Q 6 One open and one closed. Therefore, the actual feedback resistance value can be changed by judging the magnitude of the actual power to switch different gears.
Switch tube Q 3 Switch tube Q 4 Switch tube Q 5 Switch tube Q 6 Switch tube Q 7 Switch tube Q 8 The driving signals of (a) are controlled by a driving circuit, and as shown in fig. 1, the driving circuit is an isolated driving circuit formed by UCC27324, and one driving circuit can send two paths of PWM signals to control two switching tubes. Therefore, the state switching of the switching tube can be realized by adopting only three driving circuits.
Specifically, referring to fig. 2 to 5, the operation modes of the interleaved parallel PFC circuit of the present embodiment are briefly described as follows:
as shown in fig. 2, modality 1: switch tube Q 1 Conduction and switch tube Q 2 Cut-off, PFC inductance L 1 Is passed through the switching tube Q 1 And a follow current loop formed by the PFC inductance L and a preceding rectifying circuit 2 Is passed through the step-up diode D 6 And filter capacitor C 0 Forms a follow current loop, at the moment, the PFC inductance L 1 Energy storage, PFC electricitySense of L 2 Releasing energy.
As shown in fig. 3, modality 2: switch tube Q 1 And a switching tube Q 2 Cut-off, PFC inductance L 1 Is passed through the step-up diode D 5 And filter capacitor C 0 Form a follow current loop, PFC inductance L 2 Is passed through the step-up diode D 6 And filter capacitor C 0 And forming a follow current loop. At this time, PFC inductance L 1 And PFC inductance L 2 Together releasing energy.
As shown in fig. 4, modality 3: switch tube Q 1 Conduction and switch tube Q 2 Cut-off, PFC inductance L 2 Is passed through the switching tube Q 2 And a follow current loop formed by the PFC inductance L and a preceding rectifying circuit 1 Is passed through the step-up diode D 5 And filter capacitor C 0 And forming a follow current loop. At this time, PFC inductance L 2 Energy storage PFC inductance L 1 Releasing energy.
As shown in fig. 5, modality 4: switch tube Q 1 And a switching tube Q 2 Simultaneously conducting, at this time PFC inductance L 1 Is passed through the step-up diode D 5 And filter capacitor C 0 Forms a follow current loop, PFC inductance L 2 Is passed through the switching tube Q 2 And the first-stage rectifying circuit and the previous-stage rectifying circuit form a follow current loop. At this time, PFC inductance L 1 And PFC inductance L 2 While storing energy.
The PFC inductance current sampling circuit is a negative feedback circuit for performing operation processing on signals acquired by sampling resistors in the staggered parallel PFC main circuit. As shown in FIG. 1, the actual sampling resistance value of the interleaved PFC main circuit can be changed by changing the switching tube Q connected in parallel with the actual sampling resistance value 3 Switch tube Q 4 The magnitude of the on-state resistance is changed, so that the amplitude of a sampling signal is changed, the high-frequency clutter is filtered by a filtering circuit by the signal collected by the sampling resistor, the collected small signal is amplified by an operational amplifier with variable amplification factor, and the processed inductance current feedback signal is output by a rear-stage RC filtering circuit; as shown in FIG. 1, the post RC filter circuit, taking PFC1 branch as an example, comprises a resistor R34 and a capacitor C34, wherein one end of the resistor R34 is connected with an operational amplifierThe other end of the resistor R34 is connected with one end of the capacitor C34 and then outputs, and the other end of the capacitor C34 is grounded.
Specifically, in order to more conveniently understand the foregoing adjustment of the filtering parameters of the PFC inductor current sampling circuit, the following specific analysis is performed:
taking interleaved parallel PFC based on average current control as an example, the effect of the voltage loop on PFC was analyzed. As shown in fig. 1, the bus voltage value and the voltage reference value V acquired by the output voltage sampling circuit ref And comparing, namely maintaining stable output voltage through the PI controller of the voltage outer ring, wherein the process is carried out in a digital control chip. Meanwhile, a filter capacitor and a sampling resistor in the voltage sampling circuit form a low-pass filter for attenuating harmonic components of the output voltage.
Specifically, when the set cut-off frequency of the low-pass filter is low (the corresponding voltage loop bandwidth is narrow), the output of the voltage loop is a DC quantity (set as V EA ) It is multiplied by the input voltage sampling value to generate an inductance current reference value, in the ideal state of the current loop (compared with the voltage loop, the bandwidth of the current loop is usually set to be very wide and has very small influence on the dynamic response speed), the inductance current is not distorted and is sinusoidal, and the input current i in Equal to the inductor current i L The method comprises the following steps:
wherein V is inp 、ω in K are the peak value, angular frequency and constant coefficient of the ac input voltage, respectively.
Specifically, let the efficiency of PFC converter be η, according to instantaneous power balance principle
i in (t)·V in (t)·η＝V o ·i o (t) (1-2)
The expression for the ac input voltage is set as:
V in (t)＝V inp ·sin(ω in t) (1-3)
specifically, since the output capacitance C is large enough, the output voltage V o Is a stable value. The output current can be obtained from the above two formulas as:
wherein the method comprises the steps ofIs constant.
Specifically, as can be seen from the above formulas (1-4), the output current i o (t) consists of two parts: a direct current component and a second harmonic component, wherein the second harmonic component of the current flows through the output capacitor, the current corresponding to an output voltage ripple of 100Hz when the grid frequency is 50 Hz. If the output voltage ripple is not limited, it will affect the sine of the inductor current reference through the voltage loop, distorting the input current, thus requiring a reduced voltage loop bandwidth to suppress the second harmonic. In a typical PFC voltage loop design, the cut-off frequency of the low pass filter is set between 10 and 20Hz to attenuate the second harmonic component contained in the output voltage sample.
In particular, although the lower voltage loop bandwidth can attenuate the second harmonic component of the output voltage, the dynamic response capability of the output voltage of the system is also deteriorated, and increasing the voltage loop bandwidth is the most direct method for improving the dynamic response capability of the output voltage. As can be seen from the formulas (1-4), the output voltage ripple frequency is twice the input voltage frequency, and for the power frequency of 50Hz, when the cut-off frequency of the voltage loop is greater than 100Hz, the second harmonic of the output voltage smoothly passes through the voltage loop, and the output of the voltage loop is not a constant value any more and also contains the second harmonic component.
V ea (t)＝V EA +V eaAC sin(2ω in t-φ) (1-5)
Wherein V is EA Is the direct current component of the voltage loop output, V eaAC Is the peak value of the second harmonic component, phi is the second harmonic component and the input powerPhase difference between the pressures.
By V in the formula (1-5) ea (t) substitution of V in formula (1-1) EA The expression of the input current becomes:
as can be seen from formulas (1-6), the input current is no longer sinusoidal, and the second harmonic component contained in the output of the voltage loop causes the third harmonic to be contained in the input current, thereby distorting the input current.
Substituting the formula (1-6) into the expression of (1-4) to obtain the output current:
i o (t)＝I o +i o2 (t)+i o4 (t) (1-7)
wherein,
specifically, as can be seen from equations (1-7), the third harmonic contained in the input current further results in the output current containing a fourth harmonic component. Through the harmonic analysis of the voltage loop bandwidth and the input and output current, two important conclusions are obtained: the output current harmonics are mainly even harmonics, while the input current harmonics are mainly odd harmonics; the even harmonic component contained in the output of the voltage ring is distorted after entering the control link, and the wider the bandwidth of the voltage ring is, the more even harmonic component and the odd harmonic component are output.
Specifically, the magnitude and amplitude of the collected inductance current are converted, effective information is extracted, loop gain and filtering parameters are adjusted according to the effective value, and if the fact that a 100Hz harmonic signal in a current signal is smaller and the current value is not matched is detected, the filtering parameters are adjusted to enable the two values to be matched.
Specifically, the size of the sampling resistor is changed by controlling the switching state of the MOS tube, the amplification factor of the operational amplifier of the sampling circuit is changed by controlling the switching state of the MOS tube connected in series with the compensation feedback resistor, so that the amplitude of the sampling signal under the full-range load condition is more than 2/3 of that of the AD signal in the full-range input, and the loop is controlled more stably and accurately. The gain is changed under different working conditions, so that the harmonic wave of the input current in the whole range is 3% -4%. The self-adaptive detection filter circuit solves the problem of input current oscillation caused by the nonlinearity of the voltage amplitude of the PFC sampling circuit under different load conditions and wide-area working conditions, can realize PFC stable and high-power factor operation, and improves the sampling precision.
The preferred embodiments of the utility model disclosed above are intended only to assist in the explanation of the utility model. The preferred embodiments are not exhaustive or to limit the utility model to the precise form disclosed. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the utility model and the practical application, to thereby enable others skilled in the art to best understand and utilize the utility model. The utility model is limited only by the claims and the full scope and equivalents thereof.
Claims (9)
1. The staggered parallel PFC self-adaptive current detection circuit under the wide-area working condition is characterized by comprising a staggered parallel PFC main circuit and a PFC inductance current sampling circuit; the output end of the staggered parallel PFC main circuit is provided with two sampling resistors which are connected in parallel, and each sampling resistor is connected in parallel with a switching tube; the PFC inductance current sampling circuit comprises two PFC branches, each PFC branch is connected with a switching tube of an interleaved PFC main circuit, and the PFC branches comprise a filtering circuit and an amplifying circuit and are used for filtering and amplifying sampling signals of sampling resistors at the output ends of the interleaved PFC main circuits.
2. The adaptive PFC current detection circuit of claim 1, wherein the filter circuit includes a positive filter circuit and a negative filter circuit, the input terminal of the positive filter circuit is connected to the drain of the parallel switching tube of the sampling resistor, and the input terminal of the negative filter circuit is connected to the source of the parallel switching tube of the sampling resistor.
3. The adaptive PFC current detection circuit of claim 2 wherein the filtering circuits of the two PFC branches share a common negative electrode.
4. The circuit of claim 1, wherein the main circuit comprises a switching tube Q 1 Switch tube Q 2 Switch tube Q 3 Switch tube Q 4 Boost diode D 1 Boost diode D 2 Boost diode D 3 Boost diode D 4 Boost diode D 5 Boost diode D 6 PFC inductance L 1 Sampling resistor R 1 Sampling resistor R 2 Compensating feedback resistor R3, PFC inductance L 2 And filter capacitor C 0 ；
Boost diode D 1 Positive electrode of (D) and boost diode D 2 Is connected with one end of a power supply AC, and a boost diode D 1 Is connected with the booster diode D 3 Negative electrode of (2), PFC inductance L 1 And PFC inductance L 2 Is a member of the group; boost diode D 3 Positive electrode of (D) and boost diode D 4 The negative pole of (a) is connected with the other end of the power supply AC, and the boosting diode D 2 The positive electrode of (a) is connected with the boost diode D 4 Positive electrode of (a) switching tube Q 3 Source electrode of (B), switch tube Q 4 Source electrode of (C), filter capacitor (C) 0 One end of the load and one end of the load; PFC inductance L 1 Boosting the other end of (a)Diode D 5 Positive electrode of (2) and switching tube Q 1 Drain of boost diode D 5 Is connected with the filter capacitor C through the negative electrode 0 The other end of the load and the other end of the PFC inductance L 2 Is connected with the boost diode D 6 Positive electrode of (2) and switching tube Q 2 Drain of boost diode D 6 Is connected with the filter capacitor C through the negative electrode 0 Is arranged at the other end of the tube; switch tube Q 1 Source electrode of (C) is connected with switch tube Q 3 Sampling end of PFC inductance current sampling circuit, switching tube Q 2 Source electrode of (C) is connected with switch tube Q 4 Sampling end of PFC inductance current sampling circuit, switching tube Q 3 A sampling resistor R is connected in parallel between the drain electrode and the source electrode of the transistor 1 Switch tube Q 4 A sampling resistor R is connected in parallel between the drain electrode and the source electrode of the transistor 2 Switch tube Q 4 Source electrode of (C) and filter capacitor of (C) 0 Is connected in parallel with a compensation feedback resistor R between one ends 3 。
5. The circuit of claim 4, wherein the switching tube Q 3 And a switching tube Q 4 And all adopt MOS tubes with low voltage and low conduction internal resistance.
6. The circuit of claim 1, wherein the filter circuit in the PFC branch comprises a resistor R 28 Resistance R 31 Capacitance C 28 Capacitance C 31 The method comprises the steps of carrying out a first treatment on the surface of the Resistor R 28 One end of (a) is connected with a switch tube Q 3 Drain electrode or switching tube Q of (2) 4 Drain of (d), resistance R 28 The other end of (2) is connected with a capacitor C 28 Capacitance C 28 Is grounded at the other end of the resistor R 28 The other end of the first power supply is connected with the reverse input end of the amplifying circuit; resistor R 31 One end of (a) is connected with a switch tube Q 3 Source and switching tube Q of (2) 4 Source of (1), resistance R 31 The other end of (2) is connected with a capacitor C 31 Capacitance C 31 The other end of the first electrode is grounded; resistor R 31 The other end of the first switch is connected with the same-direction input end of the amplifying circuit.
7. The circuit of claim 6, wherein the amplifying circuit comprises an operational amplifier and two groups of switching tubes, wherein the two groups of switching tubes are connected in parallel between the inverting input terminal and the output terminal of the operational amplifier, a resistor is connected between the drain electrode of each group of switching tubes and the inverting input terminal of the operational amplifier, and the inverting input terminal of the operational amplifier and the resistor R 28 Is connected with a resistor R between the other ends 29 The method comprises the steps of carrying out a first treatment on the surface of the A capacitor and a resistor R are connected in parallel between the inverting input end and the output end of the operational amplifier 30 。
8. The circuit of claim 7, wherein the resistor R is 30 The resistance is kiloohm level.
9. The circuit of claim 7, wherein the amplifying circuit in the PFC branch comprises an operational amplifier and a switching tube Q 5 Switch tube Q 6 And resistance R 30 The output end of the operational amplifier is connected with a switch tube Q 5 Source electrode of (B), switch tube Q 6 Source of (1), resistance R 30 One end of (2) a switching tube Q 5 Drain electrode of (d) and switching tube Q 6 The drain electrode of the (B) is connected with the reverse input end of the operational amplifier, and the non-inverting input end of the operational amplifier is connected with the resistor R 32 One end, the output end of the operational amplifier is connected with a resistor R 30 Resistance R at the other end of 32 The other end of (2) is connected with resistor R 31 Is arranged at the other end of the tube; the non-inverting input end of the operational amplifier is also connected with a resistor R 39 One end of (1) resistor R 40 One end of (C) capacitor 39 One end of resistor R 39 And the other end of (C) and the capacitor C 39 The other end of the first electrode is grounded; resistor R 39 The other end of the power supply is connected with a 3.3V power supply; the output end of the operational amplifier in the PFC1 branch is an output end for collecting one path of signals.
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN118275769A (en) * | 2024-03-29 | 2024-07-02 | 广州奥索兰电子科技有限公司 | Current sampling circuit of single-phase machine press driving plate |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN118275769A (en) * | 2024-03-29 | 2024-07-02 | 广州奥索兰电子科技有限公司 | Current sampling circuit of single-phase machine press driving plate |
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