CN220292000U - LIN driving circuit, LIN node and LIN bus - Google Patents

Abstract

The utility model provides a LIN driving circuit, a LIN node and a LIN bus, which comprises: the device comprises an input module, a current limiting protection module and an output module; the input end of the input module is connected with a transmission signal of the LIN node, and a control signal is output based on the transmission signal; the input end of the current limiting protection module is connected with the output end of the input module, the output end of the current limiting protection module is connected with the control end of the output module, a driving signal is output based on the control signal, and the voltage of the control end of the output module is clamped, so that the magnitude of the pull-down current of the output module is limited; the output module outputs a driving voltage to the LIN output port. According to the utility model, the current limiting protection circuit is arranged in front of the driving tube, so that the problem that the voltage is rapidly raised after the output port of the driving tube is short-circuited, and the driving circuit is damaged is avoided.

Description

LIN driving circuit, LIN node and LIN bus

Technical Field

The present utility model relates to the field of integrated circuits, and in particular, to a LIN driving circuit, a LIN node, and a LIN bus.

Background

LIN (Local Interconnect Network) local interconnection network is a serial communication network connecting simple control devices such as switches, displays, sensors and actuators, and is mainly used for realizing distributed electronic system control in automobiles. However, if the LIN bus driving circuit fails during operation, the internal driving tube is often shorted directly into VBAT (external battery powered high voltage power supply), resulting in unstable output driving voltage and damage to the LIN bus driving circuit.

Based on the above, the utility model provides a LIN driving circuit, a LIN node and a LIN bus, which are used for carrying out current limiting protection on the driving circuit, so as to avoid the damage problem caused by the short circuit of the driving circuit.

Disclosure of Invention

In view of the above-mentioned drawbacks of the prior art, an object of the present utility model is to provide a LIN driving circuit, a LIN node and a LIN bus, which are used for solving the problem of short-circuit damage of the output terminal of the driving circuit in the prior art.

To achieve the above and other related objects, the present utility model provides a LIN driving circuit comprising: the device comprises an input module, a current limiting protection module and an output module;

the input end of the input module is connected with a transmission signal TXD of the LIN node, and a control signal is output based on the transmission signal TXD;

the input end of the current limiting protection module is connected with the output end of the input module, the output end of the current limiting protection module is connected with the control end of the output module, a driving signal is output based on the control signal, and the voltage of the control end of the output module is clamped, so that the magnitude of the pull-down current of the output module is limited;

the output module outputs a driving voltage to the LIN output port.

Optionally, the input module comprises a pull-up circuit and a pull-down circuit connected in series between a first power supply voltage and ground; the control end of the pull-up circuit and the pull-down circuit are controlled by the sending signal, and the output ends of the pull-up circuit and the pull-down circuit are connected with the current-limiting protection module; the input end of the pull-up circuit is provided with the first power supply voltage; the input end of the pull-down circuit is grounded.

Optionally, the pull-up circuit includes a first current source and a first switch; a first end of the first current source is connected with the first power supply voltage; the first end of the first switch is connected with the second end of the first current source, and the second end of the first switch is connected with the current-limiting protection module.

Optionally, the pull-down circuit includes a second current source and a second switch; the first end of the second current source is grounded; the first end of the second switch is connected with the current limiting protection module, and the second end of the second switch is connected with the second end of the second current source.

Optionally, the current limiting protection module includes an operational amplifier, a third current source, a first NMOS, a second NMOS, and a first resistor; the positive input end of the operational amplifier is connected with the output end of the input module, the negative input end of the operational amplifier is connected with the source electrode of the first NMOS tube, and the output end of the operational amplifier is connected with the grid electrode of the first NMOS tube; the first end of the third current source is connected with a first power supply voltage, and the second end of the third current source is connected with the drain electrode of the first NMOS tube; the drain electrode of the second NMOS tube is connected with the source electrode of the first NMOS tube, the source electrode is grounded, and the grid electrode is connected with the drain electrode and outputs the driving signal; the first end of the first resistor is grounded, and the second end of the first resistor is connected with the grid electrode of the second NMOS tube.

Optionally, the output module includes a third NMOS transistor and a second resistor; the source electrode of the third NMOS tube is grounded, the grid electrode of the third NMOS tube is connected with the output end of the current limiting protection module, and the drain electrode of the third NMOS tube is connected with the LIN output port; the first end of the second resistor is connected with the LIN output port, and the second end of the second resistor is connected with a second power supply voltage.

Optionally, the output module further includes a first diode and a second diode; the cathode of the first diode is connected with the drain electrode of the third NMOS tube, and the anode of the first diode is connected with the LIN output port; and the cathode of the second diode is connected with the LIN output port, and the anode of the second diode is connected with the first end of the second resistor.

Optionally, the LIN driving circuit further comprises a slope buffer module; the slope buffer module is connected between the input module and the current limiting protection module and used for adjusting the slope of the driving voltage.

Optionally, the slope buffer module includes a third resistor, a fourth resistor, a capacitor, and a fourth NMOS tube; the first end of the third resistor is connected with a second power supply voltage, and the second end of the third resistor is connected with the drain electrode of the fourth NMOS tube; the first polar plate of the capacitor is connected with the grid electrode of the fourth NMOS tube, and the second polar plate is connected with the drain electrode of the fourth NMOS tube; the grid electrode of the fourth NMOS tube is connected with the output end of the input module and the input end of the current limiting protection module; and the first end of the fourth resistor is connected with the source electrode of the fourth NMOS tube, and the second end of the fourth resistor is grounded.

To achieve the above and other related objects, the present utility model provides a LIN node comprising: a load device and the LIN driving circuit described above; and a control end of the load device is connected with the LIN output port, and response is executed based on an output signal of the LIN output port.

To achieve the above and other related objects, the present utility model provides a LIN bus comprising: a communication bus and n LIN nodes according to claim 10; n is an integer of 2 or more; the communication bus outputs n sending signals; the input end of each LIN node is connected with the communication bus and receives the corresponding transmission signal, and then response is executed based on the corresponding transmission signal.

As described above, the LIN driving circuit, LIN node, and LIN bus of the present utility model have the following advantageous effects:

1. according to the LIN driving circuit, the LIN node and the LIN bus, the current limiting protection circuit is arranged in front of the driving tube, so that the driving circuit is prevented from being directly short-circuited to VBAT (high-voltage power supply powered by an external battery) and possibly causing damage.

2. According to the LIN driving circuit, the LIN node and the LIN bus, the grid voltage of the driving tube is controlled by setting the current source, so that the driving voltage provided by the driving tube is ensured to be stable, and the safety and stability of the LIN bus are ensured.

3. The LIN driving circuit, the LIN node and the LIN bus have simple circuit structures and can be well popularized and applied in a large scale.

Drawings

Fig. 1 shows a schematic structure of a LIN node according to the present utility model.

Fig. 2 is a schematic structural diagram of an input module according to the present utility model.

Fig. 3 is a schematic structural diagram of a current limiting protection module according to the present utility model.

Description of element reference numerals

1 LIN node

11 LIN driving circuit

111. Input module

111a pull-up circuit

111b pull-down circuit

111c bias current input unit

112. Current limiting protection module

1121. Current conversion unit

113. Output module

114. Slope buffering module

12. Load device

Detailed Description

Other advantages and effects of the present utility model will become apparent to those skilled in the art from the following disclosure, which describes the embodiments of the present utility model with reference to specific examples. The utility model may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present utility model.

Please refer to fig. 1-3. It should be noted that, the illustrations provided in the present embodiment merely illustrate the basic concept of the present utility model by way of illustration, and only the components related to the present utility model are shown in the drawings and are not drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of the components in actual implementation may be arbitrarily changed, and the layout of the components may be more complex.

As shown in fig. 1, the present embodiment provides a LIN driving circuit 11 including: an input module 111, a current limiting protection module 112, and an output module 113.

As shown in fig. 1, an input terminal of the input module 111 is connected to a transmission signal TXD of the LIN node, and a control signal VG1 is output based on the transmission signal TXD.

Specifically, the input module 111 includes a pull-up circuit 111a and a pull-down circuit 111b connected in series between a first power supply voltage and ground. The control end of the pull-up circuit 111a and the pull-down circuit 111b are controlled by the sending signal, and the output ends are connected with the current-limiting protection module 112; the input end of the pull-up circuit is provided with the first power supply voltage; the input terminal of the pull-down circuit 111b is grounded.

More specifically, in the present embodiment, as shown in fig. 1, the pull-up circuit 111a and the pull-down circuit 111b are both directly connected to the transmission signal TXD; when the transmission signal TXD is low, the pull-up circuit 111a is gated.

In an example, as shown in fig. 1, the pull-up circuit 111a includes a first current source I1 and a first switch S1; a first end of the first current source I1 is connected with the first power supply voltage VDD; the first end of the first switch S1 is connected to the second end of the first current source I1, and the second end is connected to the current limiting protection module 112. The first switch S1 is used as a control terminal of the pull-up circuit 111a, and gates the pull-up circuit 111a when the transmission signal TXD is received to be at a low level; in the present embodiment, the first power supply voltage VDD is set to the internal power supply VDD of the LIN node.

In another example, as shown in fig. 2, the pull-up circuit 111a includes a fifth NMOS transistor NM5, a first PMOS transistor PM1, a second PMOS transistor PM2, and a third PMOS transistor PM3; the gate of the fifth NMOS tube NM5 is connected with a first bias voltage, the source is grounded, and the drain is connected with the drain of the first PMOS tube PM 1; the source electrode of the first PMOS tube PM1 is connected with a first power supply voltage VDD (), and the grid electrode is connected with the drain electrode; the source electrode of the second PMOS tube PM2 is connected with the first power supply voltage VDD, the grid electrode of the second PMOS tube PM2 is connected with the grid electrode of the first PMOS tube PM1, and the drain electrode of the second PMOS tube PM3 is connected with the source electrode of the third PMOS tube PM3; and the gate of the third PMOS PM3 is connected to the transmission signal TXD of the LIN node, and the drain is connected to the input end of the current limiting protection module 112.

It should be noted that, the pull-up circuit 111a may be configured in other structures, as long as the setting that can be controlled by the transmission signal TXD to be turned on and provide a high level control signal for the following is the protection scope of the present embodiment.

More specifically, the pull-down circuit 111b and the pull-up circuit 111a are both directly connected to the transmit signal TXD, and the pull-down circuit 111b is gated when the transmit signal TXD is high.

In an example, as shown in fig. 1, the pull-down circuit 111b includes a second current source I2 and a second switch S2; the first end of the second current source I2 is grounded; the first end of the second switch S2 is connected to the current limiting protection module 112, and the second end is connected to the second end of the second current source I2. The second switch S2 serves as a control terminal of the pull-down circuit 111b, and gates the pull-down circuit 111b when the transmission signal TXD is received to be at a low level.

In another example, as shown in fig. 2, the pull-down circuit 111b includes a sixth NMOS transistor NM6 and a seventh NMOS transistor NM7; the grid electrode of the sixth NMOS tube NM6 is connected with a second bias voltage, the source electrode is grounded, and the drain electrode is connected with the source electrode of the seventh NMOS tube NM7; the gate of the seventh NMOS NM7 is connected to the transmit signal TXD of the LIN node, and the drain is connected to the input terminal of the current limiting protection module 112.

It should be noted that, the pull-down circuit 111b may be configured in other structures, as long as the setting that can be controlled by the transmission signal TXD to be turned on and provide a low level control signal for the following is the protection scope of the present embodiment. In addition, in another embodiment, the pull-up circuit 111a and the pull-down circuit 111b are not directly connected to the transmission signal TXD, but are connected to a reverse signal of the transmission signal through the pull-up circuit 111a, and the pull-down circuit 111b is connected to the same direction signal of the transmission signal, so that the pull-up circuit 111a is turned on when the transmission signal is at a low level, and the pull-down circuit 111b is turned off at the same time; the pull-up circuit 111a is turned off when the transmission signal is at a high level, and at the same time, the pull-down circuit 111b is turned on. In fact, the specific structure of the input module 111 is not limited by the present utility model, and any configuration that can control the turn-on of either the pull-up circuit 111a or the pull-down circuit 111b based on the transmission signal TXD is the protection scope of the present embodiment.

In addition, as shown in fig. 2, in the present embodiment, the first bias voltage and the second bias voltage are equal, and are set to the voltage output by the bias current input unit 111 c. The bias current input unit 111c includes a bias current IB and an eighth NMOS transistor NM8; the drain electrode of the eighth NMOS transistor NM8 is connected with the bias current IB, the source electrode is grounded, and the gate electrode is connected with the drain electrode. The bias current IB and the eighth NMOS transistor NM8 form a current mirror, and the input side of the current mirror and the fifth NMOS transistor NM5 of the pull-up circuit 111a and the sixth NMOS transistor NM6 of the pull-down circuit 111b form a current mirror, respectively. In practice, other power supply modes may be provided to provide the first bias voltage and the second bias voltage for the pull-up circuit 111a and the pull-down circuit 111b, respectively, which is not limited to the embodiment.

As shown in fig. 1, the input end of the current limiting protection module is connected to the output end of the input module 111, and based on the control signal VG1, a driving signal VG2 is output to clamp the voltage of the control end of the output module 113, thereby limiting the magnitude of the pull-down current of the output module 113.

Specifically, the current limiting protection module 112 includes an operational amplifier A1, a third current source I3, a first NMOS transistor NM1, a second NMOS transistor NM2, and a first resistor R1; the positive input end of the operational amplifier A1 is connected with the output end of the input module 111, the negative input end is connected with the source electrode of the first NMOS tube NM1, and the output end is connected with the grid electrode of the first NMOS tube NM 1; a first end of the third current source I3 is connected to the first supply voltage VDD, and a second end is connected to the drain of the first NMOS transistor NM 1; the drain electrode of the second NMOS tube NM2 is connected with the source electrode of the first NMOS tube NM1, the source electrode is grounded, and the grid electrode and the drain electrode are connected and output the driving signal VG2; the first end of the first resistor R1 is grounded, and the second end of the first resistor R1 is connected with the grid electrode of the second NMOS tube NM 2.

In the present embodiment, as shown in fig. 3, a third current source I3 is provided by the current conversion unit 1121; the current conversion unit comprises a ninth NMOS tube NM9, a third PMOS tube PM3 and a fourth PMOS tube PM4; the source electrode of the ninth NMOS tube is grounded, the grid electrode is connected with a third bias voltage, and the drain electrode is connected with the drain electrode of the third PMOS tube PM3; the source electrode of the third PMOS tube PM3 is connected with a first power supply voltage VDD, and the grid electrode is connected with the drain electrode; and the source electrode of the fourth PMOS tube PM4 is connected with a first power supply voltage VDD, the grid electrode of the fourth PMOS tube PM3 is connected with the grid electrode of the third PMOS tube PM3, and the drain electrode of the fourth PMOS tube PM4 is connected with the drain electrode of the first NMOS tube. In the present embodiment, the third bias voltage is supplied from the bias current input unit 111c as the first bias voltage and the second bias voltage. It should be noted that, the structure of the third current source I3 is not limited to the present embodiment, and any structure capable of realizing stable power supply, and thus the structure of clamping the voltage of the control terminal of the output module 113 is the protection scope of the present embodiment.

As shown in fig. 1, the output end of the output module 113 is connected to a LIN output port, and outputs a driving voltage to the LIN output port.

Specifically, in this embodiment, the output module 113 includes a third NMOS transistor NM3 and a second resistor R2; the source electrode of the third NMOS tube NM3 is grounded, the grid electrode is connected with the output end (namely, the control signal VG 2) of the current-limiting protection module 112, and the drain electrode is connected with the LIN output port; the first end of the second resistor R2 is connected to the LIN output port, and the second end is connected to the second supply voltage VBAT (in this embodiment, the second supply voltage is set as a supply power provided by an external battery for the LIN bus).

In this embodiment, the output module 113 further includes a first diode D1 and a second diode D2; the cathode of the first diode D1 is connected with the drain electrode of the third NMOS tube NM3, and the anode is connected with the LIN output port; and the cathode of the second diode D2 is connected with the LIN output port, and the anode of the second diode D2 is connected with the first end of the second resistor R2. And the LIN output port is subjected to overvoltage protection by arranging a diode.

The following describes the operation principle of the current limiting protection module 112: in this embodiment, when the third NMOS transistor is in the saturation region, the current formula satisfies:

wherein I is ₃ A current value of the third current source; mu (mu) _n Is the migration rate of electrons; c (C) _ox A gate oxide capacitance per unit area;the width-to-length ratio of the second NMOS tube; v (V) _GS3 The gate-source voltage of the third NMOS transistor NM 3; vth is the threshold voltage of the third NMOS transistor NM 3; r is R ₁ The resistance value of the first resistor.

Again because:

namely, the gate-source voltage of the third NMOS transistor finally obtained satisfies:

therefore, as long as the third current source I3 remains unchanged, the gate-source voltage V of the third NMOS transistor _GS3 The output voltage of the third NMOS tube NM3 is controlled by the gate voltage of the third NMOS tube NM3, that is, when the output port of the LIN driving circuit is shorted to the third supply voltage VBAT, the gate voltage of the third NMOS tube NM3 will not be changed, and the dominant current output by the third NMOS tube NM3 will be limited by the gate-source voltage VGS3, thereby realizing current limiting protection for the branch where the third NMOS tube NM3 is located.

In addition, the path to ground formed by the first NMOS transistor NM1, the second NMOS transistor NM2, and the first resistor R1 is a low-impedance path, and the equivalent resistance thereof satisfies:

wherein g _m1 Is the transconductance value g of the first NMOS transistor NM1 _m2 Is the transconductance value of the second NMOS transistor NM 2.

Because all the devices are equivalent to parallel connection, the impedance of a grounding channel formed by the first NMOS tube NM1, the second NMOS tube NM2 and the first resistor R1 is smaller, electromagnetic interference (EMI) signals coupled to the grid electrode of the third NMOS tube NM3 through a bus can be rapidly released when the LIN driving circuit works, and the anti-interference capability of the LIN driving circuit is enhanced.

As shown in fig. 1, the LIN driving circuit 11 further includes a slope buffer module 114.

Specifically, the slope buffer module 114 is connected between the input module 111 and the current limiting protection module, and adjusts the slope of the driving voltage output by the LIN output port.

As an example, the slope buffer module 114 includes a third resistor R3, a fourth resistor R4, a capacitor C, and a fourth NMOS transistor NM4; the first end of the third resistor R3 is connected with a second supply voltage VBAT, and the second end of the third resistor R3 is connected with the drain electrode of the fourth NMOS tube NM4; the first polar plate of the capacitor C is connected with the grid electrode of the fourth NMOS tube NM4, and the second polar plate is connected with the drain electrode of the fourth NMOS tube NM4; the gate of the fourth NMOS NM4 is connected to the output end of the input module 111 and the input end of the current limiting protection module 112; and the first end of the fourth resistor R4 is connected with the source electrode of the fourth NMOS tube, and the second end of the fourth resistor R4 is grounded. The slope of the driving voltage output by the final LIN output port is adjusted by using the capacitor C as the Miller capacitance and matching with the fourth NMOS tube NM 4.

It should be noted that, the specific structure of the slope buffer module 114 is not limited to the embodiment, and any structure capable of controlling the slope of the voltage signal output by the LIN driving circuit 11 is the protection scope of the embodiment.

As shown in fig. 1, the present utility model further provides a LIN node 1, comprising: a load device 12 and the LIN driving circuit 11 described above.

Specifically, the control terminal of the load device 12 is connected to the LIN output port, and a response is performed based on the output signal of the LIN output port. When the voltage output by the driving circuit 11 decreases, the subsequent load device 12 performs a response, entering an operating state; when the voltage output from the driving circuit 11 maintains a high level, the subsequent load device 12 does not perform a response.

More specifically, as shown in fig. 1, the load device 12 includes, but is not limited to, a capacitor CL, a resistor RL, and a third diode D3. The lower polar plate of the capacitor CL is grounded, and the upper polar plate is connected with the output end (namely, LIN output port) of the LIN driving circuit 11; the first end of the resistor RL is connected with the LIN output port, and the second end of the resistor RL is connected with the cathode of the third diode D3; the anode of the third diode D3 is connected to the third supply voltage VBAT. It should be noted that the devices and connection relationships in the load device 12 may be configured in other structures, which is not limited to the present embodiment.

The utility model also provides a LIN bus comprising: a communication bus and at least n of said LIN nodes 1; n is an integer of 2 or more; the communication bus outputs n sending signals and the n sending signals are transmitted in series; and each input end of each LIN node is connected with the communication bus to receive the corresponding transmission signal and execute response. In this embodiment, 16 LIN nodes are set, one of which is set as a master node, and the remaining nodes are set as slave nodes. Providing corresponding transmit signals TXD based on the communication bus drives the nodes to operate in response to the received transmit signals TXD.

In summary, the present utility model provides a LIN driving circuit, a LIN node, and a LIN bus, including: the device comprises an input module, a current limiting protection module and an output module; the input end of the input module is connected with a transmission signal of the LIN node, and a control signal is output based on the transmission signal; the output end of the output module is connected with the LIN output port and outputs a driving voltage signal based on the control signal; the current limiting protection module is arranged between the input module and the output module, and transmits a control signal to the control end of the output module and limits the voltage of the control end. According to the utility model, the current limiting protection circuit is arranged in front of the driving tube, so that the voltage is prevented from being rapidly raised after the output port of the driving tube is in short circuit, and the driving circuit is prevented from being damaged. Therefore, the utility model effectively overcomes various defects in the prior art and has high industrial utilization value.

The above embodiments are merely illustrative of the principles of the present utility model and its effectiveness, and are not intended to limit the utility model. Modifications and variations may be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the utility model. Accordingly, it is intended that all equivalent modifications and variations of the utility model be covered by the claims, which are within the ordinary skill of the art, be within the spirit and scope of the present disclosure.

Claims (11)

1. A LIN driving circuit, comprising at least: the device comprises an input module, a current limiting protection module and an output module;

the input end of the input module is connected with a transmission signal TXD of the LIN node, and a control signal is output based on the transmission signal TXD;

the input end of the current limiting protection module is connected with the output end of the input module, the output end of the current limiting protection module is connected with the control end of the output module, a driving signal is output based on the control signal, and the voltage of the control end of the output module is clamped, so that the magnitude of the pull-down current of the output module is limited;

the output module outputs a driving voltage to the LIN output port.

2. The LIN driving circuit of claim 1, wherein: the input module comprises a pull-up circuit and a pull-down circuit which are connected in series between a first power supply voltage and ground;

the control end of the pull-up circuit and the pull-down circuit are controlled by the sending signal, and the output ends of the pull-up circuit and the pull-down circuit are connected with the current-limiting protection module; the input end of the pull-up circuit is provided with the first power supply voltage; the input end of the pull-down circuit is grounded.

3. The LIN driving circuit of claim 2, wherein: the pull-up circuit comprises a first current source and a first switch;

a first end of the first current source is connected with the first power supply voltage;

the first end of the first switch is connected with the second end of the first current source, and the second end of the first switch is connected with the current-limiting protection module.

4. The LIN driving circuit of claim 2, wherein: the pull-down circuit comprises a second current source and a second switch;

the first end of the second current source is grounded;

the first end of the second switch is connected with the current limiting protection module, and the second end of the second switch is connected with the second end of the second current source.

5. The LIN driving circuit of claim 1, wherein: the current limiting protection module comprises an operational amplifier, a third current source, a first NMOS tube, a second NMOS tube and a first resistor;

the positive input end of the operational amplifier is connected with the output end of the input module, the negative input end of the operational amplifier is connected with the source electrode of the first NMOS tube, and the output end of the operational amplifier is connected with the grid electrode of the first NMOS tube;

the first end of the third current source is connected with a first power supply voltage, and the second end of the third current source is connected with the drain electrode of the first NMOS tube;

the drain electrode of the second NMOS tube is connected with the source electrode of the first NMOS tube, the source electrode is grounded, and the grid electrode is connected with the drain electrode and outputs the driving signal;

the first end of the first resistor is grounded, and the second end of the first resistor is connected with the grid electrode of the second NMOS tube.

6. The LIN driving circuit of claim 1, wherein: the output module comprises a third NMOS tube and a second resistor;

the source electrode of the third NMOS tube is grounded, the grid electrode of the third NMOS tube is connected with the output end of the current limiting protection module, and the drain electrode of the third NMOS tube is connected with the LIN output port;

the first end of the second resistor is connected with the LIN output port, and the second end of the second resistor is connected with a second power supply voltage.

7. The LIN driving circuit of claim 6, wherein: the output module further comprises a first diode and a second diode;

the cathode of the first diode is connected with the drain electrode of the third NMOS tube, and the anode of the first diode is connected with the LIN output port; and the cathode of the second diode is connected with the LIN output port, and the anode of the second diode is connected with the first end of the second resistor.

8. LIN driving circuit according to any one of claims 1 to 7, characterized in that: the LIN driving circuit also comprises a slope buffer module;

the slope buffer module is connected between the input module and the current limiting protection module and used for adjusting the slope of the driving voltage.

9. The LIN driving circuit of claim 8, wherein: the slope buffer module comprises a third resistor, a fourth resistor, a capacitor and a fourth NMOS tube;

the first end of the third resistor is connected with a second power supply voltage, and the second end of the third resistor is connected with the drain electrode of the fourth NMOS tube;

the first polar plate of the capacitor is connected with the grid electrode of the fourth NMOS tube, and the second polar plate is connected with the drain electrode of the fourth NMOS tube;

the grid electrode of the fourth NMOS tube is connected with the output end of the input module and the input end of the current limiting protection module;

and the first end of the fourth resistor is connected with the source electrode of the fourth NMOS tube, and the second end of the fourth resistor is grounded.

10. A LIN node, the LIN node comprising at least: load device and LIN driving circuit according to any one of claims 1 to 9; and a control end of the load device is connected with the LIN output port, and response is executed based on an output signal of the LIN output port.

11. A LIN bus, said LIN bus comprising at least: a communication bus and n LIN nodes according to claim 10; n is an integer of 2 or more; the communication bus outputs n sending signals; the input end of each LIN node is connected with the communication bus and receives the corresponding transmission signal, and then response is executed based on the corresponding transmission signal.