CN220234496U - Three-level power unit structure and frequency converter or inverter - Google Patents
Three-level power unit structure and frequency converter or inverter Download PDFInfo
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- CN220234496U CN220234496U CN202320287633.XU CN202320287633U CN220234496U CN 220234496 U CN220234496 U CN 220234496U CN 202320287633 U CN202320287633 U CN 202320287633U CN 220234496 U CN220234496 U CN 220234496U
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- 239000004065 semiconductor Substances 0.000 claims abstract description 162
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 82
- 229910052802 copper Inorganic materials 0.000 claims description 82
- 239000010949 copper Substances 0.000 claims description 82
- 239000000758 substrate Substances 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 14
- 238000003475 lamination Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000001816 cooling Methods 0.000 description 1
- 239000008358 core component Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 230000008520 organization Effects 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
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Abstract
The utility model discloses a three-level power unit structure and a frequency converter or an inverter, and belongs to the technical field of frequency converters and inverters. The three-level power unit structure comprises a radiator, a first semiconductor switching element, a second semiconductor switching element, a third semiconductor switching element and a laminated busbar; the first semiconductor switching element, the second semiconductor switching element, and the third semiconductor switching element are arranged in a single column on the surface of the heat sink. According to the utility model, the semiconductor switch elements are reasonably arranged and the optimal current flow direction of the laminated busbar is set, and the semiconductor switch elements are arranged in a single-row mode, so that the power module volume is reduced, the IGBT current flow direction and the laminated structure of the laminated busbar are optimized, the stray inductance of a converter loop is effectively reduced, meanwhile, the main power and driving interface is more reasonably arranged, the power density and performance are improved, and the cost is reduced.
Description
Technical Field
The utility model relates to the field of frequency converters and inverters, in particular to a three-level power unit structure and a frequency converter or an inverter.
Background
The power module is a core component in the whole machine of the medium-high voltage high-current three-level four-quadrant frequency converter. The semiconductor switch device generally comprises a semiconductor switch element and a laminated busbar, wherein each element is connected with a radiator for radiating heat, and the elements are electrically connected through the laminated busbar. Whether the current carrying capacity of the semiconductor switching element serving as a key element in the power module is reasonably and fully utilized or not determines the competitiveness of the product, the current carrying capacity is often limited by stray inductances of the electrical connection busbar, and the stray inductances are closely related to the current flow direction, the lamination relation, the arrangement mode of the semiconductor switching element and the like of the lamination busbar.
Disclosure of Invention
In order to solve the problem that power module stray inductance is big and layout space is extravagant, this application provides a three level power unit structure and converter or dc-to-ac converter.
According to an aspect of an embodiment of the present application, there is provided a three-level power cell structure including a heat sink, a first semiconductor switching element, a second semiconductor switching element, a third semiconductor switching element, and a laminated busbar; the laminated busbar comprises a P direct current copper bar, a 0 electric copper bar, an N direct current copper bar, an A connecting copper bar, a B connecting copper bar and an AC alternating current copper bar, and the first semiconductor switching element, the second semiconductor switching element and the third semiconductor switching element are arranged on the surface of the radiator in a single-column mode; the A connecting copper bar is positioned on a first plane; the 0 electric copper bar, the B connecting copper bar and the AC alternating current copper bar are positioned on a second plane; and the P direct current copper bar and the N direct current copper bar are positioned on a third plane.
Further, in one possible embodiment, the first semiconductor switching element, the second semiconductor switching element, and the third semiconductor switching element each include semiconductor switching elements having the same specification as a double-transistor insulated gate bipolar transistor;
the double-tube insulated gate bipolar transistor comprises a first insulated gate bipolar transistor and a second insulated gate bipolar transistor; the double-tube insulated gate bipolar transistor comprises a first pin, a second pin and a third pin; the first pin is connected with an emitter of the first insulated gate bipolar transistor and a collector of the second insulated gate bipolar transistor; the second pin is connected with an emitter of the second insulated gate bipolar transistor; the third pin is connected with the collector electrode of the first insulated gate bipolar transistor.
Further, in one possible embodiment, the P dc copper bar is located above the third semiconductor switching element and extends to the outside of the third semiconductor switching element to form a terminal of the P dc copper bar;
the 0-electricity copper bar is positioned above the second semiconductor switching element and the third semiconductor switching element, and extends to the outer side of the third semiconductor switching element to form a terminal of the 0-electricity copper bar;
the N direct current copper bar is positioned above the second semiconductor switching element, extends to the outer side of the third semiconductor switching element through the upper part of the third semiconductor switching element and forms a wiring terminal of the N direct current copper bar;
the AC alternating current copper bar is positioned above the first semiconductor switching element and extends to the outer side of the first semiconductor switching element to form a wiring terminal of the AC alternating current copper bar;
the A connection copper bar is positioned above the first semiconductor switching element, the second semiconductor switching element and the third semiconductor switching element;
the B connection copper bar is located above the first semiconductor switching element and the second semiconductor switching element.
Further, in one possible embodiment, the heat sink is a carrier for mounting and dissipating heat of the semiconductor switching element, and the heat sink is any one of a liquid-cooled heat sink, a heat pipe heat sink, a fin heat sink, and a heat dissipating substrate.
Further, in a possible embodiment, the relative positions of the first plane, the second plane and the third plane are reordered according to the set rule when the set rule is different.
Further, in one possible embodiment, the first semiconductor switching element, the second semiconductor switching element, and the third semiconductor switching element are obtained by connecting a plurality of double-transistor insulated gate bipolar transistors in parallel in a structure involving a high-power three-level power unit, the first semiconductor switching element group functioning equivalently to the first semiconductor switching element, the second semiconductor switching element group functioning equivalently to the second semiconductor switching element, and the third semiconductor switching element group functioning equivalently to the third semiconductor switching element.
According to another aspect of the embodiments of the present application, there is also provided a frequency converter or inverter, including any of the three-level power cell structures described above.
Compared with the prior art, the technical scheme provided by the embodiment of the application has the following advantages:
in the embodiment of the application, the position relation and arrangement mode of each element in the power unit structure are adjusted, the first semiconductor switching element, the second semiconductor switching element and the third semiconductor switching element are arranged on the surface of the radiator in a single-column mode, all the elements are electrically connected through three layers of bus bars arranged in a laminated mode, the layout of the laminated bus bars is optimized, the semiconductor switching elements are reasonably arranged and the optimal current flow direction of the laminated bus bars is set, the semiconductor switching elements are arranged in a single-column mode, therefore, the size of a power module is reduced, the IGBT current flow direction and the laminated structure of the laminated bus bars are optimized, stray inductance of a converter circuit is effectively reduced, meanwhile, the main current and a driving interface are more reasonable, the power density and the performance are improved, and the cost is reduced.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the application and together with the description, serve to explain the principles of the application.
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings that are required to be used in the description of the embodiments or the prior art will be briefly described below, and it will be obvious to those skilled in the art that other drawings can be obtained from these drawings without inventive effort.
Fig. 1 is a schematic layout diagram of a three-level power unit structure module and a stacked busbar connection according to an embodiment of the present application;
fig. 2 is a schematic layout diagram of internal pins of a dual-insulated gate bipolar transistor according to an embodiment of the present application;
fig. 3 is a schematic diagram of electrical connection between a semiconductor switching element and a busbar in a three-level power unit structure according to an embodiment of the present application;
fig. 4 is a schematic circuit diagram of a three-level topology according to an embodiment of the present application;
fig. 5 is a schematic diagram of electrical connection between a semiconductor switching element and a busbar in another three-level power unit structure according to an embodiment of the present disclosure;
fig. 6 is a schematic diagram of electrical connection between a semiconductor switching element and a busbar in another three-level two-combination power unit structure according to an embodiment of the present application;
fig. 7 is a schematic diagram of electrical connection between a semiconductor switching element and a busbar in another three-level three-combination power unit structure according to an embodiment of the present application;
fig. 8 is a layout diagram of a three-group three-level power cell structure according to another view angle according to an embodiment of the present application.
The reference numerals are as follows:
101-a heat sink; 201-a first semiconductor switching element; 202-a second semiconductor switching element; 203-a third semiconductor switching element; 301-P direct current copper bars; 302-N direct current copper bars; 303-0 electric copper bars; 304-AC alternating current copper bars; 305-B connecting copper bars; 306-A are connected with copper bars.
Detailed Description
According to an aspect of the present embodiment, there is provided an embodiment of a three-level power cell structure, as in fig. 1, the power cell structure including a heat sink 101, a first semiconductor switching element 201, a second semiconductor switching element 202, a third semiconductor switching element 203, and a laminated busbar. The laminated busbar comprises a P direct current copper bar 301, an N direct current copper bar 302, a 0 electric copper bar 303, an AC alternating current copper bar 304, a B connecting copper bar 305 and an A connecting copper bar 306.
In the present embodiment, the relative positional relationship of the three semiconductor switching elements and the heat sink 101 is as follows: the first semiconductor switching element 201, the second semiconductor switching element 202, and the third semiconductor switching element 203 are sequentially arranged in a single row on the surface of the heat sink 101. Each busbar of the laminated arrangement electrically connects the three semiconductor switching elements, the laminated busbar and the three semiconductor switching elements are positioned on the same side of the radiator 101, and among the laminated busbars, the A connection copper bar 306 is positioned on the first plane; the 0 electric copper bar 303, the B connecting copper bar 305 and the AC alternating current copper bar 304 are positioned on a second plane; the P-dc copper bar 301 and the N-dc copper bar 302 are located in a third plane, and the first plane, the second plane and the third plane are parallel to each other and are not in the same plane.
Optionally, in one possible force scenario, the relative positions of the first plane, the second plane and the third plane are reordered according to the set rule when the set rule is different. Thus, various ordering modes can be realized and the method is applied to various processing environments.
In this embodiment, by adjusting the layout of the first semiconductor switching element 201, the second semiconductor switching element 202 and the third semiconductor switching element 203, six bus bars connecting the elements can connect the semiconductor switching elements in the power unit structure only by arranging three layers, and the stray inductance of the converter circuit is reduced due to the optimization of the layout between the bus bars. Meanwhile, the semiconductor switching elements are selected, so that the number of the semiconductor switching elements in each semiconductor switching element can be matched according to actual requirements, the performance of the power unit structure is greatly improved, and the power unit structure can be suitable for various occasions. In addition, due to the design of the three layers of busbar, the total volume of the required busbar is reduced, and the cost is also reduced.
In one embodiment, the first semiconductor switching element 201, the second semiconductor switching element 202 and the third semiconductor switching element 203 may be selected from the same type of semiconductor switching elements, so that the power unit structure is more convenient in layout, convenient for organization and allocation production, and reduces raw material backlog.
In this embodiment, referring to the diagram provided in fig. 2, the semiconductor switching element is a double-transistor IGBT, each double-transistor IGBT includes two IGBTs, i.e., a first insulated gate bipolar transistor and a second insulated gate bipolar transistor, and the double-transistor IGBT includes a plurality of pins. The first pin 1 is connected with an emitter of the first insulated gate bipolar transistor and a collector of the second insulated gate bipolar transistor, the second pin 2 is connected with the emitter of the second insulated gate bipolar transistor, and the third pin 3 is connected with the collector of the first insulated gate bipolar transistor.
In this embodiment, each semiconductor switching element includes 1 double-transistor IGBT, and the specific connection relationship between the stacked busbar and the three semiconductor switching elements is as follows:
as shown in the diagram provided in fig. 3, a P-dc copper bar is connected to the third pin of each double-insulated-gate bipolar transistor included in the third semiconductor switching element 203, an N-dc copper bar is connected to the second pin of each double-insulated-gate bipolar transistor included in the second semiconductor switching element 202, a 0-electric copper bar is connected to the third pin of each double-insulated-gate bipolar transistor included in the second semiconductor switching element 202 and the second pin of each double-insulated-gate bipolar transistor included in the third semiconductor switching element 203, an AC-AC copper bar is connected to the first pin of each double-insulated-gate bipolar transistor included in the first semiconductor switching element 201, an a-connection copper bar is connected to the third pin of each double-insulated-gate bipolar transistor included in the first semiconductor switching element 201 and the first pin of each double-insulated-gate bipolar transistor included in the third semiconductor switching element 203, and a-connection copper bar is connected to the third pin of each double-insulated-gate bipolar transistor included in the first semiconductor switching element 201 and the first pin of each double-insulated-gate bipolar transistor included in the first semiconductor switching element 201.
By this connection, the three-level power cell structure may constitute one phase, such as a U-phase (the V-phase and W-phase are identical in composition) in a circuit of a three-level topology as provided in fig. 4. In the present embodiment, the third semiconductor switching element 203 corresponds to T1 and D1 in the topology, the second semiconductor switching element 202 corresponds to D2 and T4 in the topology, and the first semiconductor switching element 201 corresponds to T2 and T3 in the topology. The IGBT equivalent to the third diode D1 shorts the gate to the emitter, and the IGBT equivalent to the second diode D2 shorts the gate to the emitter.
Therefore, the circuit with the three-level topological structure can be realized by selecting the semiconductor switching elements with the same model, so that the purchasing and the assembly in the production process are convenient, and the matching use problem among various different elements is not needed to be considered. Three phases can be formed by using the three-group power unit structure, and the effect seen from the other side of the radiator 101 is as shown in the diagram provided in fig. 8, and it can be seen that the terminals of the input P direct current copper bar, the 0 electric copper bar and the N direct current copper bar of each phase are all located at one side, and the terminals of the output AC alternating current copper bar are all located at the other side, so that the wiring and the use are convenient. The device can be applied to a rectifying and inverting unit module of a three-level four-quadrant frequency converter and an inverting unit module of a three-level two-quadrant frequency converter. Or a set of single phase power cell structures may be used. Of course, the application scenario here is merely illustrative, the actual application scenario is not limited thereto, the embodiment includes 1 double-transistor IGBT per semiconductor switching element is merely illustrative, and the actual application is not limited to 1.
In another embodiment, as shown in fig. 6, each semiconductor switching element includes two semiconductor switching elements, and specific relative positions of the stacked busbar and the semiconductor switching elements are as follows: the P direct current copper bar is located above the first semiconductor switching element 201 and extends to the outside of the first semiconductor switching element 201 to form a wiring terminal of the P direct current copper bar, the 0 electric copper bar is located above the second semiconductor switching element 202 and the first semiconductor switching element 201 and extends to the outside of the first semiconductor switching element 201 to form a wiring terminal of the 0 electric copper bar, the N direct current copper bar is located above the second semiconductor switching element 202 and extends to the outside of the first semiconductor switching element 201 via the upper side of the first semiconductor switching element 201 to form a wiring terminal of the N direct current copper bar, the AC alternating current copper bar is located above the third semiconductor switching element 203 and extends to the outside of the third semiconductor switching element 203 to form a wiring terminal of the AC alternating current copper bar, the a connection copper bar is located above the first semiconductor switching element 201, the second semiconductor switching element 202 and the third semiconductor switching element 203, and the B connection copper bar is located above the second semiconductor switching element 202 and the third semiconductor switching element 203.
In one embodiment, the first semiconductor switching element 201, the second semiconductor switching element 202, and the third semiconductor switching element 203 include the same number of semiconductor switching elements. In which, as shown in fig. 6, each semiconductor switching element includes a connection schematic diagram of the case of two semiconductor switching elements. Of course, each semiconductor switching element may include a connection schematic diagram of one semiconductor switching element as shown in fig. 5, or may include a connection schematic diagram of three semiconductor switching elements as shown in fig. 7. Other numbers of semiconductor switching elements are not exemplified and are within the scope encompassed by the present embodiment.
In this embodiment, the number of semiconductor switching elements included in the semiconductor switching elements may be selected according to actual needs, so that the function of the power unit structure may be optimized, and an appropriate power unit structure may be selected according to the working condition environment.
In one embodiment, the heat sink 101 is a carrier for mounting and dissipating heat of a semiconductor switching element, and the heat sink 101 is any one of a liquid cooling heat sink, a heat pipe heat sink, a tooth fin heat sink and a heat dissipating substrate, and different kinds of heat sinks can be selected according to practical situations of application scenarios.
In still another embodiment provided by the application, a frequency converter or an inverter is further provided, which includes any of the three-level power unit structures in the above embodiment, and the frequency converter or the inverter using the three-level power unit structure has a low stray inductance and a high current carrying capacity of the converter loop, so that the performance of the frequency converter can be improved.
Claims (7)
1. A three-level power cell structure comprising a heat sink, a first semiconductor switching element, a second semiconductor switching element, a third semiconductor switching element, and a laminated busbar; the laminated busbar comprises a P direct current copper bar, a 0 electric copper bar, an N direct current copper bar, an A connecting copper bar, a B connecting copper bar and an AC alternating current copper bar, and is characterized in that the first semiconductor switching element, the second semiconductor switching element and the third semiconductor switching element are arranged on the surface of the radiator in a single-column mode; the A connecting copper bar is positioned on a first plane; the 0 electric copper bar, the B connecting copper bar and the AC alternating current copper bar are positioned on a second plane; and the P direct current copper bar and the N direct current copper bar are positioned on a third plane.
2. The three-level power cell structure according to claim 1, wherein the first semiconductor switching element, the second semiconductor switching element, and the third semiconductor switching element each include semiconductor switching elements of the same specification as a double-transistor insulated gate bipolar transistor;
the double-tube insulated gate bipolar transistor comprises a first insulated gate bipolar transistor and a second insulated gate bipolar transistor; the double-tube insulated gate bipolar transistor comprises a first pin, a second pin and a third pin; the first pin is connected with an emitter of the first insulated gate bipolar transistor and a collector of the second insulated gate bipolar transistor; the second pin is connected with an emitter of the second insulated gate bipolar transistor; the third pin is connected with the collector electrode of the first insulated gate bipolar transistor.
3. The three-level power cell structure of claim 1, wherein the P-dc copper bar is located above the third semiconductor switching element and extends to an outside of the third semiconductor switching element to form a terminal of the P-dc copper bar;
the 0-electricity copper bar is positioned above the second semiconductor switching element and the third semiconductor switching element, and extends to the outer side of the third semiconductor switching element to form a terminal of the 0-electricity copper bar;
the N direct current copper bar is positioned above the second semiconductor switching element, extends to the outer side of the third semiconductor switching element through the upper part of the third semiconductor switching element and forms a wiring terminal of the N direct current copper bar;
the AC alternating current copper bar is positioned above the first semiconductor switching element and extends to the outer side of the first semiconductor switching element to form a wiring terminal of the AC alternating current copper bar;
the A connection copper bar is positioned above the first semiconductor switching element, the second semiconductor switching element and the third semiconductor switching element;
the B connection copper bar is located above the first semiconductor switching element and the second semiconductor switching element.
4. The three-level power unit structure according to claim 1, wherein the radiator is a carrier for mounting and dissipating heat of the semiconductor switching element, and the radiator is any one of a liquid-cooled radiator, a heat pipe radiator, a fin radiator, and a heat dissipating substrate.
5. The three level power cell structure of claim 1, wherein the relative positions of the first, second and third planes are reordered according to a set rule when the set rule is different.
6. The three-level power cell structure according to claim 2, wherein the first semiconductor switching element, the second semiconductor switching element, and the third semiconductor switching element are obtained by connecting a plurality of double-transistor insulated gate bipolar transistors in parallel in relation to a high-power three-level power cell structure, the first semiconductor switching element group functions as a first semiconductor switching element, the second semiconductor switching element group functions as a second semiconductor switching element, and the third semiconductor switching element group functions as a third semiconductor switching element.
7. A frequency converter or inverter comprising the three-level power cell structure of any one of claims 1-6.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202320287633.XU CN220234496U (en) | 2023-02-08 | 2023-02-08 | Three-level power unit structure and frequency converter or inverter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202320287633.XU CN220234496U (en) | 2023-02-08 | 2023-02-08 | Three-level power unit structure and frequency converter or inverter |
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| Publication Number | Publication Date |
|---|---|
| CN220234496U true CN220234496U (en) | 2023-12-22 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202320287633.XU Active CN220234496U (en) | 2023-02-08 | 2023-02-08 | Three-level power unit structure and frequency converter or inverter |
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| Country | Link |
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| CN (1) | CN220234496U (en) |
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- 2023-02-08 CN CN202320287633.XU patent/CN220234496U/en active Active
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