CN219800839U - Low-stress patch packaging structure - Google Patents
Low-stress patch packaging structure Download PDFInfo
- Publication number
- CN219800839U CN219800839U CN202320923254.5U CN202320923254U CN219800839U CN 219800839 U CN219800839 U CN 219800839U CN 202320923254 U CN202320923254 U CN 202320923254U CN 219800839 U CN219800839 U CN 219800839U
- Authority
- CN
- China
- Prior art keywords
- shaped frame
- packaging
- frame
- chip
- jumper wire
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Links
- 238000004806 packaging method and process Methods 0.000 title claims abstract description 61
- 238000005452 bending Methods 0.000 claims abstract description 26
- 239000000853 adhesive Substances 0.000 claims description 20
- 230000001070 adhesive effect Effects 0.000 claims description 20
- 238000007747 plating Methods 0.000 claims description 6
- 239000003822 epoxy resin Substances 0.000 claims description 3
- 229920000647 polyepoxide Polymers 0.000 claims description 3
- 229920006332 epoxy adhesive Polymers 0.000 claims description 2
- 238000003466 welding Methods 0.000 abstract description 6
- 238000000034 method Methods 0.000 abstract description 5
- 230000035882 stress Effects 0.000 description 9
- 229910000679 solder Inorganic materials 0.000 description 4
- 230000000694 effects Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 239000004033 plastic Substances 0.000 description 2
- 238000007650 screen-printing Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008602 contraction Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 238000012858 packaging process Methods 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
Landscapes
- Packaging Frangible Articles (AREA)
Abstract
The utility model provides a low-stress patch packaging structure which is used for packaging chips and comprises a packaging frame and a jumper wire, wherein the packaging frame comprises a first U-shaped frame and a second U-shaped frame, and the opening end of the first U-shaped frame is opposite to the opening end of the second U-shaped frame; one end of the jumper wire is welded on the lower surface of the upper end of the second U-shaped frame, the other end of the jumper wire extends downwards to form a bending part, and extends in a direction close to the first U-shaped frame by taking the bending part as a starting point until the other end of the jumper wire is positioned right below the upper end of the first U-shaped frame to form a packaging part; the upper end of the chip is welded on the lower surface of the upper end of the first U-shaped frame, and the lower end of the chip is welded on the upper surface of the packaging part. The utility model adopts the jumper structure to replace the frame bending scheme, solves the technical problem of mechanical stress generated by bending in the subsequent forming process, enables the chip to buffer through the jumper tail welding area, and reduces the mechanical stress to which the chip is subjected.
Description
Technical Field
The utility model relates to a low-stress patch packaging structure, in particular to a novel patch packaging jumper structure.
Background
The traditional SMA, SMB, SMC product is of a two-piece type frame structure, the packaging stress of the product is high, the early failure rate of the product is high, and the reliability of the product cannot be guaranteed;
specifically, as shown in fig. 3, in the prior art, the chip in the two-piece frame structure is directly welded with the upper frame and the lower frame, the frames need to be bent into the foot shape in the figure by a mold before the product is formed, mechanical stress can be generated in the bending forming process of the mold, and the thermal stress of thermal expansion and contraction during welding use is easy to cause early failure of the product.
Disclosure of Invention
In view of the drawbacks of the prior art, an object of the present utility model is to provide a low stress patch package structure.
The low-stress patch packaging structure is used for packaging chips and comprises a packaging frame and a jumper wire, wherein the packaging frame comprises a first U-shaped frame and a second U-shaped frame, and the opening end of the first U-shaped frame is opposite to the opening end of the second U-shaped frame;
one end of the jumper wire is welded to the lower surface of the upper end of the second U-shaped frame, the other end of the jumper wire extends downwards to form a bending part, and extends in the direction close to the first U-shaped frame by taking the bending part as a starting point until the other end of the jumper wire is positioned right below the upper end of the first U-shaped frame to form a packaging part;
the upper end of the chip is welded to the lower surface of the upper end of the first U-shaped frame, and the lower end of the chip is welded to the upper surface of the packaging part.
Preferably, the outer surface of the packaging frame is coated with a plating layer.
Preferably, the upper end of the first U-shaped frame, the upper end of the second U-shaped frame, the jumper wire and the chip are all wrapped in the adhesive and are encapsulated by the adhesive.
Preferably, the adhesive comprises an epoxy adhesive.
Preferably, the bending parts of the first U-shaped frame and the second U-shaped frame are rounded.
Preferably, the outer sides of the first U-shaped frame and the second U-shaped frame are frosted surfaces.
Preferably, the upper end of the first U-shaped frame and the packaging part are both sheet structures with a size larger than that of the chip.
The low-stress patch packaging structure is used for packaging chips and comprises a packaging frame and a jumper wire, wherein the packaging frame comprises a first U-shaped frame and a second U-shaped frame, and the opening end of the first U-shaped frame is opposite to the opening end of the second U-shaped frame;
one end of the jumper wire is welded to the lower surface of the upper end of the second U-shaped frame, the other end of the jumper wire extends downwards to form a bending part, and extends in the direction close to the first U-shaped frame by taking the bending part as a starting point until the other end of the jumper wire is positioned right below the upper end of the first U-shaped frame to form a packaging part;
the upper end of the chip is welded to the lower surface of the upper end of the first U-shaped frame, and the lower end of the chip is welded to the upper surface of the packaging part;
the outer surface of the packaging frame is coated with a plating layer;
the upper end of the first U-shaped frame, the upper end of the second U-shaped frame, the jumper wire and the chip are all wrapped in the adhesive and are encapsulated by the adhesive;
the adhesive comprises an epoxy resin adhesive;
the bending parts of the first U-shaped frame and the second U-shaped frame are rounded;
the outer sides of the first U-shaped frame and the second U-shaped frame are frosted surfaces;
the upper end of the first U-shaped frame and the packaging part are of sheet-shaped structures with the size larger than that of the chip.
Compared with the prior art, the utility model has the following beneficial effects:
the utility model has simple structure and convenient operation, adopts the jumper structure to replace the scheme of bending the frame in the prior art, solves the technical problem of mechanical stress generated by bending in the subsequent forming and bending process, and enables the chip to buffer through the welding area at the tail part of the jumper so as to reduce the mechanical stress suffered by the chip.
Drawings
Other features, objects and advantages of the present utility model will become more apparent upon reading of the detailed description of non-limiting embodiments, given with reference to the accompanying drawings in which:
FIG. 1 is a schematic diagram of the overall structure of the present utility model;
FIG. 2 is a schematic top view of the present utility model;
fig. 3 is a schematic structural view of a two-piece frame structure in the prior art.
The figure shows:
adhesive 4 for packaging frame 1
First solder paste 2-1 chip 5
Second solder paste 2-2 plating layer 6
Jumper 3
Detailed Description
The present utility model will be described in detail with reference to specific examples. The following examples will assist those skilled in the art in further understanding the present utility model, but are not intended to limit the utility model in any way. It should be noted that variations and modifications could be made by those skilled in the art without departing from the inventive concept. These are all within the scope of the present utility model.
The utility model discloses a low-stress patch packaging structure, which replaces the frame bending scheme in the prior art by a jumper packaging scheme, solves the technical problem of mechanical stress generated by bending in the subsequent forming and bending process, and enables a chip to be buffered through a jumper tail welding area, thereby reducing the mechanical stress to which the chip is subjected.
According to the low-stress patch packaging structure provided by the utility model, as shown in fig. 1 and 2, the low-stress patch packaging structure is used for packaging a chip 5 and comprises a packaging frame 1 and a jumper wire 3, wherein the packaging frame 1 comprises a first U-shaped frame and a second U-shaped frame, and the opening end of the first U-shaped frame is opposite to the opening end of the second U-shaped frame; one end of the jumper wire 3 is welded on the lower surface of the upper end of the second U-shaped frame, the other end of the jumper wire 3 extends downwards to form a bending part, and extends in the direction close to the first U-shaped frame by taking the bending part as a starting point until the other end of the jumper wire 3 is positioned right below the upper end of the first U-shaped frame to form a packaging part;
the upper end of the chip 5 is welded to the lower surface of the upper end of the first U-shaped frame, and the lower end of the chip 5 is welded to the upper surface of the packaging part; as shown in fig. 1, the chip 5 is soldered between the lower surface of the upper end of the first U-shaped frame and the upper surface of the package portion by a first solder paste 2-1, and one end of the jumper 3 is soldered to the lower surface of the upper end of the second U-shaped frame by a second solder paste 2-2.
Through the technical means at the lower surface welding jumper wire 3 of second U type frame upper end, compare in prior art and carry out welded scheme to the chip through the frame of bending, can effectively reduce the effect of the mechanical stress that the chip received, packaging stress is little, and the reliability is high, effectively improves the chip yields. Meanwhile, the flexible switching of the packaging scheme can be realized by the technical means of packaging the jumper wire 3, and 1 or more chips 5 can be stacked in the same packaging appearance.
Preferably, the outer surface of the packaging frame 1 is coated with a plating layer 6; the upper end of the first U-shaped frame, the upper end of the second U-shaped frame, the jumper 3 and the chip 5 are all wrapped in the adhesive 4 and are subjected to plastic package through the adhesive 4; the adhesive 4 comprises an epoxy resin adhesive; the bending parts of the first U-shaped frame and the second U-shaped frame are rounded; the outer sides of the first U-shaped frame and the second U-shaped frame are frosted surfaces; the upper end of the first U-shaped frame and the packaging part are of sheet-shaped structures with the size larger than that of the chip 5.
The process flow of the utility model sequentially comprises the steps of screen printing of a copper packaging frame 1, die bonding, dispensing on a chip 5, placing a jumper wire 3, high-temperature welding, plastic packaging by an adhesive 4, curing, finishing the processing of the low-stress patch packaging structure, and discharging after subsequent cutting, tinning, testing, printing and packaging; the screen printing technology is adopted in the packaging process, and the glue quantity can be effectively controlled.
The utility model adopts the structure, and realizes the following technical effects: a. electrical yield: more than or equal to 98 percent; (the electrical yield of the traditional two-piece frame structure is about 95 percent); b. high temperature leakage current: <50uA; (150 ℃ C./100% VR); c. the high-temperature reverse bias satisfies 150 ℃/100%VR/1000H; d. the device meets JEDECJESD22 and MIL-STD-883 related standards.
In the description of the present utility model, it should be understood that the terms "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, are merely for convenience in describing the present utility model and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present utility model.
The foregoing describes specific embodiments of the present utility model. It is to be understood that the utility model is not limited to the particular embodiments described above, and that various changes or modifications may be made by those skilled in the art within the scope of the appended claims without affecting the spirit of the utility model. The embodiments of the utility model and the features of the embodiments may be combined with each other arbitrarily without conflict.
Claims (8)
1. The low-stress patch packaging structure is used for packaging a chip (5) and is characterized by comprising a packaging frame (1) and a jumper wire (3), wherein the packaging frame (1) comprises a first U-shaped frame and a second U-shaped frame, and the opening end of the first U-shaped frame is opposite to the opening end of the second U-shaped frame;
one end of the jumper wire (3) is welded to the lower surface of the upper end of the second U-shaped frame, the other end of the jumper wire (3) extends downwards to form a bending part, and extends in the direction close to the first U-shaped frame by taking the bending part as a starting point until the other end of the jumper wire (3) is positioned right below the upper end of the first U-shaped frame to form a packaging part;
the upper end of the chip (5) is welded to the lower surface of the upper end of the first U-shaped frame, and the lower end of the chip (5) is welded to the upper surface of the packaging part.
2. The low stress patch package structure according to claim 1, wherein the outer surface of the package frame (1) is coated with a plating layer (6).
3. The low-stress patch package structure according to claim 1, wherein the upper end of the first U-shaped frame, the upper end of the second U-shaped frame, the jumper (3) and the chip (5) are all wrapped in the adhesive (4) and are encapsulated by the adhesive (4).
4. A low stress patch package structure according to claim 3, wherein the adhesive (4) comprises an epoxy adhesive.
5. The low-stress patch package structure of claim 1, wherein the first U-shaped frame has a rounded corner and the second U-shaped frame has a rounded corner.
6. The low stress patch package of claim 1, wherein the outer sides of the first and second U-shaped frames are frosted.
7. The low-stress patch package structure according to claim 1, wherein the upper end of the first U-shaped frame and the package portion are both sheet-like structures having a size larger than the chip (5).
8. The low-stress patch packaging structure is used for packaging a chip (5) and is characterized by comprising a packaging frame (1) and a jumper wire (3), wherein the packaging frame (1) comprises a first U-shaped frame and a second U-shaped frame, and the opening end of the first U-shaped frame is opposite to the opening end of the second U-shaped frame;
one end of the jumper wire (3) is welded to the lower surface of the upper end of the second U-shaped frame, the other end of the jumper wire (3) extends downwards to form a bending part, and extends in the direction close to the first U-shaped frame by taking the bending part as a starting point until the other end of the jumper wire (3) is positioned right below the upper end of the first U-shaped frame to form a packaging part;
the upper end of the chip (5) is welded to the lower surface of the upper end of the first U-shaped frame, and the lower end of the chip (5) is welded to the upper surface of the packaging part;
the outer surface of the packaging frame (1) is coated with a plating layer (6);
the upper end of the first U-shaped frame, the upper end of the second U-shaped frame, the jumper (3) and the chip (5) are all wrapped in the adhesive (4) and are encapsulated by the adhesive (4);
the adhesive (4) comprises an epoxy resin adhesive;
the bending parts of the first U-shaped frame and the second U-shaped frame are rounded;
the outer sides of the first U-shaped frame and the second U-shaped frame are frosted surfaces;
the upper end of the first U-shaped frame and the packaging part are of sheet-shaped structures with the size larger than that of the chip (5).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202320923254.5U CN219800839U (en) | 2023-04-21 | 2023-04-21 | Low-stress patch packaging structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202320923254.5U CN219800839U (en) | 2023-04-21 | 2023-04-21 | Low-stress patch packaging structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN219800839U true CN219800839U (en) | 2023-10-03 |
Family
ID=88154403
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202320923254.5U Active CN219800839U (en) | 2023-04-21 | 2023-04-21 | Low-stress patch packaging structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN219800839U (en) |
-
2023
- 2023-04-21 CN CN202320923254.5U patent/CN219800839U/en active Active
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| GR01 | Patent grant |