CN219740344U - Driving circuit taking NMOS as ideal diode - Google Patents
Driving circuit taking NMOS as ideal diode Download PDFInfo
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- CN219740344U CN219740344U CN202320918414.7U CN202320918414U CN219740344U CN 219740344 U CN219740344 U CN 219740344U CN 202320918414 U CN202320918414 U CN 202320918414U CN 219740344 U CN219740344 U CN 219740344U
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- 238000012827 research and development Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000002457 bidirectional effect Effects 0.000 description 1
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Abstract
The utility model discloses a driving circuit taking NMOS as an ideal diode, which comprises an NMOS tube used as the ideal diode and a driving circuit of the NMOS tube, wherein the source electrode of the NMOS tube is used as the positive end of the ideal diode and is connected with a power supply VCC, the drain electrode of the NMOS tube is used as the negative end of the ideal diode and is connected with a load, the power supply VCC supplies power to the load through the NMOS tube, and the grid electrode of the NMOS tube is connected with the driving circuit to enable the NMOS tube to work in the ideal diode state. The NMOS is used as an ideal diode and driven by the output of the comparator, so that the current reversal of a load end can be stopped, a power supply circuit and equipment are protected, and the reliability and the safety are greatly improved. The comparator power supply adopts a square wave circuit and a charge pump booster circuit to realize high-side driving of the NMOS tube, and has simple circuit structure and high cost performance.
Description
Technical Field
The utility model belongs to the technical field of electronic circuits, and particularly relates to a driving circuit taking NMOS as an ideal diode.
Background
A diode is an electronic component having two electrodes and allowing current to flow only in a single direction, and the most common function of a diode is to allow current to flow only in a single direction and to block current flow in the reverse direction, which is widely used in electronic circuit design.
The forward conduction voltage drop of the general diode is about 0.7 volt, and when the conduction current is relatively large, the conduction voltage drop can generate relatively large power consumption power, so that the diode is heated and loses efficacy. Therefore, developing an ideal diode is always the direction of efforts of the researchers, namely, the ideal diode has forward conduction and reverse cut-off functions, and meanwhile, the forward conduction voltage drop reaches an ideal state and is close to zero, so that the heating power consumption is greatly reduced. But limited by the nature of the materials, no ideal diode has been developed.
In the existing electronic components, compared with diodes, the MOS switch tube or other active controllable switch devices have quite low conduction voltage drop, which is usually several tenths of the conduction voltage drop of the diodes, and are often used in some application scenes with large conduction current, so that the problems of high self power consumption and large heat productivity in most application scenes are solved, and therefore, in many application scenes, the diode function can be realized by using the MOS switch tube, but because the MOS switch tube is a bidirectional device, when in circuit design, in order to control the current flow direction in the MOS switch tube, a proper control strategy needs to be adopted. And an auxiliary driving source is needed to be additionally arranged on a common NMOS tube. Therefore, in practical application, research and development of a circuit for realizing an ideal diode function by using an NMOS tube becomes a research and development target of people.
Disclosure of Invention
The utility model aims to provide a driving circuit taking NMOS as an ideal diode, which has the characteristics of high reliability, high safety and high cost performance.
In order to solve the problems, the utility model adopts the following technical scheme:
the driving circuit comprises an NMOS tube used as an ideal diode and a driving circuit of the NMOS tube, wherein the source electrode of the NMOS tube is used as the positive end of the ideal diode and is connected with a power supply VCC, the drain electrode of the NMOS tube is used as the negative end of the ideal diode and is connected with a load, the power supply VCC supplies power to the load through the NMOS tube, the grid electrode of the NMOS tube is connected with the driving circuit to enable the NMOS tube to work in an ideal diode state, the input end of the driving circuit is connected with the power supply VCC, the output end of the driving circuit is connected with the grid electrode of the NMOS tube, the driving circuit comprises a boost DC-DC conversion circuit and a comparator circuit, the output voltage of the boost DC-DC conversion circuit is larger than the driving voltage Vgs of the NMOS tube, the output voltage of the boost DC-DC conversion circuit of the driving voltage drives the NMOS tube through the comparator circuit, and the comparator circuit is used for preventing the NMOS tube used as the ideal diode from being reversely conducted.
Further, the boost DC-DC conversion circuit comprises a square wave generating circuit and a charge pump boost circuit, wherein the output end of the square wave generating circuit is connected with the input end of the charge pump boost circuit, and the power supply of the square wave generating circuit is a power supply VCC.
Furthermore, the boost DC-DC conversion circuit further comprises a resistance-capacitance filter circuit, wherein the input end of the resistance-capacitance filter circuit is connected with the output end of the charge pump boost circuit, and the output end of the resistance-capacitance filter circuit is connected with the input end of the comparator circuit.
Preferably, the comparator circuit includes an operational amplifier IC1, a resistor R2, a resistor R3, a resistor R6, a resistor R7, a resistor R8, a capacitor C6 and a regulator tube DZ1, wherein the negative terminal of the regulator tube DZ1 is connected with the output terminal of the resistance-capacitance filter circuit through the resistor R3, while the negative terminal of the regulator tube DZ1 is connected with the positive terminal of the operational amplifier IC1, while the positive terminal of the regulator tube DZ1 is connected with the negative terminal of the power supply of the operational amplifier IC1, while the positive terminal of the regulator tube DZ1 is connected with a power supply VCC, the regulator tube DZ1 provides a stable working power supply for the operational amplifier IC1, the capacitor C6 is connected between the power supply VCC and the ground in parallel, the non-inverting input terminal of the operational amplifier IC1 is connected with the power supply VCC through the resistor R7, while the output terminal of the operational amplifier IC1 is connected with the grid of the NMOS through the resistor R6, and the inverting input terminal of the operational amplifier IC1 is connected with the power supply Vo of the load through the resistor R8.
Preferably, the square wave generating circuit includes a capacitor C1, a capacitor C5, an operational amplifier IC2, a resistor R4, a resistor R5, a resistor R10, a resistor R11 and a resistor R12, where the positive end of the power supply of the operational amplifier IC2 is connected to a power VCC, the negative end of the power supply of the operational amplifier IC2 is grounded, the non-inverting input end of the operational amplifier IC2 is connected to a series node of the resistor R5 and the resistor R10, the inverting input end of the operational amplifier IC2 is grounded through the capacitor C5, the output end of the operational amplifier IC2 is connected to the non-inverting input end of the operational amplifier IC2 through the resistor R4, the resistor R5 is connected to the resistor R10 in series and then connected between the power VCC and the ground, a reference voltage is provided for the non-inverting input end of the operational amplifier IC2, the resistor R11 is connected to the non-inverting input end of the operational amplifier IC2 and the power VCC after the resistor R12 is connected in series, and the series connection node of the resistor R11 and the resistor R12 is connected to the output end of the operational amplifier IC 2.
Preferably, the charge pump boost circuit includes a capacitor C2, a capacitor C4 and a high-speed switching diode D1, where one end of the capacitor C4 is connected to an output end of the square wave generating circuit, the other end of the capacitor C4 is connected to a two-diode series node of the high-speed switching diode D1, an input end of the high-speed switching diode D1 is connected to a power VCC, an output end of the high-speed switching diode D1 is connected to an input end of the rc filter circuit, and the capacitor C2 is connected in parallel between the input end and the output end of the high-speed switching diode D1.
Preferably, the high-speed switching diode D1 is BAV99.
Preferably, the rc filter circuit includes a resistor R1 and a capacitor C3, where the resistor R1 and the capacitor C3 are connected in series and then connected between the output terminal of the charge pump booster circuit and the power VCC, and the capacitor C3 is connected to the power VCC.
Preferably, the power supply VCC has an operating range of 5-28 v.
The beneficial effects of adopting above-mentioned technical scheme to produce lie in:
the NMOS is used as an ideal diode and driven by the output of the comparator, so that the current reversal of a load end can be stopped, a power supply circuit and equipment are protected, and the reliability and the safety are greatly improved. The comparator power supply adopts a square wave circuit and a charge pump booster circuit to realize high-side driving of the NMOS tube, and has simple circuit structure and high cost performance.
Drawings
FIG. 1 is a schematic block diagram of a driving circuit employing NMOS as an ideal diode in accordance with the present utility model;
fig. 2 is a schematic diagram of a driving circuit using NMOS as an ideal diode according to the present utility model.
Detailed Description
In order to make the objects, technical solutions and advantages of the present utility model more apparent, the technical solutions of the present utility model will be clearly and completely described below with reference to specific embodiments of the present utility model and corresponding drawings. It is apparent that the described embodiments of the utility model are only some, but not all embodiments of the utility model. Accordingly, the following detailed description of the embodiments is not intended to limit the scope of the utility model, but is to be construed as providing those skilled in the art with the benefit of the teachings presented herein; all other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to fall within the scope of the utility model.
As shown in fig. 1, the utility model comprises an NMOS tube used as an ideal diode and a driving circuit of the NMOS tube, wherein the source electrode of the NMOS tube is used as the positive end of the ideal diode and is connected with a power supply VCC, the drain electrode of the NMOS tube is used as the negative end of the ideal diode and is connected with a load, the power supply VCC supplies power to the load through the NMOS tube, the grid electrode of the NMOS tube is connected with the driving circuit to enable the NMOS tube to work in the ideal diode state, the driving circuit is used for high-side driving of the NMOS tube, the input end of the driving circuit is connected with the power supply VCC, the output end of the driving circuit is connected with the grid electrode of the NMOS tube, the driving circuit comprises a boost DC-DC conversion circuit for providing driving voltage for the NMOS tube and a comparator circuit 4, the output voltage of the boost DC-DC conversion circuit is larger than the driving voltage Vgs of the NMOS tube to drive the NMOS tube, and in order to prevent the NMOS tube used as the ideal diode from being reversely conducted, and in this way, the output voltage of the boost DC-DC conversion circuit of the driving voltage is ensured not to be reversely conducted through the comparator circuit 4, and the power supply circuit and the equipment are protected.
In order to realize the driving of the NMOS under the same power supply VCC, a suitable operating voltage needs to be provided for the comparator circuit 4, so the boost DC-DC conversion circuit includes a square wave generating circuit 1 and a charge pump boost circuit 2, the output end of the square wave generating circuit 1 is connected to the input end of the charge pump boost circuit 2, and the power supply of the square wave generating circuit 1 is the power supply VCC. The voltage doubling step-up of the power supply VCC is achieved by this circuit, which in turn provides the normal operating voltage for the comparator circuit 44.
In order to ensure that the output voltage of the power supply VCC after boosting is stable, the boosting type DC-DC conversion circuit further comprises a resistance-capacitance filter circuit 3, wherein the input end of the resistance-capacitance filter circuit 3 is connected with the output end of the charge pump boosting circuit 2, and the output end of the resistance-capacitance filter circuit 3 is connected with the input end of the comparator circuit 4.
In one embodiment of the present utility model, as shown in fig. 2, the comparator circuit includes an operational amplifier IC1, a resistor R2, a resistor R3, a resistor R6, a resistor R7, a resistor R8, a capacitor C6, and a voltage regulator DZ1, wherein the negative terminal of the voltage regulator DZ1 is connected to the output terminal of the resistor-capacitor filter circuit through the resistor R3, while the negative terminal of the voltage regulator DZ1 is connected to the positive terminal of the operational amplifier IC1, while the positive terminal of the voltage regulator DZ1 is connected to the negative terminal of the operational amplifier IC1, while the positive terminal of the voltage regulator DZ1 is connected to the power supply VCC, the voltage regulator DZ1 provides a stable working power supply for the operational amplifier IC1, the capacitor C6 is connected between the power supply VCC and ground for filtering of the power supply VCC, the non-inverting input terminal of the operational amplifier IC1 is connected to the power supply VCC through the resistor R7, while the output terminal of the operational amplifier IC1 is connected to the output terminal of the operational amplifier IC1 through the resistor R2, and when the non-inverting input voltage of the operational amplifier IC1 is equal to the non-inverting input voltage of the non-inverting amplifier IC1, the inverting input voltage of the non-inverting amplifier circuit is equal to the input voltage of the non-inverting amplifier circuit v.
As a preferred embodiment of the present utility model, the square wave generating circuit includes a capacitor C1, a capacitor C5, an operational amplifier IC2, a resistor R4, a resistor R5, a resistor R10, a resistor R11 and a resistor R12, wherein the power supply positive terminal of the operational amplifier IC2 is connected with a power supply VCC, the power supply negative terminal of the operational amplifier IC2 is grounded, the non-inverting input terminal of the operational amplifier IC2 is connected with a series node of the resistor R5 and the resistor R10, the inverting input terminal of the operational amplifier IC2 is grounded through the capacitor C5, the output terminal of the operational amplifier IC2 is connected with the non-inverting input terminal of the operational amplifier IC2 through the resistor R4, the resistor R5 is connected with the resistor R10 in series and then is connected between the power supply VCC and the ground, a reference voltage is provided for the non-inverting input terminal of the operational amplifier IC2, the resistor R11 is connected with the non-inverting input terminal of the operational amplifier IC2 and the power supply VCC after the resistor R12 is connected in series, and the series connection node of the resistor R11 and the resistor R12 is connected with the output terminal of the operational amplifier IC 2.
As a preferred embodiment of the present utility model, the charge pump boost circuit includes a capacitor C2, a capacitor C4, and a high-speed switching diode D1, where one end of the capacitor C4 is connected to an output end of the square wave generating circuit, the other end of the capacitor C4 is connected to a two-diode series node of the high-speed switching diode D1, an input end of the high-speed switching diode D1 is connected to a power source VCC, an output end of the high-speed switching diode D1 is connected to an input end of the rc filter circuit, and the capacitor C2 is connected in parallel between the input end and the output end of the high-speed switching diode D1. The model of the high-speed switching diode D1 is BAV99.
As a preferred embodiment of the present utility model, the rc filter circuit includes a resistor R1 and a capacitor C3, where the resistor R1 and the capacitor C3 are connected in series and then connected between an output terminal of the charge pump booster circuit and a power supply VCC, and the capacitor C3 is connected to the power supply VCC.
For the present utility model, the power supply VCC has an operating range of 5-28 v.
Description of working principle:
the utility model is a driving circuit taking NMOS as ideal diode, the driving object is NMOS tube D2, because NMOS tube is placed on the main power output positive, the driving voltage Vgs of most NMOS is generally at least more than 5v, the utility model uses square wave generating circuit to convert the input power VCC into square wave signal, the output voltage amplitude is close to the power VCC voltage, the capacitor C4, C2 and diode D1 compose a Dikken charge pump boost circuit, the output voltage is about 2 times of the power VCC voltage (ideal), then the power VCC voltage is filtered by the resistance-capacitance filter circuit, the voltage stabilizing tube DZ1 is stabilized, the stable working voltage is output for the operational amplifier IC1 to supply power, at this moment, the boost of the IC1 supply voltage is realized, and the utility model provides for high side driving. The operational amplifier IC1 forms a comparator, and when the current flowing through the NMOS is from a source electrode to a drain electrode (under normal conditions), the comparator outputs a high level to drive the NMOS to be started; once the load current is reversed (abnormally, the load end voltage Vo is abnormally increased), the comparator outputs a low level, and the NMOS is turned off, so that the power supply VCC and power supply equipment are protected. The circuit realizes that current can only flow unidirectionally from the power supply VCC end to the load end, is equivalent to the function of a diode, and is more represented in a high-current application scene.
The driving circuit taking NMOS as an ideal diode is described in detail in the embodiment of the utility model, the specific examples are applied to illustrate the principle and implementation of the utility model, the boosting DC-DC conversion circuit, the square wave generation circuit, the charge pump boosting circuit and the like are not limited to the above embodiments, and the power supply VCC is not limited to 5-28 v according to different application scenes; the above embodiments are only for helping to understand the method of the present utility model and its core ideas; meanwhile, as those skilled in the art will have variations in the specific embodiments and application scope in accordance with the ideas of the present utility model, the present description should not be construed as limiting the present utility model in view of the above.
Claims (9)
1. A driving circuit using an NMOS as an ideal diode, characterized in that: the power supply VCC is connected with a load through the NMOS tube, the grid electrode of the NMOS tube is connected with the driving circuit to enable the NMOS tube to work in an ideal diode state, the input end of the driving circuit is connected with the power supply VCC, the output end of the driving circuit is connected with the grid electrode of the NMOS tube, the driving circuit comprises a boost DC-DC conversion circuit and a comparator circuit (4), the output voltage of the boost DC-DC conversion circuit is larger than the driving voltage Vgs of the NMOS tube, the output voltage of the boost DC-DC conversion circuit of the driving voltage drives the NMOS tube through the comparator circuit (4), and the comparator circuit (4) is used for preventing the NMOS tube used as the ideal diode from being reversely conducted.
2. A driving circuit using NMOS as ideal diode according to claim 1, wherein: the boost DC-DC conversion circuit comprises a square wave generating circuit (1) and a charge pump boost circuit (2), wherein the output end of the square wave generating circuit (1) is connected with the input end of the charge pump boost circuit (2), and the power supply of the square wave generating circuit (1) is a power supply VCC.
3. A driving circuit using NMOS as ideal diode according to claim 2, characterized in that: the boost DC-DC conversion circuit further comprises a resistance-capacitance filter circuit (3), wherein the input end of the resistance-capacitance filter circuit (3) is connected with the output end of the charge pump boost circuit (2), and the output end of the resistance-capacitance filter circuit (3) is connected with the input end of the comparator circuit (4).
4. A driving circuit using NMOS as ideal diode according to claim 3, wherein: the comparator circuit (4) comprises an operational amplifier IC1, a resistor R2, a resistor R3, a resistor R6, a resistor R7, a resistor R8, a capacitor C6 and a voltage stabilizing tube DZ1, wherein the negative end of the voltage stabilizing tube DZ1 is connected with the output end of the resistance-capacitance filter circuit (3) through the resistor R3, the negative end of the voltage stabilizing tube DZ1 is connected with the positive end of the power supply of the operational amplifier IC1, the positive end of the voltage stabilizing tube DZ1 is connected with the negative end of the power supply of the operational amplifier IC1, the positive end of the voltage stabilizing tube DZ1 is connected with a power supply VCC, the voltage stabilizing tube DZ1 provides a stable working power supply for the operational amplifier IC1, the capacitor C6 is connected between the power supply VCC and the ground in parallel, the non-inverting input end of the operational amplifier IC1 is connected with the power supply VCC through the resistor R7, the output end of the operational amplifier IC1 is connected with the grid of an NMOS tube through the resistor R6, and the inverting input end of the operational amplifier IC1 is connected with the power supply end of a load Vo through the resistor R8.
5. A driving circuit using NMOS as ideal diode according to claim 3, wherein: the square wave generating circuit (1) comprises a capacitor C1, a capacitor C5, an operational amplifier IC2, a resistor R4, a resistor R5, a resistor R10, a resistor R11 and a resistor R12, wherein the positive end of a power supply of the operational amplifier IC2 is connected with a power supply VCC, the negative end of the power supply of the operational amplifier IC2 is grounded, the non-inverting input end of the operational amplifier IC2 is connected with a serial node of the resistor R5 and the resistor R10, the inverting input end of the operational amplifier IC2 is grounded through the capacitor C5, the output end of the operational amplifier IC2 is connected with the non-inverting input end of the operational amplifier IC2 through the resistor R4, the resistor R5 is connected with the resistor R10 in series and then is connected between the power supply VCC and the ground, a reference voltage is provided for the non-inverting input end of the operational amplifier IC2, the serial connection node of the resistor R11 and the resistor R12 is connected with the output end of the operational amplifier IC 2.
6. A driving circuit using NMOS as ideal diode according to claim 3, wherein: the charge pump boost circuit (2) comprises a capacitor C2, a capacitor C4 and a high-speed switch diode D1, wherein one end of the capacitor C4 is connected with the output end of the square wave generating circuit (1), the other end of the capacitor C4 is connected with a two-diode series node of the high-speed switch diode D1, the input end of the high-speed switch diode D1 is connected with a power supply VCC, the output end of the high-speed switch diode D1 is connected with the input end of the resistance-capacitance filter circuit (3), and the capacitor C2 is connected between the input end and the output end of the high-speed switch diode D1 in parallel.
7. The driving circuit of claim 6, wherein the NMOS is used as an ideal diode, and wherein: the model of the high-speed switching diode D1 is BAV99.
8. A driving circuit using NMOS as ideal diode according to claim 3, wherein: the resistance-capacitance filter circuit (3) comprises a resistor R1 and a capacitor C3, the resistor R1 and the capacitor C3 are connected in series and then connected between the output end of the charge pump booster circuit (2) and a power supply VCC, and the capacitor C3 is connected with the power supply VCC.
9. A driving circuit having NMOS as an ideal diode according to any one of claims 1-8, characterized in that: the working range of the power supply VCC is 5-28 v.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202320918414.7U CN219740344U (en) | 2023-04-21 | 2023-04-21 | Driving circuit taking NMOS as ideal diode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202320918414.7U CN219740344U (en) | 2023-04-21 | 2023-04-21 | Driving circuit taking NMOS as ideal diode |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN219740344U true CN219740344U (en) | 2023-09-22 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202320918414.7U Active CN219740344U (en) | 2023-04-21 | 2023-04-21 | Driving circuit taking NMOS as ideal diode |
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| Country | Link |
|---|---|
| CN (1) | CN219740344U (en) |
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2023
- 2023-04-21 CN CN202320918414.7U patent/CN219740344U/en active Active
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