CN219718216U - Analog-to-digital converter evaluation board and analog-to-digital converter testing device - Google Patents
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Abstract
An analog-to-digital converter evaluation board and analog-to-digital converter testing apparatus, the analog-to-digital converter evaluation board includes: the device comprises a microcontroller, a signal and clock source, a differential signal conversion module and a first interface module; the signal and clock source is connected with the microcontroller and is configured to output a clock signal to the analog-to-digital converter to be tested under the control of the microcontroller and output an analog signal for testing to the differential signal conversion module; the differential signal conversion module is connected with the signal and the clock source and is configured to convert the analog signal for test from a single-ended signal form to a differential signal form and output the analog signal for test in the differential signal form to the analog-to-digital converter to be tested; the first interface module is configured to provide a signal interface to a digital signal processing board located outside the analog-to-digital converter evaluation board, and output a digital signal generated by the analog-to-digital converter to the digital signal processing board. A replacement of a different analog-to-digital converter or a replacement of a different digital signal processing board is realized.
Description
Technical Field
The present utility model relates to the field of electronic device testing technology, and in particular, to an analog-to-digital converter evaluation board and an analog-to-digital converter testing device.
Background
With the rapid development of electronics and chip manufacturing processes, analog-to-digital converters (Analog to Digital Converter, ADC) act as ports for connecting analog and digital signals, as a self-evident function. The high-performance ADC has increasingly been demanded in the field of high-end signal processing due to its high-speed and high-precision characteristics. However, due to external factors such as manufacturing errors, the actual parameters of the high performance ADC are difficult to achieve ideal values, and therefore performance testing and evaluation of the ADC are necessary.
At present, most of the international mainstream ADC test boards integrate an FPGA and a chip to be tested on one test board, and the ADC test board needs to be externally provided with a power supply, a signal source and a clock source, and a plurality of instruments are needed to be used for constructing a test platform during testing, so that the device is expensive, the operation is complex, the time is consumed and the error is easy.
Disclosure of Invention
In view of the above, an embodiment of the utility model provides an analog-to-digital converter evaluation board and an analog-to-digital converter testing device for solving at least one of the problems in the prior art.
In a first aspect, an embodiment of the present utility model provides an analog-to-digital converter evaluation board, including: the device comprises a microcontroller, a signal and clock source, a differential signal conversion module and a first interface module;
the microcontroller is connected with the signal and a clock source; the signal and clock source is configured to output a clock signal to the analog-to-digital converter to be tested under the control of the microcontroller, and output an analog signal for testing to the differential signal conversion module;
the differential signal conversion module is connected with the signal and clock source, and is configured to receive the analog signal for test, convert the received analog signal for test from a single-ended signal form into a differential signal form, and output the analog signal for test in the differential signal form to the analog-to-digital converter to be tested;
the first interface module is configured to provide a signal interface for a digital signal processing board positioned outside the analog-to-digital converter evaluation board, and output a digital signal generated by the analog-to-digital converter to be tested to the digital signal processing board; the digital signal processing board is used for processing and transmitting the digital signals.
With reference to the first aspect of the present utility model, in an optional implementation manner, the analog-to-digital converter evaluation board further includes a filter connected between the differential signal conversion module and the signal and clock source; the filter is configured to filter the test analog signal and output the filtered signal to the differential signal conversion module.
With reference to the first aspect of the present utility model, in an alternative embodiment, the signal and clock source includes an internal crystal oscillator circuit, and a frequency dividing or multiplying circuit; the internal crystal oscillator circuit is configured to provide a reference clock signal; the frequency dividing or multiplying circuit is configured to generate a clock signal of a predetermined frequency using frequency division or multiplication of the reference clock signal.
With reference to the first aspect of the present utility model, in an alternative embodiment, the microcontroller is configured to send control signals to the signal and clock source to control the signal and clock source to generate analog signals for testing of a predetermined frequency, amplitude and/or waveform type.
With reference to the first aspect of the present utility model, in an alternative embodiment, the filter includes two or more filtering units configured to filter signals of different frequency ranges of the test analog signal, respectively.
With reference to the first aspect of the present utility model, in an optional implementation manner, the analog-to-digital converter evaluation board further includes: and the relay module is connected between the microcontroller and the filter and is configured to select different filtering units according to control signals of the microcontroller so as to realize filtering of the test analog signals in different frequency ranges.
With reference to the first aspect of the present utility model, in an optional implementation manner, the differential signal conversion module includes a differential signal conversion chip and/or a transformer, and the differential signal conversion chip and/or the transformer are configured to convert a single-ended signal into a differential signal.
In a second aspect, an embodiment of the present utility model provides an analog-to-digital converter testing apparatus, including an analog-to-digital converter evaluation board and a digital signal processing board; the analog-to-digital converter evaluation board is any one of the analog-to-digital converter evaluation boards; the digital signal processing board is configured to process and transmit the digital signals generated by the analog-to-digital converter to be tested.
With reference to the second aspect of the present utility model, in an alternative embodiment, the digital signal processing board includes a processing chip and a second interface module that are connected to each other; the processing chip is configured to process the digital signal to obtain test data; the second interface module is configured to transmit the test data to a host computer.
With reference to the second aspect of the present utility model, in an optional implementation manner, the second interface module is further configured to receive an integrated test instruction, and send the received integrated test instruction to the microcontroller.
According to the analog-to-digital converter evaluation board and the analog-to-digital converter testing device provided by the embodiment of the utility model, the traditional ADC testing board is separated into the analog-to-digital converter evaluation board capable of being provided with the analog-to-digital converter to be tested and the digital signal processing board by adopting the first interface module, so that the test of replacing different analog-to-digital converters is realized, or the data processing and the transmission are carried out by adopting different digital signal processing boards, the performance evaluation of the analog-to-digital converter to be tested is conveniently carried out by a user according to the requirement, the cost of the testing device is reduced, the testing flexibility is improved, and the test is more convenient. By arranging the signal source and the clock source on the analog-digital converter evaluation board, an analog signal source and an on-board clock source are provided for the analog-digital converter to be tested, so that the use of an external signal source and an external clock source is avoided, and the testing device and the testing steps are simplified. By arranging the filter on the analog-to-digital converter evaluation board, the use of an external filter is avoided, and the testing device and the testing steps are further simplified.
Additional aspects and advantages of the utility model will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the utility model.
Drawings
The accompanying drawings, which are included to provide a further understanding of the utility model and are incorporated in and constitute a part of this specification, illustrate embodiments of the utility model and together with the description serve to explain the utility model and do not constitute a limitation on the utility model. In the drawings:
fig. 1 is a schematic structural diagram of an analog-to-digital converter evaluation board according to an embodiment of the present utility model;
fig. 2 is a schematic diagram of a second structure of an analog-to-digital converter evaluation board according to an embodiment of the utility model;
fig. 3 is a schematic diagram of an analog-to-digital converter evaluation board according to an embodiment of the utility model;
fig. 4 is a schematic structural diagram of an analog-to-digital converter testing apparatus according to an embodiment of the utility model.
Detailed Description
In order to make the technical solution and the beneficial effects of the present utility model more obvious and understandable, the technical solution in the embodiments of the present utility model will be clearly and completely described by way of example only, and it is apparent that the described embodiments are only some embodiments of the present utility model, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this utility model belongs. The terminology used in the description of the utility model herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the utility model.
It will be understood that the terms first, second, etc. as used herein may be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another element. For example, a first resistance may be referred to as a second resistance, and similarly, a second resistance may be referred to as a first resistance, without departing from the scope of the utility model. Both the first resistor and the second resistor are resistors, but they are not the same resistor. When "first" is described, it does not necessarily mean that "second" is present; and when "second" is discussed, it does not necessarily indicate that the utility model necessarily resides in a first element, component, region, layer or section. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. The meaning of "a plurality of" is two or more, unless specifically defined otherwise. It will be further understood that the terms "comprises" and "comprising," when used in this specification, specify the presence of stated features, but do not preclude the presence or addition of one or more other features. As used herein, the term "and/or" includes any and all combinations of the associated listed items.
It is to be understood that in the context of the present utility model, "connected" means that the connected end and the connected end have electrical signals or data transferred therebetween, and may be understood as "electrically connected", "communicatively connected", etc. In the context of the present utility model, "a is directly connected to B" means that no other components than wires are included between a and B.
An embodiment of the present utility model provides an analog-to-digital converter evaluation board, referring to fig. 1, including a microcontroller 110, a signal and clock source 120, a differential signal conversion module 130, and a first interface module 140.
The microcontroller 110 is connected to the signal and clock source and is configured to control the signal and clock source to generate a clock signal of a predetermined frequency and a predetermined analog signal for testing. The microcontroller 110 acts as a control module for the signal and clock sources. The microcontroller 110 stores a control program capable of controlling the signal and the clock source to generate a clock signal of a predetermined frequency and a predetermined analog signal for test. Alternatively, the microcontroller 110 has a program erasable function, by programming a different control program into the microcontroller 110 to generate the programmable clock signal. Therefore, the purpose of flexibly adjusting the clock signal according to the test requirement can be achieved, and the applicability of the evaluation board is improved. Optionally, the frequency of the clock signal is adjustable. The microcontroller 110 may employ various architectures such as a PIC single-chip microcomputer, ARM, 8051 single-chip microcomputer, AVR microcontroller, or MSP microcontroller, etc.
The signal and clock source 120 is configured to generate a clock signal under control of the microcontroller, which is output to the analog-to-digital converter under test. During testing, the signal and clock source 120 is electrically connected to the analog-to-digital converter and microprocessor under test. The analog-to-digital converter 10 to be measured is, for example, an ADC chip. The signal and clock source 120 includes internal crystal oscillator circuitry and a clock generation chip. The crystal oscillator circuit provides a reference clock source for the clock generation chip and provides a clock signal with a predetermined frequency for the analog-to-digital converter 10 to be tested. The clock signal is a programmable clock signal under the control of the microcontroller. The clock generation chip comprises a frequency division or frequency multiplication circuit, and the clock generation chip is controlled to output a clock with a preset frequency by dividing or frequency multiplying the internal crystal oscillator. Optionally, the frequency dividing or multiplying circuit is a phase-locked loop circuit. Optionally, the analog-to-digital converter to be tested 10 is disposed on the analog-to-digital converter evaluation board, or the analog-to-digital converter to be tested 10 is connected with the analog-to-digital converter evaluation board through an interface.
The signal and clock source 120 is further configured to generate a test analog signal, and output the test analog signal to the differential signal conversion module. Alternatively, the generation of the analog signal is achieved using a direct frequency synthesis technique (DDS). The microcontroller 110 is configured to send control signals to the signal and clock source to control the signal and clock source 120 to generate test analog signals of predetermined parameters such as predetermined frequencies, amplitudes, or waveform types. Optionally, the analog signal is a fixed frequency analog signal. Waveform types may include: triangular, rectangular, saw tooth, etc.
The microcontroller 110 is connected with the signal and the clock source 120 through various serial ports or general purpose input/output ports (GPIOs), and configures the signal and the clock source 120 chip to realize output with different amplitudes and frequencies. A serial port, such as a synchronous serial bus interface (SPI), is a high-speed, full duplex, synchronous communication bus interface, operating at a rate of up to 100MHz.
By providing the analog signal source and the on-board clock source 120 on the analog-to-digital converter evaluation board, the analog signal source and the on-board clock source are provided for the analog-to-digital converter 10 to be tested, avoiding the use of external signal sources and clock sources, and simplifying the testing device and the testing steps. By providing the filter 150 on the analog-to-digital converter evaluation board, the use of an external filter is avoided, further simplifying the testing device and testing steps.
The differential signal conversion module 130 is connected to the clock source 120, and is configured to receive the analog signal for test, convert the received analog signal for test from a single-ended signal form to a differential signal form, and output the analog signal for test in the differential signal form to the analog-to-digital converter to be tested. In the embodiment of the utility model, the analog-to-digital converter 10 to be tested is tested by adopting the differential signal, and the differential signal has stronger common-mode interference resistance, so that on one hand, the interference resistance during testing can be improved, on the other hand, the increase of the second harmonic of the result converted by the analog-to-digital converter 10 to be tested can be avoided, the signal-to-noise ratio is reduced, and finally the testing accuracy is improved. For this purpose, the differential signal conversion module 130 is used to convert the single-ended signal from the signal and clock source 120 into a differential signal. The differential signal conversion module 130 includes an unbalanced transformer circuit, a differential amplifier chip, and a balanced transformer coupling circuit. The differential amplifier chip model is, for example, ADA4927. The unbalanced transformer circuit adopts a transformer to realize the conversion from a single-ended signal to a differential signal. The primary coil of the transformer receives the input of the single-ended signal, and the secondary coil adopts a center tap or double-wire parallel winding mode to convert the single-ended signal into differential signals with the same amplitude and opposite phases. The balance transformer coupling circuit is used for combining the differential amplifier chip and the unbalanced transformer circuit to realize the conversion from a single-ended signal to a differential signal.
The analog-to-digital converter evaluation board further comprises a first interface module 140 configured to provide a signal interface to a digital signal processing board located outside the analog-to-digital converter evaluation board, outputting digital signals generated by the analog-to-digital converter to be tested to the digital signal processing board. The digital signal processing board is used for processing and transmitting digital signals. The first interface module 140 is a high-speed digital interface. Optionally, the first interface module employs a FMC (FPGA Mezzanine Card) interface. The FMC interface is a high-speed board card interface applied to the FPGA and supports single-ended and differential signal transmission rates up to 2 Gb/s. Optionally, the first interface module adopts a parallel LVDS (Low Voltage Differential Signaling) or JESD204B interface. The parallel LVDS interface adopts a differential transmission mode, and data is transmitted in a plurality of channels simultaneously. The transmission line is a plurality of parallel lines, and a part of data can be transmitted on each line. Data can be transmitted at a low voltage and a high speed. Has the advantages of high-speed transmission, strong power supply noise suppression capability, high-reliability data transmission realization and the like
The JESD204B interface supports multiple devices and channels on the same data line and provides fast rate and accurate synchronization. The data transmission speed can reach more than 10Gbps, high-speed data transmission can be realized, multi-channel signal transmission is supported, and high-precision synchronous optimization performance can be provided. The JESD204B interface has higher data transfer speeds and lower latency and provides higher data integrity and reliability.
The traditional ADC test board is divided into the analog-digital converter evaluation board and the digital signal processing board which can be provided with the analog-digital converter to be tested by adopting the first interface module 140, so that the test is carried out by replacing different analog-digital converters, or the data processing and the transmission are carried out by adopting different digital signal processing boards, the user can conveniently carry out the performance evaluation of the analog-digital converter to be tested according to the requirement, the cost of the test device is reduced, the test flexibility is improved, and the test is more convenient.
The working process of the analog-digital converter evaluation board is as follows: after receiving the control signal input by the user, the microcontroller 110 generates a preset clock signal and a test analog signal with the clock source 120. The control signal and clock source 120 outputs a clock signal to the analog-to-digital converter 10 under test. Since the embodiment of the utility model adopts the differential signal for testing, the signal in the single-ended form of the analog signal for testing is output to the differential signal conversion module 130, the differential signal conversion module 130 converts the single-ended signal into the differential signal, and the differential signal is used as the test signal and output to the analog-to-digital converter 10 to be tested. The analog-to-digital converter 10 to be tested converts the analog signal for test into a digital signal and outputs the digital signal so as to process the digital signal and test, calibrate and evaluate the analog-to-digital converter 10 to be tested.
Referring to fig. 2, in an embodiment of the present utility model, the analog-to-digital converter evaluation board further includes a filter 150 connected between the signal and clock source 120 and the differential signal conversion module 130. The filter is configured to filter the test analog signal and output the filtered signal to the differential signal conversion module. The filter is capable of filtering out unwanted out-of-band signals, preventing these signals from aliasing on the target signal. Optionally, the filter 150 is a low-pass filter for filtering high-frequency noise. The filtered analog signal may be used directly as an analog input to the analog-to-digital converter to be evaluated. Optionally, the filter 150 includes more than two filtering units for filtering analog signals in different frequency ranges.
As shown in fig. 3, the analog-to-digital converter evaluation board further comprises a relay module 160 connected between the microcontroller and the filter 150, configured to switch according to the control signal of the microcontroller 110, and select different filtering units to implement filtering of signals of different frequency ranges. The relay module 160 includes one or more relays, the number of which is set as needed.
The working process of the analog-digital converter evaluation board is as follows: after receiving the control signal input by the user, the microcontroller 110 generates a preset clock signal and a test analog signal with the clock source 120. The control signal and clock source 120 outputs a clock signal to the analog-to-digital converter 10 to be tested, and outputs an analog signal for testing to the filter 150. Since the embodiment of the utility model adopts the differential signal for testing, the single-ended signal output by the filter 150 is output to the differential signal conversion module 130, and the differential signal conversion module 130 converts the analog signal for testing from the single-ended signal form to the differential signal form and outputs the signal to the analog-to-digital converter 10 to be tested.
The filter 150 includes two or more filtering units for filtering analog signals in different frequency ranges, respectively. When the test analog signal includes more than two different frequency ranges, the microcontroller controls the switch of the relay module 160 to select the corresponding filtering unit for filtering according to the signal frequency of the analog signal. Filtered and output to the differential signal conversion module 130. The differential signal conversion module 130 converts the received analog signal for test from a single-ended signal to a differential signal, and outputs the differential signal as the analog signal for test to the analog-to-digital converter 10 to be tested. The analog-to-digital converter to be tested 10 converts the analog signal for testing into a digital signal and outputs the digital signal for processing and testing, calibrating and/or evaluating the analog-to-digital converter to be tested 10.
By arranging the filter on the analog-to-digital converter evaluation board, the use of an external filter is avoided, the testing device and the testing steps are further simplified, and the testing cost and the testing time are reduced.
In an embodiment of the present utility model, an external signal source may also be used to provide a test analog signal for the analog-to-digital converter 10 to be tested. An external clock source is used to provide a clock signal to the analog-to-digital converter 10 under test.
Referring to fig. 4, an embodiment of the present utility model further provides an analog-to-digital converter testing apparatus, which includes the above-mentioned analog-to-digital converter evaluation board 100, and a digital signal processing board 200. The analog-digital converter evaluation board 100 is connected with the digital signal processing board 200 through the first interface module 140.
The digital signal processing board 200 is configured to process and transmit the digital signals generated by the analog-to-digital converter 40 to be tested. The digital signal processing board 200 includes a processing chip 210 and a second interface module 220. After receiving the digital signal output by the analog-digital converter evaluation board 100 from the first interface module 140, the processing chip 210 performs processes such as acquisition, reading and writing, buffering, and the like on the digital signal to obtain test data. The second interface module 220 is configured to transmit test data obtained by the processing chip to the host computer 30. Alternatively, the processing chip 210 employs an FPGA chip.
Optionally, the second interface module 220 includes various serial port modules, various parallel port modules, a bluetooth module, a WIFI module, or an ethernet interface module. The serial interface module includes: TTL, RS232, RS485, USB, etc. The parallel port module comprises: SPP (Standard Parallel Port, standard parallel interface), EPP (Enhanced Parallel Port, enhanced parallel interface), ECP (Extended Capabilities Port, extended parallel interface).
The upper computer 30 is used for processing and storing the acquired digital signal of the analog-to-digital converter 10 to be tested, and testing, calibrating and evaluating the analog-to-digital converter to be tested. The upper computer 30 may be an industrial personal computer, a tablet computer, etc. The second interface module 220 is further configured to receive an integrated test instruction and transmit the integrated test instruction received from the host computer 30 to the microcontroller. The test instructions include test instructions, calibration instructions, and/or evaluation instructions.
The test contents of the analog-to-digital converter 10 to be tested include: connectivity testing, functional testing, and parametric testing. Connectivity testing includes detecting if a pin has an open circuit, a short to ground, a short to power, etc. Functional testing involves detecting whether the function and performance of the chip are consistent with the description of the chip. The parameter test is used for verifying whether the chip index meets the requirements of a device manual.
Parameters of the ADC chip include static parameters and dynamic parameters. For static parameters, the test is performed at low frequencies, while dynamic parameters are tested at relatively high frequencies. Static parameters of the ADC chip include integral nonlinearity (Integral Nonlinearity, INL), differential nonlinearity (Differential Nonlinearity, DNL), full scale error, gain error, etc. The test may be performed by inputting a known signal, such as a low frequency ramp signal. The dynamic parameters of the ADC chip include sampling rate, period error, total harmonic distortion (Total Harmonic Distortion, THD), etc. The test can be performed by inputting high-frequency sine waves, square waves, pulses and the like.
Calibration of the analog-to-digital converter 10 to be measured includes intra-channel calibration and inter-channel calibration. The in-channel calibration mainly comprises capacitance mismatch, interstage gain, offset calibration of a comparator and the like. The time-interleaved analog-to-digital converter comprises a plurality of sub-channels which work in parallel. Inter-channel calibration includes calibration for offset mismatch (offset mismatch), gain mismatch (gain mismatch), and sampling time mismatch (time-skew mismatch), and the like. Taking the ADC core as an example, the calibration of the analog-to-digital converter 10 to be tested further includes inter-chip mismatch calibration of multiple ADC chips, where the inter-chip mismatch is substantially similar to the channel mismatch, including inter-chip offset mismatch, inter-chip gain mismatch, and inter-chip sampling time mismatch.
The evaluation of the analog-to-digital converter 10 to be measured includes measurement errors and signal-to-noise ratio. The measurement error is the deviation between the measured value and the true value of the ADC output. Evaluating the measurement error may be by testing the ADC using known analog signals and comparing the test result to a true value. The signal-to-noise ratio refers to the ratio between the effective value of the ADC output signal and the amount of noise. The signal-to-noise ratio can be estimated using FFT (fast fourier transform) or the like.
The method for testing, calibrating and evaluating the analog-to-digital converter to be tested comprises the following steps:
the analog-to-digital converter 40 to be tested is initialized, the power supply and system clock are determined according to the use manual, registers are configured, and parameters such as channel selection, sampling rate, conversion resolution, trigger selection and the like are set. After the analog-to-digital converter to be tested is stable, the initialization is completed if no error or fault exists.
Subsequently, the upper computer 30 sends instructions for testing, calibrating and/or evaluating to the analog-to-digital converter to be tested, and reads back the data sampled by the analog-to-digital converter to be tested 10 for testing, calibrating and/or evaluating parameters.
Optionally, the first interface module and the second interface module adopted by the analog-to-digital converter evaluation board and the analog-to-digital converter testing device provided by the embodiment of the utility model are high-speed interface modules, so that the analog-to-digital converter evaluation board and the analog-to-digital converter testing device can be suitable for testing high-speed high-precision analog-to-digital converters, the sampling time of the high-speed high-precision analog-to-digital converters is less than 1 microsecond, the conversion rate reaches 2.5GSPS, and the resolution reaches 24 bits.
The technical features of the above-described embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above-described embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples illustrate only a few embodiments of the utility model, which are described in detail and are not to be construed as limiting the scope of the utility model. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the utility model, which are all within the scope of the utility model. Accordingly, the scope of protection of the present utility model is to be determined by the appended claims.
Claims (10)
1. An analog-to-digital converter evaluation board, comprising: the device comprises a microcontroller, a signal and clock source, a differential signal conversion module and a first interface module;
the microcontroller is connected with the signal and a clock source; the signal and clock source is configured to output a clock signal to the analog-to-digital converter to be tested under the control of the microcontroller, and output an analog signal for testing to the differential signal conversion module;
the differential signal conversion module is connected with the signal and clock source, and is configured to receive the analog signal for test, convert the received analog signal for test from a single-ended signal form into a differential signal form, and output the analog signal for test in the differential signal form to the analog-to-digital converter to be tested;
the first interface module is configured to provide a signal interface for a digital signal processing board positioned outside the analog-to-digital converter evaluation board, and output a digital signal generated by the analog-to-digital converter to be tested to the digital signal processing board; the digital signal processing board is used for processing and transmitting the digital signals.
2. The analog-to-digital converter evaluation board of claim 1, further comprising a filter connected between the differential signal conversion module and the signal and clock source; the filter is configured to filter the test analog signal and output the filtered signal to the differential signal conversion module.
3. The analog-to-digital converter evaluation board of claim 1, wherein the signal and clock source comprises an internal crystal oscillator circuit, and a frequency divider or multiplier circuit; the internal crystal oscillator circuit is configured to provide a reference clock signal; the frequency dividing or multiplying circuit is configured to generate a clock signal of a predetermined frequency using frequency division or multiplication of the reference clock signal.
4. The analog-to-digital converter evaluation board of claim 1, wherein the microcontroller is configured to send control signals to the signal and clock source to control the signal and clock source to generate analog signals for testing of a predetermined frequency, amplitude and/or waveform type.
5. The analog-to-digital converter evaluation board according to claim 2, wherein the filter comprises two or more filter units configured to filter signals of different frequency ranges of the analog signal for test, respectively.
6. The analog-to-digital converter evaluation board of claim 5, further comprising:
and the relay module is connected between the microcontroller and the filter and is configured to select different filtering units according to control signals of the microcontroller so as to realize filtering of the test analog signals in different frequency ranges.
7. The analog-to-digital converter evaluation board of claim 1, wherein the differential signal conversion module comprises a differential signal conversion chip and/or a transformer configured to convert a single-ended signal to a differential signal.
8. An analog-to-digital converter testing device is characterized by comprising an analog-to-digital converter evaluation board and a digital signal processing board; the analog-to-digital converter evaluation board includes the analog-to-digital converter evaluation board of any one of claims 1 to 7; the digital signal processing board is configured to process and transmit the digital signals generated by the analog-to-digital converter to be tested.
9. The analog-to-digital converter testing apparatus of claim 8, wherein said digital signal processing board comprises a processing chip and a second interface module connected to each other; the processing chip is configured to process the digital signal to obtain test data; the second interface module is configured to transmit the test data to a host computer.
10. The analog-to-digital converter testing apparatus of claim 9, wherein said second interface module is further configured to receive an integrated test instruction, and to send the received integrated test instruction to said microcontroller.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202320992841.XU CN219718216U (en) | 2023-04-27 | 2023-04-27 | Analog-to-digital converter evaluation board and analog-to-digital converter testing device |
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| CN202320992841.XU CN219718216U (en) | 2023-04-27 | 2023-04-27 | Analog-to-digital converter evaluation board and analog-to-digital converter testing device |
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| CN117375615A (en) * | 2023-10-09 | 2024-01-09 | 山海芯半导体科技(上海)有限公司 | Analog-to-digital converter (ADC) verification device |
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| CN117375615A (en) * | 2023-10-09 | 2024-01-09 | 山海芯半导体科技(上海)有限公司 | Analog-to-digital converter (ADC) verification device |
| CN117375615B (en) * | 2023-10-09 | 2024-04-30 | 山海芯半导体科技(上海)有限公司 | Analog-to-digital converter (ADC) verification device |
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