CN219718089U

CN219718089U - Power-on and/or power-off control device and electronic equipment

Info

Publication number: CN219718089U
Application number: CN202321364797.4U
Authority: CN
Inventors: 刘森; 郭林; 李西峰
Original assignee: Hefei Lianbao Information Technology Co Ltd
Current assignee: Hefei Lianbao Information Technology Co Ltd
Priority date: 2023-05-31
Filing date: 2023-05-31
Publication date: 2023-09-19
Anticipated expiration: 2033-05-31

Abstract

The application relates to a power-on and/or power-off control device and electronic equipment, which are used for constructing a control circuit connected with a control unit and a direct-current voltage source on the basis of changing a normalized electrical connection framework existing between the control unit and a power supply unit, responding to a power-on signal/a power-off signal through a switching device unit of the control circuit, correspondingly triggering on-off so as to output an enabling signal for switching on the direct-current voltage source to supply power to the control unit to the direct-current voltage source, or outputting a disabling signal for switching off the direct-current voltage source to supply power to the control unit to the direct-current voltage source, and timely adjusting electrical connection between the control unit and the power supply unit by actively responding to the power-on or power-off signal in the power-on or power-off state, thereby fully and effectively reducing power consumption of a system and improving effective power supply time.

Description

Power-on and/or power-off control device and electronic equipment

Technical Field

The application relates to the field of power electronic power supply circuit design, in particular to a power-off control device, a power-on and power-off control device and corresponding electronic equipment.

Background

In the prior art, a normalized electrical connection exists between a control unit (such as CPU, EC, MCU) and a power supply unit, and electric energy loss is caused in some states, so that power efficiency loss is caused, power consumption of a system power supply is increased, and effective power supply time is shortened.

Disclosure of Invention

The utility model aims to provide a power-down control device, a power-up control device and corresponding electronic equipment, wherein the power supply mode of a control unit is adjusted under the power-up or power-down state, so that the power consumption of a system power supply is fully and effectively reduced, and the effective power supply time is prolonged.

According to one of the schemes of the utility model, a power-off control device is provided, wherein the input side is connected with a control unit, and the output side is connected with a direct-current voltage source; the power-down control device includes:

the control circuit comprises a switching device unit connected with the control unit, and the switching device unit responds to a power-down level signal of the control unit and outputs a disabling signal for cutting off the power supply of the direct-current voltage source to the control unit to the direct-current voltage source through the on-off of the switching device.

In some embodiments, the switching device unit includes a first MOS transistor and a second MOS transistor, where a G pole of the first MOS transistor is connected to a D pole of the second MOS transistor; wherein:

the G pole of the second MOS tube is connected with a lower electric level signal of the control unit so as to be conducted by the first MOS tube in a cut-off state;

the D pole of the first MOS tube is connected with a direct-current voltage source, a forbidden energy signal for disconnecting the direct-current voltage source to supply power to the control unit is driven by the second MOS tube, and the formed leading-out end is provided with a pull-up voltage and a voltage dividing device.

According to one of the schemes of the application, an electronic device is provided, which comprises an embedded controller and a low-voltage-drop voltage stabilizer, wherein the embedded controller is powered off after power is powered down;

the electronic equipment further comprises the power-down control device; wherein:

the control unit is configured as an embedded controller of the electronic device;

the direct current voltage source is configured as a low dropout voltage regulator of the electronic device.

According to one of the schemes of the application, a power-on control device is provided, the input side is connected with a switch level signal, and the output side is connected with a direct-current voltage source and a control unit; the power-down control device includes:

the input end of the first delay circuit is connected with the switch level signal to provide a first power-on signal with a first delay time;

the input end of the second delay circuit is connected with the switch level signal, and provides a second power-on signal with a second delay time for the control unit;

the control circuit comprises a switching device unit connected with the first delay circuit and the direct-current voltage source, and the switching device unit responds to the first power-on signal and outputs an enabling signal for switching on the direct-current voltage source to supply power to the control unit through the on-off of the switching device;

The first delay circuit and the second delay circuit are configured such that the second delay time is greater than the first delay time.

the G electrode of the first MOS tube is connected with a first power-on signal, and the formed access end is provided with a pull-up voltage and a voltage dividing device;

the D pole of the first MOS tube is connected with a direct-current voltage source, an enabling signal for connecting the direct-current voltage source to supply power to the control unit is derived, and a pull-up voltage and a voltage dividing device are configured at the formed derived end;

the G pole of the second MOS tube is connected with the level signal of the control unit, and the formed access terminal is provided with a pull-up voltage and a voltage dividing device so as to keep the first MOS tube cut-off in the on state.

In some embodiments, the first delay circuit and/or the second delay circuit includes a programmable sense and reset delay monitor chip with a configurable level delay time.

According to one of the schemes of the application, an electronic device is provided, which comprises an embedded controller and a low-voltage-drop voltage stabilizer which are in a power-off state before power-on;

the electronic equipment further comprises the power-on control device; wherein:

According to one of the schemes of the application, a power-on and power-off control device is provided, wherein the input side is connected with a switch level signal and a control unit, and the output side is connected with a direct-current voltage source and the control unit; the power-on and power-off control device comprises:

the input end of the first delay circuit is connected with a switch level signal, and a first power-on signal passing through a first delay time is provided in a power-on arrival state;

the input end of the second delay circuit is connected with a switch level signal, and a second power-on signal which is subjected to second delay time is provided for the control unit in a power-on arrival state;

the control circuit comprises a switching device unit connected with the first delay circuit, the control unit and the direct-current voltage source, wherein the switching device unit responds to a first power-on signal in a power-on arrival state, outputs an enabling signal for switching on the direct-current voltage source to supply power to the control unit through the on-off of the switching device, and responds to a power-off level signal of the control unit in a power-off arrival state, and outputs a disabling signal for switching off the direct-current voltage source to supply power to the control unit to the direct-current voltage source through the on-off of the switching device;

the G electrode of the first MOS tube is connected with the output of the first delay circuit, and the formed access end is provided with a pull-up voltage and a voltage dividing device;

the D pole of the first MOS tube is connected with a direct-current voltage source;

the G pole of the second MOS tube is connected with the level signal of the control unit, and the formed access end is provided with a pull-up voltage and a voltage dividing device;

wherein:

in the power-on arrival state, the D pole of the first MOS tube derives an enabling signal for switching on a direct-current voltage source to supply power to the control unit, and the second MOS tube keeps the first MOS tube cut off in the on state;

in the power-down arrival state, the G pole of the second MOS tube is used for conducting the first MOS tube in the cut-off state, and the D pole of the first MOS tube driven by the second MOS tube is used for leading out a forbidden energy signal for cutting off the power supply of the direct current voltage source to the control unit.

According to one of the schemes of the application, the electronic equipment comprises an embedded controller and a low-voltage-drop voltage stabilizer which are in a power supply disconnection state in a shutdown state;

the electronic equipment further comprises the power-on and power-off control device; wherein:

The power-down control device, the power-up control device and the corresponding electronic equipment of various embodiments of the application are mainly characterized in that a normalized electric connection framework existing between a control unit and a power supply unit is changed, a control circuit connected with the control unit and a direct-current voltage source is constructed, the power-up control device unit of the control circuit responds to a power-up signal and a power-down signal, and correspondingly triggers on-off so as to output an enabling signal for switching on the direct-current voltage source to supply power to the control unit to the direct-current voltage source, or output a disabling signal for switching off the direct-current voltage source to supply power to the control unit to the direct-current voltage source, and in a power-up or power-down state, the electric connection between the control unit and the power supply unit is timely adjusted by actively responding to the power-up or power-down signal, so that the power consumption of a system is fully and effectively reduced, and the effective power supply time is improved.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the application, as claimed.

Drawings

In the drawings, which are not necessarily to scale, like reference numerals in different views may designate like components. Like reference numerals with letter suffixes or like reference numerals with different letter suffixes may represent different instances of similar components. The accompanying drawings generally illustrate various embodiments by way of example, and not by way of limitation, and are used in conjunction with the description and claims to explain the disclosed embodiments.

FIG. 1 shows a schematic diagram of a power down control device according to an embodiment of the present application;

fig. 2 shows a schematic circuit diagram of a power-down control device according to an embodiment of the present application, mainly showing a control circuit portion;

FIG. 3 shows an architecture diagram of a power-on control device of an embodiment of the present application;

FIG. 4 is a schematic circuit diagram of a power-on control device according to an embodiment of the present application, mainly illustrating a control circuit;

FIG. 5 is a block diagram of a power-on/power-off control device according to an embodiment of the present application;

fig. 6 shows a schematic circuit diagram of a power-on and power-off control device according to an embodiment of the present application, mainly showing a control circuit;

FIG. 7 shows a power-on control sequence of a power-on control device according to an embodiment of the present application;

FIG. 8 shows a power-down control sequence of a power-up control device according to an embodiment of the present application;

fig. 9 shows a delay sequence of powering up and down the control device according to an embodiment of the present application.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present application more clear, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present application. It will be apparent that the described embodiments are some, but not all, embodiments of the application. All other embodiments, which can be made by a person skilled in the art without creative efforts, based on the described embodiments of the present application fall within the protection scope of the present application.

In the working process of a power electronic power supply circuit of electronic equipment, normalized electrical connection exists between a control unit (such as CPU, EC, MCU and the like) and a power supply unit, and electric energy loss is caused in some states, so that power efficiency loss is caused, power consumption of a system power supply is increased, and effective power supply time is shortened.

Taking a notebook computer as an example, in a shutdown state of a battery mode, an EC (embedded control) chip of a main board of the notebook computer is still in a working state, the EC chip uses 3.3V voltage, the notebook battery is usually 13V, and the notebook battery is converted into 3.3V for supply through an LDO (low dropout regulator or low dropout linear regulator) and has about 75 percent of power consumption efficiency loss. The design increases the power consumption of the system power supply, consumes the electric quantity of the battery and reduces the standby time.

In connection with the foregoing background section, the present utility model illustratively describes corresponding solutions by way of examples to address the deficiencies of the prior art, but is not intended to limit the scope of the claimed utility model.

As one of the schemes, the embodiment of the utility model provides a power-down control device, wherein the input side is connected with a control unit, and the output side is connected with a direct-current voltage source; the power-down control device includes:

Taking fig. 1 as an example, unlike the prior art that a control unit is electrically connected with a dc voltage source in a normalized manner, the power-down control device according to the embodiment of the present utility model controls the power supply connection of the control unit and the dc voltage source, where the control circuit mainly implements response and conversion of a level signal through a switching device unit, and the switching device unit may include an independent switching device, may also include a switching device combination circuit, and may also include a combination logic circuit built by an operator, an inverter, a comparator, and other devices and an and gate circuit, so as to respond to a power-down level signal of the control unit, and output a disable signal for cutting off the power supply of the dc voltage source to the control unit to the dc voltage source through on-off of the switching device, thereby satisfying the purpose of the present utility model. The power-down level signal can be high-level trigger or low-level trigger, and the disabling signal can be low-level trigger or high-level trigger. The dc voltage source, upon receipt of a disable signal from the control circuit in response to the control unit, disconnects the power to the control unit under powered conditions, such as the "power (battery) configuration shown in fig. 1, for example, the" power "configuration shown in fig. 1.

The embodiment of the application discloses a power-down control device, which aims at changing a normalized electrical connection structure between a control unit and a power supply unit, constructing a control circuit connected with the control unit and a direct-current voltage source, and correspondingly triggering on-off through a switching device unit of the control circuit in response to a power-down signal so as to output a forbidden energy signal for disconnecting the direct-current voltage source from supplying power to the control unit to the direct-current voltage source. According to the embodiment, before the power-down state comes, no matter what working state the control unit or the electronic equipment to which the control unit belongs is in, or what power supply state the control unit and the direct-current voltage source are in, the power-down control device of the embodiment timely adjusts the electrical connection between the control unit and the power supply unit by actively responding to the power-down level signal in the power-down state, so that the control unit and the direct-current voltage source are disconnected from power supply connection after the power-down state is experienced, for example, in the non-working state, and the power consumption of a system is fully and effectively reduced, and the effective power supply time is improved.

In some embodiments, the power-down control device of the embodiment of the present application, the switching device unit includes a first MOS transistor and a second MOS transistor, where a G pole of the first MOS transistor is connected to a D pole of the second MOS transistor; wherein:

Taking a notebook computer as an example and combining fig. 2 as an example, the power-down control device of the embodiment is applied to a notebook computer architecture, the control unit is configured to take EC as an example of an infrastructure, and the direct-current voltage source is configured to take LDO as an example of an infrastructure.

The control circuit of the power-down control device of the embodiment is configured with a switching device unit, and comprises a first MOS tube N-MOS1 and a second MOS tube N-MOS2. Of course, switching devices such as P-type MOS transistors and IGBT and corresponding circuit building switching device units can be configured. Taking the first MOS transistor N-MOS1 and the second MOS transistor N-MOS2 of the embodiment as an example, the G electrode of the first MOS transistor N-MOS1 is connected to the D electrode of the second MOS transistor N-MOS2 and is supplied with a high-level signal, such as a battery voltage (typically 13V) in the illustration, and a voltage divider, such as an illustration resistor (470 Knhm) and a resistor (2 Mohm), so as to construct a driving channel for driving the first MOS transistor N-MOS1 by the second MOS transistor N-MOS2, thereby implementing dynamic response of the first MOS transistor N-MOS1 to the second MOS transistor N-MOS2. In view of the N-type MOS transistor adopted in the present embodiment, the G electrode of the second MOS transistor N-MOS2 is connected to the lower power level signal of the control unit, and the "EC control signal" is triggered by a low level as shown in the figure. The EC control signal input may provide a pull-up voltage through EC 3V3 and configure a corresponding voltage dividing resistor, e.g., resistor (470 Knhm), resistor (2 Mohm). The D pole of the first MOS transistor N-MOS1 is connected with a direct current voltage source, and is driven by the second MOS transistor N-MOS2 to lead out a forbidden energy signal for disconnecting the direct current voltage source, such as the forbidden energy signal for supplying power to a control unit by an LDO, such as the LDO forbidden energy signal, the formed lead-out end is configured with a pull-up voltage, such as the battery voltage (usually 13V), and a voltage dividing device, such as a resistor (470 Knhm) and a resistor (2 Mohm).

Under the condition that the power-down state comes, the EC control signal is pulled down, the second MOS tube N-MOS2 is closed, the G pole of the first MOS tube N-MOS1 is in a high-level state, the first MOS tube N-MOS1 is in a conducting state, the S pole of the first MOS tube N-MOS1 is used as a leading-out end to stably provide a disable signal serving as a low level for the LDO, the power-down control device of the embodiment is used for cutting off the disable signal of the LDO for supplying power to the EC, and the LDO is closed for supplying power to and outputting the EC3V3 of the EC.

As one of the schemes, in combination with the foregoing embodiments, an embodiment of the present application provides an electronic device, including an embedded controller and a low dropout regulator that disconnect power after power down;

the electronic equipment further comprises the power-down control device; wherein: the control unit is configured as an embedded controller of the electronic device; the direct current voltage source is configured as a low dropout voltage regulator of the electronic device.

By the power-down control device and the electronic equipment, the power management design scheme is effectively implemented, and in the battery mode, power supply of the EC under the shutdown state is turned off, and the LDO with the voltage of 13V converted into 3.3V is not required to be turned on, so that system power consumption is reduced, and shutdown endurance time is prolonged.

As one of the schemes, the embodiment of the utility model provides a power-on control device, wherein the input side is connected with a switch level signal, and the output side is connected with a direct-current voltage source and a control unit; the power-on control device includes:

Taking fig. 3 as an example, unlike the electrical connection between the control unit and the dc voltage source in the prior art, the power-on control device in the embodiment of the present utility model controls the power supply connection between the control unit and the dc voltage source, where the control circuit mainly implements response and conversion of a level signal through a switching device unit, and the switching device unit may include an independent switching device, may also include a switching device combination circuit, and may also include a combination logic circuit built by devices such as an arithmetic unit, an inverter, a comparator, and an and gate circuit, and aims to respond to a power-on instruction (for example, a key signal in the drawing) of the control unit, or respond to a power-on instruction (for example, a key signal in the drawing) of an electronic device served by the control unit, output, to the dc voltage source, an enable signal for turning on and off the dc voltage source to supply the control unit through on and off of the switching device, and is earlier than the start of the control unit, so as to fulfill the purposes of the present utility model. The power-on level signal can be high-level trigger or low-level trigger, and the enabling signal can be high-level trigger or low-level trigger. The dc voltage source is in a powered condition, such as the "power (battery)" configuration shown in fig. 3, and is in an off-to-EC powered condition, and upon receipt of an enable signal from the control circuit in response to a power-up signal, turns on power to the control unit, such as the "power" configuration shown in fig. 3.

The power-on control device provided by the embodiment of the application aims at changing a normalized electrical connection structure between a control unit and a power supply unit, constructing a control circuit connected with the control unit and a direct-current voltage source, responding to a power-on signal through a switching device unit of the control circuit, correspondingly triggering on-off, and outputting an enabling signal for switching on the direct-current voltage source to supply power to the control unit to the direct-current voltage source in advance compared with the enabling signal before the EC enters a normal working power supply state. Through the embodiment, even if the control unit and the direct current voltage source are in the power-off state before the power-on state comes, the power-on control device of the embodiment timely adjusts the electrical connection between the control unit and the power supply unit by actively responding to the power-on level signal in the power-on state, so that the control unit and the direct current voltage source are ensured to be connected from the power-off state to the power-on state after the power-on state is experienced, for example, the control unit and the direct current voltage source are converted from the non-working state to the non-working state, thereby fully and effectively reducing the power consumption of the system and improving the effective power supply time.

In some embodiments, the power-on control device of the embodiment of the present application, the switching device unit includes a first MOS transistor and a second MOS transistor, where a G pole of the first MOS transistor is connected to a D pole of the second MOS transistor; wherein:

Taking a notebook computer as an example and combining fig. 4 as an example, the power-on control device of the present embodiment is applied to a notebook computer architecture, the control unit is configured to take EC as an example of an infrastructure, and the dc voltage source is configured to take LDO as an example of an infrastructure.

The control circuit of the power-on control device of the embodiment is configured with a switching device unit, and comprises a first MOS tube N-MOS1 and a second MOS tube N-MOS2. Of course, switching devices such as P-type MOS transistors and IGBT and corresponding circuit building switching device units can be configured. Taking the first MOS transistor N-MOS1 and the second MOS transistor N-MOS2 of the present embodiment as an example, the G electrode of the first MOS transistor N-MOS1 is connected to the D electrode of the second MOS transistor N-MOS2, the G electrode of the first MOS transistor N-MOS1 is connected to the first power-on signal, for example, a delay signal in the drawing, and the formed access terminal is configured with a pull-up voltage and a voltage divider, for example, a battery voltage (typically 13V) in the drawing, and a voltage divider, for example, a drawing resistor (470 Knhm) and a resistor (2 Mohm). The D pole of the first MOS transistor N-MOS1 is connected to a dc voltage source (e.g., LDO shown in the figure), and derives an enable signal for turning on the dc voltage source to supply power to a control unit (e.g., EC shown in the figure), and the derived terminal is configured with a pull-up voltage and a voltage divider device, such as a battery voltage (typically 13V) in the figure, a resistor (470 Knhm), and a resistor (2 Mohm). The G pole of the second MOS transistor N-MOS2 is connected with the level signal of the control unit, and the formed access terminal is provided with a pull-up voltage and voltage dividing device, such as EC 3V3, a resistor (470 Knhm) and a resistor (2 Mohm) in the drawing, so as to keep the first MOS transistor N-MOS1 cut-off in the on state. In view of the N-type MOS transistor adopted in this embodiment, the G electrode of the second MOS transistor N-MOS2 is connected to the first power-on signal with the first delay time, and the delay signal is shown as a low level in the figure, and the first MOS transistor N-MOS1 is turned off. The LDO enable signal goes high, turning on the LDO output an EC 3V3 supply voltage that powers the control unit (EC). The pull-up voltage is provided through EC 3V3, and corresponding voltage dividing resistors, such as a resistor (470 Knhm) and a resistor (2 Mohm), are configured, and the second MOS transistor N-MOS2 is in an on state so as to maintain the first MOS transistor N-MOS1 to be turned off.

Under the condition that the power-on state comes, the first power-on signal passing through the first delay time is earlier than the second power-on signal passing through the second delay time, and the first MOS tube N-MOS1 is firstly cut off so as to actively trigger the LDO to enable, and the power supply circuit for EC is connected. Thereafter, the EC receives a second power-up signal over a second delay time, thereby entering an operational state in a power-on state by the LDO.

As an implementation manner, the power-on control device of this embodiment may be further configured to include a programmable sensing and resetting delay monitor chip with a configurable level delay time in the first delay circuit and/or the second delay circuit. In particular, in some embodiments, the first delay circuit and/or the second delay circuit may be a "TI TPS3899" model integrated circuit, for which different delay times may be configured via external pins.

As one of the schemes, in combination with the foregoing embodiment, the embodiment of the present application provides an electronic device, including an embedded controller and a low dropout regulator in a power-off state before power-up; the electronic equipment further comprises the power-on control device; wherein: the control unit is configured as an embedded controller of the electronic device; the direct current voltage source is configured as a low dropout voltage regulator of the electronic device.

By means of the power-on control device and the electronic equipment, the power management design scheme is effectively implemented, under the battery mode, power supply of the EC under the shutdown state is turned off, the 13V-to-3.3V LDO is not required to be turned on, under the power-on state, the power supply of the EC is enabled by triggering the LDO firstly, and then the EC is triggered to stably enter the working state, so that system power consumption is reduced, and shutdown duration is prolonged.

As one of the schemes, the embodiment of the application provides a power-on and power-off control device, wherein the input side is connected with a switch level signal and a control unit, and the output side is connected with a direct-current voltage source and the control unit; the power-on and power-off control device comprises:

Taking fig. 5 as an example, unlike the electrical connection between the control unit and the dc voltage source in the prior art, the power-on/off control device in the embodiment of the present utility model controls the power-on connection between the control unit and the dc voltage source, where the control circuit mainly implements response and conversion of a level signal through a switching device unit, and the switching device unit may include an independent switching device, or may include a switching device combination circuit, or may include a combination logic circuit built up by an operator, an inverter, a comparator, and an and gate circuit. The power-on or power-off level signal can be high-level trigger or low-level trigger, and the enabling or disabling signal can be high-level trigger or low-level trigger. The dc voltage source is in a powered condition, such as the "power (battery) configuration shown in fig. 5, and is in a disconnected powered EC state, and upon receipt of a disable signal from the control circuit in response to the control unit, the control circuit disconnects the power to the control unit, such as the" power "configuration shown in fig. 5, in a powered down state. In the incoming state of the power-on state, the power supply to the control unit is turned on upon receipt of an enable signal from the control circuit in response to the power-on signal, such as the "power-on" configuration shown in fig. 5.

The application provides a power-on and power-off control device, which aims at changing a normalized electrical connection framework between a control unit and a power supply unit, on one hand, constructing a control circuit connected with the control unit and a direct-current voltage source, correspondingly triggering on-off through a switching device unit of the control circuit to output a disabling signal for switching off the direct-current voltage source to supply power to the control unit to the direct-current voltage source, and correspondingly triggering on-off through the switching device unit of the control circuit to respond to the power-on signal through the control unit and the direct-current voltage source simultaneously, so that compared with the EC before entering a normal working power supply state, the enabling signal for switching on the direct-current voltage source to supply power to the control unit is output to the direct-current voltage source in advance. Through the embodiment, even if the control unit and the direct current voltage source are in the power-off state before the power-on state comes, the power-on and power-off control device of the embodiment timely adjusts the electrical connection between the control unit and the power supply unit by actively responding to the power-on level signal in the power-on state, so that the control unit and the direct current voltage source are ensured to be connected from the power-off state to the power-on state after the power-on state is experienced, for example, the control unit and the direct current voltage source are converted from the non-working state to the non-working state, thereby fully and effectively reducing the power consumption of a system and improving the effective power supply time. Before the power-down state comes, no matter what working state the control unit or the electronic equipment to which the control unit belongs is in, or what power supply state the control unit and the direct-current voltage source are in, the power-up and power-down control device in the embodiment timely adjusts the electrical connection between the control unit and the power supply unit by actively responding to the power-down level signal in the power-down state, so that the control unit and the direct-current voltage source are disconnected from power supply after the power-down state is experienced, for example, in the non-working state, the power consumption of a system is fully and effectively reduced, and the effective power supply time is improved.

In some embodiments, the power-on and power-off control device of the embodiment of the application, the switching device unit includes a first MOS transistor and a second MOS transistor, and a G pole of the first MOS transistor is connected with a D pole of the second MOS transistor; wherein:

Taking a notebook computer as an example and combining fig. 6 as an example, the power-on and power-off control device of the present embodiment is applied to a notebook computer architecture, the control unit is configured to take EC as an example of an infrastructure, and the dc voltage source is configured to take LDO as an example of an infrastructure.

The control circuit of the power-on and power-off control device of the embodiment is configured with a switching device unit, and comprises a first MOS tube N-MOS1 and a second MOS tube N-MOS2. Of course, switching devices such as P-type MOS transistors and IGBT and corresponding circuit building switching device units can be configured. Taking the first MOS transistor N-MOS1 and the second MOS transistor N-MOS2 of the embodiment as an example, the G electrode of the first MOS transistor N-MOS1 is connected to the D electrode of the second MOS transistor N-MOS2 and is supplied with a high-level signal, such as a battery voltage (typically 13V) in the illustration, and a voltage divider, such as an illustration resistor (470 Knhm) and a resistor (2 Mohm), so as to construct a driving channel for driving the first MOS transistor N-MOS1 by the second MOS transistor N-MOS2, thereby implementing dynamic response of the first MOS transistor N-MOS1 to the second MOS transistor N-MOS2. The G pole of the first MOS transistor N-MOS1 is connected with a first power-on signal, such as a delay signal in the illustration. The D pole of the first MOS transistor N-MOS1 is connected to a dc voltage source (for example, LDO in the drawing), and derives an enable/disable signal for switching on or off the dc voltage source to supply power to a control unit (for example, EC in the drawing), and the derived terminal is configured with a pull-up voltage and a voltage divider device, for example, a battery voltage (typically 13V in the drawing), a resistor (470 Knhm) and a resistor (2 Mohm). In view of the N-type MOS transistor adopted in the present embodiment, the G electrode of the second MOS transistor N-MOS2 is connected to the lower power level signal of the control unit, and the "EC control signal" is triggered by a low level as shown in the figure. The EC control signal input may provide a pull-up voltage through EC 3V3 and configure a corresponding voltage dividing resistor, e.g., resistor (470 Knhm), resistor (2 Mohm). And, under the condition that the power-on state comes, the G electrode of the second MOS tube N-MOS2 is connected with the level signal of the control unit, the formed access terminal is configured with a pull-up voltage and a voltage dividing device, such as EC 3V3, a resistor (470 Knhm) and a resistor (2 Mohm) in the drawing, so that the pull-up voltage can be provided through the EC 3V3, and a corresponding voltage dividing resistor, such as a resistor (470 Knhm) and a resistor (2 Mohm), is configured, the second MOS tube N-MOS2 forms a conducting state so as to maintain the first MOS tube N-MOS1 to be cut off, the LDO enabling signal becomes high level, and the LDO is ensured to be opened to output an EC 3V3 power supply voltage for supplying power to the control unit (EC).

In combination with the power-on control timing diagram shown in fig. 7, when the power-on state arrives, the first power-on signal after the first delay time is earlier than the second power-on signal after the second delay time, and the first MOS transistor N-MOS1 is turned off first to actively trigger the LDO to enable, and turn on the power supply circuit to the EC. Thereafter, the EC receives a second power-up signal over a second delay time, thereby entering an operational state in a power-on state by the LDO. Specifically, after the control circuit module receives the low level of the delay signal, the first MOS transistor N-MOS1 is turned off, the LDO enable signal is turned into the high level, the LDO is turned on, the EC3V3 is output, and when the EC3V3 power supply is just turned on, the EC cannot control the signal at the moment, but because of the voltage division of the resistor, the second MOS transistor N-MOS2 is turned on, the delay signal is forced into the low level, even if the delay circuit output is turned into the high level.

In combination with the power-down control timing diagram shown in fig. 8, when the power-down state comes, the EC control signal is pulled down, the second MOS transistor N-MOS2 is turned off, the G pole of the first MOS transistor N-MOS1 is in the high-level state, the first MOS transistor N-MOS1 is in the on state, the S pole of the first MOS transistor N-MOS1 is used as the output terminal to stably provide the LDO with the disable signal as the low level, so as to realize that the power-up and power-down control device of the embodiment supplies the disable signal for cutting off the power supply of the LDO to the EC, and turns off the LDO to supply the power to the EC3V3 of the EC. Specifically, when the power-off is performed, the EC pulls down the control signal, the second MOS transistor N-MOS2 is turned off, the delay signal is high level, the first MOS transistor N-MOS1 is turned on, and the LDO enable signal is changed to low level, so that the LDO output EC3V3 is turned off.

Taking the example of turning on and off the notebook computer, this embodiment is further described with reference to fig. 9,

1. when the computer is in a shutdown state, a startup key is pressed, a key signal is sent to a first delay circuit, the first delay circuit processes the key signal, ta delays, and the key low pulse signal width Tb is enlarged, and then a delay signal is output to a control circuit. The control circuit sends out an LDO enabling signal, opens the LDO and supplies power to the EC;

2. in the power-off state of the computer, the power-on key is pressed, a key signal is sent to the second delay circuit, the second delay circuit processes the key signal, tc delays, and after the key low pulse signal width Td is increased, a delay signal is output to EC for power-on action.

3. When the computer is to be shut down, after the normal shutdown is finished, the EC sends a signal to the control circuit to turn off the LDO to supply power to the computer.

The delay circuits Ta, tb, tc, and Td may be set to: ta < Tc, ensure that after EC power supply is completed, the power-on signal is received again. For example ta=6.2 ms; tb=619 ms; tc=619 ms; td=40us. A common EC chip is stable from the power supply to the time of being able to receive the power-on signal for 4.5ms, which is less than Tc-ta= 612.8ms. The delay circuit delay settings and EC chip specifications herein are merely examples, and specific examples may be adjusted according to actual electrical requirements specifications.

As an implementation manner, the power-on/power-off control device of this embodiment may be further configured to include a programmable sensing and reset delay monitor chip with a configurable level delay time in the first delay circuit and/or the second delay circuit. In particular, in some embodiments, the first delay circuit and/or the second delay circuit may be a "TI TPS3899" model integrated circuit, for which different delay times may be configured via external pins. The delay circuit of the embodiment uses the chip with simple function and extremely low power consumption. The delay chip power consumption is only 1.6uW, and the control circuit has no power consumption loss. By using the scheme of the embodiment, the power consumption of the whole computer is less than 1mW in the shutdown state, and almost no power consumption is lost; the power consumption of the notebook computer is 10mW in the power-off state of the battery mode.

As one of the schemes, in combination with the foregoing embodiment, an embodiment of the present application provides an electronic device, including an embedded controller and a low dropout regulator in a power-off state; the electronic equipment further comprises the power-on and power-off control device; wherein: the control unit is configured as an embedded controller of the electronic device; the direct current voltage source is configured as a low dropout voltage regulator of the electronic device.

By means of the power-on and power-off control device and the electronic equipment, the power management design scheme is effectively implemented, under the battery mode, power supply of the EC under the shutdown state is turned off, the 13V-to-3.3V LDO is not required to be turned on, under the power-on state, the power supply of the EC is enabled by triggering the LDO firstly, and then the EC is triggered to stably enter the working state, so that system power consumption is reduced, and shutdown duration is prolonged.

Specifically, one of the inventive concepts of the present application aims at changing a normalized electrical connection architecture existing between a control unit and a power supply unit, constructing a control circuit connected with the control unit and a direct current voltage source, correspondingly triggering on-off through a switching device unit of the control circuit in response to an on-off signal, so as to output an enabling signal for switching on the direct current voltage source to supply power to the control unit to the direct current voltage source, or outputting a disabling signal for switching off the direct current voltage source to supply power to the control unit to the direct current voltage source.

The above embodiments are only exemplary embodiments of the present application and are not intended to limit the present application, the scope of which is defined by the claims. Various modifications and equivalent arrangements of this application will occur to those skilled in the art, and are intended to be within the spirit and scope of the application.

Claims

1. The power-off control device is characterized in that an input side is connected with the control unit, and an output side is connected with a direct-current voltage source; the power-down control device includes:

2. The power-down control device according to claim 1, wherein the switching device unit comprises a first MOS transistor and a second MOS transistor, and a G pole of the first MOS transistor is connected with a D pole of the second MOS transistor; wherein:

3. The electronic equipment is characterized by comprising an embedded controller and a low-voltage-drop voltage stabilizer, wherein the embedded controller and the low-voltage-drop voltage stabilizer are disconnected with power supply after being powered down;

the electronic apparatus further comprising the power-down control device according to any one of claims 1 to 2; wherein:

4. The power-on control device is characterized in that an input side is connected with a switch level signal, and an output side is connected with a direct-current voltage source and a control unit; the power-down control device includes:

5. The power-on control device according to claim 4, wherein the switching device unit comprises a first MOS transistor and a second MOS transistor, and a G pole of the first MOS transistor is connected to a D pole of the second MOS transistor; wherein:

6. A power-on control device according to claim 4 or 5, wherein the first delay circuit and/or the second delay circuit comprises a programmable sense and reset delay monitor chip with a configurable level delay time.

7. The electronic equipment is characterized by comprising an embedded controller and a low-voltage-drop voltage stabilizer which are in a power supply disconnection state before power-on;

the electronic apparatus further comprising the power-on control device according to any one of claims 4 to 6; wherein:

8. The power-on and power-off control device is characterized in that an input side is connected with a switch level signal and a control unit, and an output side is connected with a direct-current voltage source and the control unit; the power-on and power-off control device comprises:

9. The power-on and power-off control device according to claim 8, wherein the switching device unit comprises a first MOS tube and a second MOS tube, and a G pole of the first MOS tube is connected with a D pole of the second MOS tube; wherein:

wherein:

10. A power up and down control device according to claim 8 or 9, characterized in that the first delay circuit and/or the second delay circuit comprises a programmable sense and reset delay monitor chip with configurable level delay time.

11. The electronic equipment is characterized by comprising an embedded controller and a low-voltage-drop voltage stabilizer which are in a power supply disconnection state in a shutdown state;

the electronic apparatus further comprising the power-on/power-off control device according to any one of claims 8 to 10; wherein: