CN219609139U - Burn-in motherboard and burn-in test assembly - Google Patents

Abstract

The utility model provides a burn-in motherboard and a burn-in test assembly. The ageing mother board includes a plurality of concatenation modules, a plurality of concatenation modules electricity are connected, every the concatenation module includes: a motherboard body; the power supply interface is arranged at the edge of the motherboard body and is used for being electrically connected with an external power supply or used for being electrically connected with power supply interfaces of adjacent splicing modules; the grounding interface is arranged at the edge of the motherboard body and is arranged at intervals with the power supply interface, and is used for grounding or is used for electrically connecting the grounding interfaces of the splicing modules arranged adjacently; and the interface units comprise a first test interface, and the first test interface is used for electrically connecting at least one type of aging daughter board. The aged motherboard provided by the utility model has high adaptability and low design cost.

Description

Burn-in motherboard and burn-in test assembly

Technical Field

The utility model relates to the field of semiconductor devices, in particular to an aging motherboard and an aging test assembly.

Background

Before packaging, integrated circuit chips often require burn-in and performance testing to test the reliability and quality risk potential of the chips.

However, the incubators used for burn-in tests of different models have various dimensions, which results in the need for burn-in motherboards involving various dimensions for adaptation, and thus in high design costs of the burn-in motherboards.

Disclosure of Invention

In a first aspect, the present utility model provides an aged motherboard comprising a plurality of splice modules electrically connected, each splice module comprising:

a motherboard body;

the power supply interface is arranged at the edge of the motherboard body and is used for being electrically connected with an external power supply or used for being electrically connected with power supply interfaces of adjacent splicing modules;

the grounding interface is arranged at the edge of the motherboard body and is arranged at intervals with the power supply interface, and is used for grounding or is used for electrically connecting the grounding interfaces of the splicing modules arranged adjacently; a kind of electronic device with high-pressure air-conditioning system

The interface units comprise a first test interface, and the first test interface is used for electrically connecting at least one type of aging daughter board.

Wherein the interface unit further comprises:

the second test interface is used for electrically connecting at least one type of ageing daughter board, the type of the ageing daughter board electrically connected with the second test interface is different from that of the ageing daughter board electrically connected with the first test interface, and when in ageing test, on each interface unit, only one of the second test interface and the first test interface is electrically connected with the ageing daughter board.

Wherein the interface unit further comprises:

the peripheral functional element is arranged on the motherboard body and is electrically connected to the first test interface and the second test interface, and the peripheral functional element is used for providing a circuit required by burn-in test for the burn-in daughter board.

Wherein the interface unit further comprises:

the light-emitting element is electrically connected to the first test interface and the second test interface and is used for displaying the state of an aging daughter board electrically connected to the first test interface or the second test interface.

Wherein the interface unit further comprises:

the connector comprises an electric connecting piece and an adapter piece, one end of the electric connecting piece is electrically connected with the first test interface, the adapter piece is provided with a through hole, the adapter piece is abutted to the motherboard body, and the through hole accommodates the electric connecting piece.

The motherboard body is provided with a long side and a wide side which are connected in a bending way, the power interface and the grounding interface are arranged on the long side, and the splicing modules are spliced in the length direction of the wide side;

the concatenation module still includes:

the light emitting elements are arranged on the broadsides of the same side, and each light emitting element is electrically connected with one interface unit and used for displaying the state of an aging daughter board electrically connected with the interface unit;

the broadsides of the plurality of light-emitting elements arranged on each splicing module are positioned on the same side of the aged motherboard.

The power supply interfaces of the two splicing modules are arranged in a stacked mode, and the grounding interfaces of the two splicing modules are arranged in a stacked mode;

the burn-in motherboard further comprises:

the first splice pieces are conductive, part of the first splice pieces are fixedly connected with a power interface which is arranged in a stacked mode, and the other part of the first splice pieces are fixedly connected with a grounding interface which is arranged in a stacked mode.

The aging mother board is provided with a plurality of splicing areas which are arranged in a stacking mode, and each splicing area of the aging mother board is provided with a plurality of splicing modules;

the burn-in motherboard further comprises:

the second splice pieces are conductive, and the second splice pieces are fixedly connected with two first splice pieces corresponding to two splice modules which are arranged in a stacked mode in two adjacent splice areas.

The second splicing piece is in threaded connection with the two first splicing pieces, the direction of the threaded connection of the second splicing piece and the direction of the threaded connection of the two first splicing pieces are opposite, and the second splicing piece is used for adjusting the distance between the two splicing modules which are arranged in a stacked mode.

The utility model provides an aged motherboard, which comprises a plurality of splicing modules, wherein each splicing module comprises a plurality of interface units, each interface unit comprises a first test interface, the first test interface is used for electrically connecting an aged daughter board, and the aged motherboard with a larger size is spliced by the plurality of splicing modules with a smaller size, so that the suitability of the aged motherboard is improved, and the aged motherboard can be adapted to incubators with various specifications. In addition, because the size of the splicing module is smaller, the design difficulty and the design cost are reduced, and the ageing test cost is reduced. Therefore, the aged motherboard provided by the utility model has high adaptability and low design cost.

In a second aspect, the present utility model also provides a burn-in assembly comprising:

the burn-in daughter boards comprise a daughter board body, a chip bonding pad and a third test interface, wherein the chip bonding pad is borne on the daughter board body and used for mounting a chip to be tested, and the third test interface is arranged at one end of the daughter board body and is electrically connected with the chip bonding pad; a kind of electronic device with high-pressure air-conditioning system

The burn-in motherboard of the first aspect, said interface unit to electrically connect said third test interface.

The ageing mother board in the ageing test assembly comprises a plurality of splicing modules, each splicing module comprises a plurality of interface units, each interface unit comprises a first test interface, the first test interfaces are electrically connected with the third test interfaces to be electrically connected with the ageing daughter board, the ageing mother board with larger size is spliced by the splicing modules with smaller size, the adaptability of the ageing mother board is improved, and the ageing mother board can be adapted to temperature boxes with various specifications. In addition, because the size of the splicing module is smaller, the design difficulty and the design cost are reduced, and the ageing test cost is reduced. Therefore, the aging test assembly provided by the utility model has high adaptability and low design cost.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present utility model, the drawings that are needed in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present utility model, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

Fig. 1 is a schematic structural diagram of an aged motherboard according to an embodiment of the present utility model.

Fig. 2 is a schematic structural diagram of an aged motherboard according to another embodiment of the present utility model.

Fig. 3 is a schematic structural diagram of the splice module in fig. 1.

Fig. 4 is a schematic diagram of electrical connection of the interface unit in fig. 3.

Fig. 5 is a schematic structural view of the interface unit of fig. 3 with a connector.

Fig. 6 is a schematic cross-sectional view taken along line A-A in fig. 5.

Fig. 7 is a schematic diagram illustrating connection of two adjacent splice modules in fig. 1.

Fig. 8 is a schematic view of fig. 7 at another viewing angle.

Fig. 9 is a schematic structural diagram of the stacking and splicing of the splicing modules in fig. 1.

Fig. 10 is a schematic structural diagram of a burn-in module according to an embodiment of the utility model.

Fig. 11 is a schematic structural diagram of the burn-in daughter board of fig. 10.

Fig. 12 is a schematic diagram of wiring of an interface unit in the present embodiment.

Fig. 13 is a schematic diagram of the routing of the interface unit on the motherboard body in the present embodiment.

Fig. 14 is a schematic diagram of the structure of a burn-in daughter board connected to the interface unit of fig. 12.

Reference numerals: a burn-in test assembly 1; burn-in motherboard 10; a splice module 100; a motherboard body 110; a long side 111; a broadside 112; a power interface 120; an interface unit 130; a first test interface 131; a second test interface 132; peripheral function 133; a light emitting element 134; a connector 135; an electrical connection 1351; an adaptor 1352; a through hole 1353; a power supply main 140; a power supply branch 150; a ground main line 160; a grounded backbone 170; an indicator light wire 180; a ground interface 190; a first splice 200; a second splice 210; burn-in daughter board 20; a sub-board body 21; a chip pad 22; a third test interface 23; an aging interface 231; a floating interface 232.

Detailed Description

The following description of the embodiments of the present utility model will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present utility model, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without any inventive effort, are intended to be within the scope of the utility model.

The terms first, second and the like in the description and in the claims and in the above-described figures are used for distinguishing between different objects and not necessarily for describing a sequential or chronological order. Furthermore, the terms "comprise" and "have," as well as any variations thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those listed steps or elements but may include other steps or elements not listed or inherent to such process, method, article, or apparatus.

Reference herein to "an embodiment" or "implementation" means that a particular feature, structure, or characteristic described in connection with the embodiment or implementation may be included in at least one embodiment of the utility model. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.

The present utility model provides an aged motherboard 10. Referring to fig. 1, fig. 2, fig. 3 and fig. 4, fig. 1 is a schematic structural diagram of an aged motherboard according to an embodiment of the present utility model; FIG. 2 is a schematic diagram of an aged motherboard according to another embodiment of the present utility model;

FIG. 3 is a schematic diagram of the splice module of FIG. 1; fig. 4 is a schematic diagram of electrical connection of the interface unit in fig. 3. In this embodiment, the burn-in motherboard 10 includes a plurality of splice modules 100. The plurality of splice modules 100 are electrically connected, and each splice module 100 includes a motherboard body 110, a power interface 120, a ground interface 190, and a plurality of interface units 130. The power interface 120 is disposed at an edge of the motherboard body 110, and the power interface 120 is used for electrically connecting an external power source, or the power interface 120 is used for electrically connecting the power interfaces 120 of the adjacent splice modules 100. The ground interface 190 is disposed at an edge of the motherboard body 110 and spaced from the power interface 120. The grounding interface 190 is used for grounding, or the grounding interface 190 is used for electrically connecting the grounding interfaces 190 of the adjacent splicing modules 100. The interface unit 130 includes a first test interface 131, where the first test interface 131 is configured to electrically connect to at least one type of burn-in daughter board 20.

In this embodiment, the burn-in motherboard 10 is used for burn-in testing (High Temp Operating Life, HTOL) of chips. Specifically, before packaging the chips, the small batch of chips are subjected to spot check to be used as chips to be tested, the chips to be tested are loaded on the burn-in daughter board 20, and then the burn-in daughter board 20 is mounted on the burn-in motherboard 10 and matched with a burn-in test related device so as to perform burn-in test and performance test on the chips to be tested. The burn-in test related devices include incubators, test platelets, automatic testers (Automatic Test Equipmen, ATE), and the like.

In the related art, the burn-in motherboard 10 is required to be placed in an incubator for burn-in test after loading the burn-in daughter board 20 with chips to be tested, and since the incubators of different models have different internal sizes, it is required to provide the burn-in motherboard 10 of various sizes.

In this embodiment, the burn-in motherboard 10 adopts a modular design, the burn-in motherboard 10 includes a plurality of splice modules 100, each splice module 100 includes a plurality of interface units 130, the interface units 130 include a first test interface 131, and the first test interface 131 is configured to electrically connect to the burn-in daughter board 20. Each splice module 100 adopts a smaller size, and a plurality of splice modules 100 are spliced in parallel to form the aged motherboard 10, so that the aged motherboard 10 with different sizes can be spliced by different numbers of splice modules 100 to adapt to incubators with different models. Wherein the interface unit 130 is also referred to as DUT.

The first test interface 131 may be electrically connected to at least one type of burn-in daughter board 20 to improve the suitability of the burn-in motherboard 10.

In this embodiment, the sizes of the plurality of splice modules 100, the power interface 120, the ground interface 190, and the plurality of interface units 130 are the same, so that after the splice module 100 with a smaller size is designed, the aged motherboard 10 with a larger size can be spliced by the plurality of splice modules 100, thereby reducing the design difficulty and the design cost. In one embodiment (refer to fig. 1), the plurality of stitching modules 100 stitch together in one direction to form the aged motherboard 10. In another embodiment (refer to fig. 2), the plurality of stitching modules 100 stitch together in both the lateral and longitudinal directions to form the aged motherboard 10.

Without being limited thereto, in other embodiments, the aged motherboard 10 may further include at least two size splice modules 100, and the aged motherboard 10 may be spliced into aged motherboards 10 with different sizes by the at least two size splice modules 100, so as to further improve the splicing flexibility of the aged motherboard 10.

In summary, the present utility model provides an aged motherboard 10, where the aged motherboard 10 includes a plurality of splice modules 100, each splice module 100 includes a plurality of interface units 130, each interface unit 130 includes a first test interface 131, the first test interface 131 is configured to electrically connect to an aged motherboard 20, and the aged motherboard 10 with a larger size is spliced by the splice modules 100 with a smaller size, so that the suitability of the aged motherboard 10 is improved, and an incubator with multiple specifications can be adapted. In addition, the splice module 100 has a smaller size, which reduces the design difficulty and cost, thereby reducing the burn-in cost. Accordingly, the burn-in motherboard 10 provided by the present utility model has high adaptability and low design cost.

Referring to fig. 3 and 4 again, in the present embodiment, the interface unit 130 further includes a second test interface 132. The second test interface 132 is configured to electrically connect at least one type of burn-in daughter board 20, and the type of the burn-in daughter board 20 electrically connected to the second test interface 132 is different from the type of the burn-in daughter board 20 electrically connected to the first test interface 131, and the second test interface 132 is electrically connected to the burn-in daughter board 20 via one of the first test interfaces 131 on each of the interface units 130 during burn-in testing.

In this embodiment, the second test interface 132 is combined with the first test interface 131, so that each interface unit 130 can adapt to more types of burn-in daughter boards 20, i.e. to more types of chips to be tested, thereby improving the adaptability of the burn-in motherboard 10.

On the same interface unit 130, the first test interface 131 and the second test interface 132 are electrically connected to the burn-in daughter board 20 via one of them to avoid interference with the electrical connection on the interface unit 130.

Referring to fig. 3 and 4 again, in the present embodiment, the interface unit 130 further includes a peripheral function element 133. The peripheral functional element 133 is disposed on the motherboard body 110, and the peripheral functional element 133 is electrically connected to the first test interface 131 and the second test interface 132. The peripheral functional elements 133 provide the burn-in daughter board 20 with the circuitry required for burn-in testing.

In this embodiment, the peripheral functional element 133 is disposed on the interface unit 130 to provide a circuit required for burn-in testing for the chip to be tested loaded on the burn-in daughter board 20, so that no peripheral circuit is required to be disposed on the burn-in daughter board 20, the design of the burn-in daughter board 20 is simplified, and in a plurality of burn-in testing processes, the chip to be tested does not need to be detached from the burn-in daughter board 20, thereby avoiding damage to the chip to be tested.

Referring to fig. 3 and 4 again, in the present embodiment, the interface unit 130 further includes a light emitting element 134. The light emitting element 134 is electrically connected to the first test interface 131 and the second test interface 132. The light emitting element 134 is configured to display a status of the burn-in daughter board 20 electrically connected to the first test interface 131 or the second test interface 132.

In this embodiment, the light emitting element 134 is electrically connected to the burn-in board 20 through the first test interface 131 or the second test interface 132, and when the chip to be tested performs the burn-in test, the light emitting element 134 can display whether the chip to be tested works normally, so as to facilitate manual inspection. Specifically, when the light emitting element 134 is in the first state, it indicates that the chip to be tested works normally, and when the light emitting element 134 is in the second state, it indicates that the chip to be tested fails. In one embodiment, the first state is that the light emitting element 134 is always blinking, and the second state is that the light emitting element 134 is stopped blinking or is turned off. In another embodiment, the first state is that the light emitting element 134 is normally on, and the second state is that the light emitting element 134 is off or blinks. In yet another embodiment, the first state is when the light emitting element 134 is turned off, and the second state is when the light emitting element 134 is on.

Referring to fig. 5 and 6, fig. 5 is a schematic structural view of the interface unit of fig. 3 with a connector; fig. 6 is a schematic cross-sectional view taken along line A-A in fig. 5. In this embodiment, the interface unit 130 further includes a connector 135. The connector 135 includes an electrical connector 1351 and an adaptor 1352. One end of the electrical connector 1351 is electrically connected to the first test interface 131. The adaptor 1352 has a through hole 1353, the adaptor 1352 abuts the motherboard body 110, and the through hole 1353 accommodates the electrical connector 1351.

In this embodiment, the adaptor 1352 has a through hole 1353, so that the burn-in daughter board 20 can be quickly inserted into the through hole 1353 by placing pins in a row to be electrically connected to the burn-in motherboard 10, thereby improving the connection efficiency between the burn-in daughter board 20 and the burn-in motherboard 10.

In addition, the through hole 1353 of the adaptor 1352 accommodates the electrical connector 1351, which can protect the electrical connector 1351.

In addition, the adaptor 1352 abuts against the motherboard body 110, and plays a role in supporting the electrical connector 1351.

Referring to fig. 1 and 3 again, in the present embodiment, the motherboard body 110 has a long side 111 and a wide side 112 connected in a bending manner. The power interface 120 and the ground interface 190 are disposed on the long side 111. The plurality of splice modules 100 are spliced in the length direction of the broadside 112. The splice module 100 further includes a plurality of light emitting elements 134. The plurality of light emitting elements 134 are disposed on the same side of the wide side 112, and each of the light emitting elements 134 is electrically connected to one of the interface units 130 for displaying the status of the burn-in daughter board 20 electrically connected to the interface unit 130. The broadsides 112 of each of the splice modules 100 with the plurality of light-emitting elements 134 are on the same side of the burn-in motherboard 10.

In this embodiment, the light emitting element 134 is electrically connected to the burn-in board 20 through the interface unit 130, and when the chip to be tested performs the burn-in test, the light emitting element 134 can display whether the chip to be tested works normally, so as to facilitate manual inspection. Specifically, when the light emitting element 134 is in the first state, it indicates that the chip to be tested works normally, and when the light emitting element 134 is in the second state, it indicates that the chip to be tested fails. In one embodiment, the first state is that the light emitting element 134 is always blinking, and the second state is that the light emitting element 134 is stopped blinking or is turned off. In another embodiment, the first state is that the light emitting element 134 is normally on, and the second state is that the light emitting element 134 is off or blinks. In yet another embodiment, the first state is when the light emitting element 134 is turned off, and the second state is when the light emitting element 134 is on.

In this embodiment, each of the splice modules 100 is provided with the broadsides 112 of the plurality of light-emitting elements 134 on the same side of the aged motherboard 10, specifically, when the aged motherboard 10 is located in a temperature chamber, the plurality of light-emitting elements 134 are all located on a side close to a viewing window of the temperature chamber, so as to manually observe the status of each of the light-emitting elements 134.

Further, the light emitting elements 134 are all located on the same side of the aged motherboard 10 and are distributed in a straight line, so that overlapping of the light emitting elements 134 in the manual viewing direction can be avoided, and the viewing efficiency is improved.

Referring to fig. 3, 7 and 8, fig. 7 is a schematic diagram illustrating connection of two adjacent splice modules in fig. 1; fig. 8 is a schematic view of fig. 7 at another viewing angle. In this embodiment, in the two adjacent splice modules 100, the power interfaces 120 of the two splice modules 100 are stacked, and the ground interfaces 190 of the two splice modules 100 are stacked. The burn-in motherboard 10 also includes a plurality of first splice members 200. The first splice 200 is electrically conductive. Part of the first splicing member 200 is fixedly connected with the power supply interface 120 which is arranged in a stacked manner, and the other part of the first splicing member 200 is fixedly connected with the grounding interface 190 which is arranged in a stacked manner.

In this embodiment, the two adjacent splice modules 100 are partially stacked, which improves the size utilization of the entire aged motherboard 10, and increases the splice strength of the splice modules 100.

The first splicing member 200 is conductive, and plays a role in current transmission while splicing two adjacent splicing modules 100, thereby simplifying the splicing structure of the aged motherboard 10.

Referring to fig. 9, fig. 9 is a schematic structural diagram of the stacking and splicing of the splicing modules in fig. 1. In this embodiment, the aged motherboard 10 has a plurality of splice areas that are stacked, and the aged motherboard 10 is provided with a plurality of splice modules 100 in each of the splice areas. The burn-in motherboard 10 also includes a plurality of second splices 210. The second splice 210 is electrically conductive. The second splicing element 210 is fixedly connected with two first splicing elements 200 corresponding to two splicing modules 100 stacked in two adjacent splicing areas.

In this embodiment, the aged mother board 10 is further improved in flexibility in size by stacking and splicing the splice modules 100 to form the aged mother board 10, so that the problem of small size of the incubator can be overcome.

The second splice 210 is conductive, and plays a role in current transmission while splicing the splice modules 100, thereby simplifying the splice structure of the aged motherboard 10.

Referring to fig. 9 again, in the present embodiment, the second splicing element 210 is in threaded connection with the two first splicing elements 200, and the threaded connection direction of the second splicing element 210 and the two first splicing elements 200 is opposite. The second splicing element 210 is used for adjusting the distance between the two splicing modules 100 that are stacked.

In this embodiment, by adjusting the second splice 210, the distance between two adjacent splice modules 100 in the stacking direction can be adjusted, so that the aged motherboard 10 can be adapted to aged daughter boards 20 with different sizes, and the suitability of the aged motherboard 10 is further improved.

In particular, when the second splice 210 rotates in the first direction, the distance between two adjacent splice modules 100 in the stacking direction can be increased. When the second splice 210 rotates in the second direction, the distance between two adjacent splice modules 100 in the stacking direction can be reduced. Wherein the first direction is opposite to the second direction.

Optionally, the first direction is clockwise and the second direction is counterclockwise; alternatively, the first direction is a counterclockwise direction and the second direction is a clockwise direction.

The utility model also provides a burn-in test assembly 1. Referring to fig. 10 and 11, fig. 10 is a schematic structural diagram of a burn-in module according to an embodiment of the utility model; fig. 11 is a schematic structural diagram of the burn-in daughter board of fig. 10. In this embodiment, the burn-in module 1 includes a plurality of burn-in daughter boards 20 and a burn-in motherboard 10 according to any of the above embodiments. The burn-in daughter board 20 includes a daughter board body 21, a chip pad 22, and a third test interface 23. The chip bonding pad 22 is carried on the daughter board body 21 and is used for mounting a chip to be tested. The third test interface 23 is disposed at one end of the daughter board body 21 and is electrically connected to the chip pad 22. The interface unit 130 is configured to electrically connect to the third test interface 23.

In this embodiment, the burn-in motherboard 10 of the burn-in test assembly 1 includes a plurality of splice modules 100, each splice module 100 includes a plurality of interface units 130, each interface unit 130 includes a first test interface 131, the first test interface 131 is electrically connected to the third test interface 23 to electrically connect the burn-in daughter board 20, and the splice modules 100 are spliced to form the burn-in motherboard 10 with a larger size through a plurality of smaller sizes, so that the adaptability of the burn-in motherboard 10 is improved, and the burn-in motherboard can be adapted to incubators with various specifications. In addition, the splice module 100 has a smaller size, which reduces the design difficulty and cost, thereby reducing the burn-in cost. Therefore, the burn-in test assembly 1 provided by the utility model has high adaptability and low design cost.

Further, the burn-in daughter board 20 is connected to the burn-in motherboard 10 in a vertical state with respect to the burn-in motherboard 10, so that the occupied space of the burn-in daughter board 20 on the burn-in motherboard 10 can be reduced, and the space utilization of the burn-in motherboard 10 can be improved.

Examples

Referring to fig. 12, 13, 14, table 1 and table 2, fig. 12 is a schematic diagram of the wiring of the interface unit in the present embodiment; FIG. 13 is a schematic diagram of the wiring of the interface unit on the motherboard body in the present embodiment; fig. 14 is a schematic diagram of the structure of a burn-in daughter board connected to the interface unit of fig. 12. Four types of chips are schematically illustrated in CVT5001, CVT5002A, CVT5002B, CVT5003, part product line.

In this embodiment, the third test interface 23 includes an burn-in interface 231 and a suspension interface 232. The third test interface 23 is shown as 30 connection points in parallel, and there are 20 connection points in each column, where the burn-in interface 231 is 20 connection points in parallel for burn-in testing. The suspension interface 232 is a series of 10 connection points, and is used for leading out all pin angles on the chip to be tested together with the burn-in interface 231 so as to perform performance test. In addition, the arrangement order of the third test interfaces 23 in the list shown in tables 1 and 2 is identical to the distribution order of the third test interfaces 23 shown in fig. 13. And the interface definitions in tables 1 and 2 indicate the pin signals that need to be accessed.

In this embodiment, the third test interface 23 is configured as three parallel rows of connection points, and one row of 10 connection points of the suspension interface 232 and two rows of 10 connection points of the burn-in interface 231 are configured in parallel, which is beneficial for the suspension interface 232 to be configured in suspension when the third test interface 23 is connected to the burn-in motherboard 10.

In this embodiment, the first test interface 131 in the interface unit 130 can support the burn-in daughter board 20 that carries two types of chips of the CVT5001 and the CVT5002A, and the second test interface 132 in the interface unit 130 can support the burn-in daughter board 20 that carries two types of chips of the CVT5002B and the CVT5003, that is, the burn-in motherboard 10 can be adapted to four types of chips.

In addition, in the present embodiment, the splice module 100 includes a power supply main line 140 and a power supply branch line 150 electrically connected to the power supply interface 120, a ground main line 160 and a ground branch line 170 electrically connected to the ground interface 190, and an indicator light wire 180 electrically connected to the light emitting element 134. On the motherboard body 110, the power supply main line 140 and the ground main line 160 are disposed on a bottom layer of the motherboard body 110 and form a longitudinal wiring. The power branch line 150, the grounding branch line 170 and the indicator light line 180 are disposed on the top layer of the motherboard body 110 and are laterally routed to reduce current interference with the power branch line 140 and the grounding branch line 160. In addition, the arrangement direction of the first test interface 131 and the arrangement direction of the second test interface 132 are parallel to the routing direction of the power branch line 150, so as to reduce the current interference to the interface unit 130. Note that, fig. 13 only illustrates a portion of the motherboard body 110.

While embodiments of the present utility model have been shown and described above, it should be understood that the above embodiments are illustrative and not to be construed as limiting the utility model, and that variations, modifications, alternatives and alternatives to the above embodiments may be made by those skilled in the art within the scope of the utility model, which is also to be regarded as being within the scope of the utility model.

Claims (10)

1. An aged motherboard, wherein said aged motherboard comprises a plurality of splice modules, said plurality of splice modules being electrically connected, each of said splice modules comprising:

a motherboard body;

the power supply interface is arranged at the edge of the motherboard body and is used for being electrically connected with an external power supply or used for being electrically connected with power supply interfaces of adjacent splicing modules;

the grounding interface is arranged at the edge of the motherboard body and is arranged at intervals with the power supply interface, and is used for grounding or is used for electrically connecting the grounding interfaces of the splicing modules arranged adjacently; a kind of electronic device with high-pressure air-conditioning system

The interface units comprise a first test interface, and the first test interface is used for electrically connecting at least one type of aging daughter board.

2. The burn-in motherboard of claim 1 wherein said interface unit further comprises:

the second test interface is used for electrically connecting at least one type of ageing daughter board, the type of the ageing daughter board electrically connected with the second test interface is different from that of the ageing daughter board electrically connected with the first test interface, and when in ageing test, on each interface unit, only one of the second test interface and the first test interface is electrically connected with the ageing daughter board.

3. The burn-in motherboard of claim 2 wherein said interface unit further comprises:

the peripheral functional element is arranged on the motherboard body and is electrically connected to the first test interface and the second test interface, and the peripheral functional element is used for providing a circuit required by burn-in test for the burn-in daughter board.

4. The burn-in motherboard of claim 3 wherein said interface unit further comprises:

the light-emitting element is electrically connected to the first test interface and the second test interface and is used for displaying the state of an aging daughter board electrically connected to the first test interface or the second test interface.

5. The burn-in motherboard of claim 1 wherein said interface unit further comprises:

the connector comprises an electric connecting piece and an adapter piece, one end of the electric connecting piece is electrically connected with the first test interface, the adapter piece is provided with a through hole, the adapter piece is abutted to the motherboard body, and the through hole accommodates the electric connecting piece.

6. The burn-in motherboard of claim 1 wherein said motherboard body has a long side and a wide side connected by a bend, said power interface and said ground interface being disposed on said long side, said plurality of splice modules being spliced in a length direction of said wide side;

the concatenation module still includes:

the light emitting elements are arranged on the broadsides of the same side, and each light emitting element is electrically connected with one interface unit and used for displaying the state of an aging daughter board electrically connected with the interface unit;

the broadsides of the plurality of light-emitting elements arranged on each splicing module are positioned on the same side of the aged motherboard.

7. The burn-in motherboard of claim 6 wherein power interfaces of two of said splice modules disposed adjacently are stacked and ground interfaces of two of said splice modules are stacked;

the burn-in motherboard further comprises:

the first splice pieces are conductive, part of the first splice pieces are fixedly connected with a power interface which is arranged in a stacked mode, and the other part of the first splice pieces are fixedly connected with a grounding interface which is arranged in a stacked mode.

8. The burn-in motherboard of claim 7 wherein said burn-in motherboard has a plurality of splice areas arranged in a stack, said burn-in motherboard having a plurality of splice modules at each of said splice areas;

the burn-in motherboard further comprises:

the second splice pieces are conductive, and the second splice pieces are fixedly connected with two first splice pieces corresponding to two splice modules which are arranged in a stacked mode in two adjacent splice areas.

9. The burn-in motherboard of claim 8, wherein said second splice is threadably coupled to said two first splices in a direction opposite to the direction of the threaded coupling of said two first splices, said second splice being used to adjust the distance between two splice modules in a stacked arrangement.

10. A burn-in assembly, the burn-in assembly comprising:

the burn-in daughter boards comprise a daughter board body, a chip bonding pad and a third test interface, wherein the chip bonding pad is borne on the daughter board body and used for mounting a chip to be tested, and the third test interface is arranged at one end of the daughter board body and is electrically connected with the chip bonding pad; a kind of electronic device with high-pressure air-conditioning system

An aged motherboard according to any one of claims 1-9, said interface unit being for electrically connecting said third test interface.