CN219592120U - Power supply reverse connection preventing circuit and DC electronic equipment - Google Patents
Power supply reverse connection preventing circuit and DC electronic equipment Download PDFInfo
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- CN219592120U CN219592120U CN202320046498.XU CN202320046498U CN219592120U CN 219592120 U CN219592120 U CN 219592120U CN 202320046498 U CN202320046498 U CN 202320046498U CN 219592120 U CN219592120 U CN 219592120U
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Abstract
The utility model relates to a power supply reverse connection preventing circuit and DC electronic equipment, the power supply reverse connection preventing circuit is connected between a power supply and a load, the power supply reverse connection preventing circuit comprises: the device comprises a field effect transistor, a peak value detection subcircuit and a voltage drop unit; the first end of the power supply is connected with the first end of the load through a field effect tube; the output end of the peak detection sub-circuit is connected with the grid electrode of the field effect tube, and the input end of the peak detection sub-circuit is connected with the source electrode of the field effect tube through the voltage drop unit; the second end of the power supply and the second end of the load are grounded. When the power supply circuit is connected with an AC power supply, the grid electrode of the P-type field effect transistor can keep higher voltage, and then after the source electrode voltage of the P-type field effect transistor is reduced by a small extent, the voltage difference between the source electrode and the grid electrode does not meet the conduction condition, so that quick turn-off is realized. The problem that the MOS tube is not turned off timely when the conventional power reverse connection preventing circuit is connected to an AC power supply is solved.
Description
Technical Field
The utility model relates to the technical field of DC electronic equipment, in particular to a power supply reverse connection preventing circuit and DC electronic equipment.
Background
In the power supply scenario of a direct current electronic device, there is a problem that a user reverses the positive and negative terminals of a DC (direct current) power supply or misconnects an AC (alternating current) power supply to cause power damage. Therefore, for the above use cases, a protection design is generally performed in a power supply circuit of the DC electronic device.
In a common anti-reverse power circuit, a MOS transistor is typically provided between a power supply and a load. The grid electrode and the source electrode of the MOS tube are respectively connected with two ends of the power supply, and the voltage difference between the grid electrode and the source electrode is the input voltage. Therefore, the voltage difference between the grid electrode and the source electrode of the MOS tube can meet the conduction condition only when the power supply is connected positively, and then the MOS tube is not conducted when the power supply is connected reversely.
However, in the case of the above reverse connection preventing circuit being connected to the AC power supply by mistake, since the voltage difference between the gate and the source of the MOS transistor is the input voltage, the MOS transistor is turned off only when the input voltage needs to be reduced by a large margin until the on condition is not satisfied in the process of the input voltage being reduced from the peak value. Therefore, when the conventional power supply reverse connection preventing circuit is connected with an AC power supply, the problem that the MOS tube is not turned off timely exists, and the situation that the recharging current of the power supply circuit damages the power supply is easy to occur.
Disclosure of Invention
In view of this, it is necessary to provide a power supply reversal prevention circuit and a DC electronic device.
In a first aspect, the present utility model provides a reverse power supply circuit connected between a power supply and a load, the reverse power supply circuit comprising: the device comprises a field effect transistor, a peak value detection subcircuit and a voltage drop unit;
the first end of the power supply is connected with the first end of the load through the field effect transistor;
the output end of the peak detection sub-circuit is connected with the grid electrode of the field effect tube, and the input end of the peak detection sub-circuit is connected with the source electrode of the field effect tube through the voltage drop unit;
the second end of the power supply and the second end of the load are grounded.
In one embodiment, the drain electrode of the field effect transistor is connected with the first end of the power supply, and the source electrode of the field effect transistor is connected with the first end of the load;
the drain electrode and the source electrode of the field effect tube are also connected through a first diode, and the first diode is led to the source electrode from the drain electrode of the field effect tube.
In one embodiment, the peak detection subcircuit includes a first capacitor and a second diode;
the first end of the first capacitor is connected with the grid electrode of the field effect transistor, and the second end of the first capacitor is grounded;
the first end of the first capacitor is also connected with the voltage drop unit through the second diode, and the second diode is led to the first end of the first capacitor through the voltage drop unit.
In one embodiment, the peak detection subcircuit further includes a first resistor connected in parallel with the first capacitor.
In one embodiment, the voltage drop unit includes a zener diode;
the first end of the zener diode is connected with the source electrode of the field effect transistor, and the second end of the zener diode is connected with the input end of the peak detection sub-circuit.
In one embodiment, the voltage drop unit further includes a second resistor, and the second end of the zener diode is connected to the input end of the peak detection sub-circuit through the second resistor.
In one embodiment, the second diode is a schottky diode.
In one embodiment, the anti-reverse power supply circuit further comprises a second capacitor, and two ends of the second capacitor are respectively connected with the first end and the second end of the load.
In a second aspect, the present utility model provides a DC electronic device comprising the anti-reverse power circuit described in the first aspect.
In some of these embodiments, the DC electronic device is a dome camera.
Compared with the prior art, the power supply reverse connection preventing circuit and the DC electronic equipment provided by the utility model have the advantages that the output end of the peak detection sub-circuit is coupled with the grid electrode of the field effect transistor, and the input end of the peak detection sub-circuit is coupled with the source electrode of the field effect transistor through the voltage drop unit. Therefore, when the power supply circuit is connected with an AC power supply, the grid electrode of the field effect transistor can keep higher voltage, and when the source electrode voltage of the field effect transistor is reduced by a small extent, the voltage difference between the source electrode and the grid electrode does not meet the conduction condition, so that quick turn-off is realized. The problem that the MOS tube is not turned off timely when the conventional power reverse connection preventing circuit is connected to an AC power supply is solved.
Drawings
FIG. 1 is a schematic diagram of a reverse power supply circuit in an embodiment of the utility model;
FIG. 2 is a topology of a reverse power circuit in some embodiments of the utility model;
fig. 3 is a topology of a reverse power supply circuit in an embodiment of the utility model.
Detailed Description
The following description of the embodiments of the present utility model will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all embodiments of the utility model. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present utility model without making any inventive effort, are intended to fall within the scope of the present utility model.
It will be understood that when an element is referred to as being "disposed" on another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "disposed on" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "secured to" another element, it can be directly secured to the other element or intervening elements may also be present.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this utility model belongs. The terminology used in the description of the utility model herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the utility model. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
Fig. 1 is a schematic diagram of a power supply reverse connection preventing circuit in an embodiment of the utility model. Referring to fig. 1, the present utility model provides a reverse power supply circuit, which is connected between a power supply 100 and a load 200; the reverse power supply connection preventing circuit comprises: a field effect transistor 300, a peak detection sub-circuit 400, and a voltage drop unit 500; a first terminal of the power supply 100 is connected to a first terminal of the load 200 through a field effect transistor 300; the output end of the peak detection sub-circuit 400 is connected with the grid electrode of the field effect tube 300, and the input end of the peak detection sub-circuit 400 is connected with the source electrode of the field effect tube 300 through the voltage drop unit 500; a second terminal of the power supply 100, a second terminal of the load 200 are grounded.
Specifically, in the anti-reverse power circuit, the fet 300 is usually a P-type fet. Under normal use conditions, the power supply 100 should be a DC power supply. The first terminal of the power supply 100 is connected to the first terminal of the load 200 through a field effect transistor 300, and the field effect transistor 300 functions as a switch, and the conduction condition is that the source voltage is higher than the gate voltage by a threshold value. In the power supply circuit, a peak detection sub-circuit 400 is further provided, and the peak detection sub-circuit 400 further has a ground terminal, and the ground terminal is grounded to both the second terminal of the power supply 100 and the second terminal of the load 200. And the peak detection sub-circuit 400 is capable of stably maintaining the peak value of the input voltage in the ac scene. The output end of the peak detection sub-circuit 400 is connected with the gate of the field effect transistor 300, and the input end of the peak detection sub-circuit 400 is connected with the source of the field effect transistor 300 through the voltage drop unit 500. When the fet 300 is a P-fet, the principle of use of the anti-reverse power circuit is as follows:
in the case of the DC power being connected, the voltage difference between the source and the gate of the fet 300 is mainly controlled by the voltage drop unit 500, and the voltage difference is at least higher than the voltage drop value of the voltage drop unit 500. Furthermore, after selecting the voltage drop unit 500 with a suitable voltage drop value, the voltage difference between the source and the gate of the fet 300 stably satisfies the conduction condition, so that the fet 300 is in a conducting state, and the power circuit is normally used at this time.
In the case of the reverse connection of the DC power, since the gate voltage of the field effect transistor 300 is higher than the source voltage, the on condition thereof is not satisfied. Further, the field effect transistor 300 is in an off state.
In the case of connecting the AC power source, when the input voltage is at a peak value, the gate voltage of the field effect transistor 300 is lower than the source voltage, and the voltage difference is the voltage drop value of the voltage drop unit 500 (without considering the voltage drop inside the peak detection sub-circuit 400). At this time, the field effect transistor 300 is in the on state as in the case of the DC power supply being connected. However, when the source voltage of the fet 300 begins to drop with the input voltage, the fet 300 remains unchanged under the action of the peak detection subcircuit 400. Therefore, when the source voltage of the fet 300 decreases by a small amount, the voltage difference between the source voltage and the gate voltage does not satisfy the on condition, so that the fet 300 can quickly enter the off state.
Illustratively, the voltage drop unit 500 having a voltage drop value of 4 volts may be selected when the on-voltage of the fet 300 is 3 volts, regardless of the voltage drop inside the peak detection sub-circuit 400. When the DC power is being connected, the source voltage of the fet 300 may be higher than the gate voltage by 4 volts all the time, and thus the fet 300 is in a conductive state. When the power supply 100 is connected to the AC power, the source voltage of the fet 300 is 4 volts higher than the gate voltage when the input voltage is at a peak value, and the fet 300 is in a conductive state. However, after the source voltage of the fet 300 drops by 1 volt, the voltage difference between the source and the gate will be less than 3 volts, so that the on condition is not satisfied, and the fet 300 can be turned off rapidly.
As can be seen from the above description, compared with the prior art, the present utility model couples the output terminal of the peak detection sub-circuit 400 to the gate of the fet 300, and the input terminal of the peak detection sub-circuit 400 is coupled to the source of the fet 300 through the voltage drop unit 500. Therefore, when the power supply circuit is connected to the AC power supply, the gate of the fet 300 will maintain a high voltage, and when the source voltage of the fet 300 drops slightly, the voltage difference between the source and the gate will not satisfy the on condition, so as to achieve quick turn-off. It should be further noted that the voltage drop value of the voltage drop unit 500 determines the turn-off speed of the fet 300. The voltage drop unit 500 having a voltage drop value slightly greater than the turn-on voltage of the fet 300 may be selected without considering the voltage drop inside the peak detection subcircuit 400. Thus, the voltage difference between the source and the gate of the field effect transistor 300 is larger than the on voltage in normal use of the power circuit. When the power supply circuit is connected to the AC power supply, the voltage difference between the source and the gate of the fet 300 is smaller than the on voltage after the input voltage is reduced by a small amplitude from the peak value, so as to realize rapid turn-off of the fet 300. Further, in consideration of the voltage drop inside the peak detection sub-circuit 400, the sum of the voltage drop value of the voltage drop unit 500 and the voltage drop value inside the detection sub-circuit is slightly larger than the turn-on voltage of the field effect transistor 300.
Fig. 2 is a topology diagram of a reverse power circuit in some embodiments of the utility model. The anti-reverse power circuit of the present utility model is further described below with reference to fig. 1 and 2.
In some embodiments, the anti-reverse power connection circuit further includes a first connection 110 and a second connection 210, where the first connection 110 is typically two connection ports for connecting to the power source 100 and the second connection 210 is also typically two connection ports for connecting to the load 200. The drain electrode 320 of the field effect tube 300 is connected with the first end of the first connecting portion 110, and the source electrode 330 of the field effect tube 300 is connected with the first end of the second connecting portion 210; the drain 320 and source 330 of the field effect transistor 300 are also connected by a first diode 340, the first diode 340 leading from the drain 320 of the field effect transistor 300 to the source 330.
In this embodiment, a specific connection structure of the fet 300 is provided. When the power supply circuit is being connected to the DC power supply, the first diode 340 is in a conducting state because the conducting direction and the current are the same, so that the voltage of the source 330 of the fet 300 is increased, and the voltage difference between the source 330 and the gate 310 thereof satisfies the conducting voltage, so that the fet 300 is conducted. When the power supply circuit is reversely connected to the DC power supply, the field effect transistor 300 and the first diode 340 are not conducted, so that the reverse connection preventing effect is realized.
Accordingly, in some other embodiments, the source 330 of the fet 300 is connected to the first end of the first connection portion 110, and the drain 320 is connected to the first end of the second connection portion 210. At this time, the source 330 of the field effect transistor 300 is directly coupled to the first terminal of the first connection portion 110, so that the first diode 340 may not be provided.
In some of these embodiments, the peak detection subcircuit 400 includes a first capacitor 410 and a second diode 420, and a first resistor 430; a first end of the first capacitor 410 is connected to the gate 310 of the field effect transistor 300, and a second end of the first capacitor 410 is grounded; the first end of the first capacitor 410 is further connected to the voltage drop unit 500 through the second diode 420, and the voltage drop unit 500 of the second diode 420 leads to the first end of the first capacitor 410; the first resistor 430 is connected in parallel with the first capacitor 410.
In this embodiment, a specific structure of the peak detection sub-circuit 400 is provided, which is mainly composed of a capacitor, a diode, and a resistor. The first end of the first capacitor 410 forms an output end of the peak detection circuit, the second end thereof forms a ground end of the peak detection sub-circuit 400, and the end of the second diode 420, which is far from the first capacitor 410, is connected to the voltage drop unit 500 to form an input end of the peak detection sub-circuit 400. When the power supply circuit is connected to the AC power supply and the input voltage is at a peak value, the voltage difference between the gate 310 and the source 330 of the fet 300 is the sum of the voltage drop values of the voltage drop unit 500 and the second diode 420. When the input voltage starts to decrease from the peak value, the source 330 of the fet 300 decreases along with the decrease, and the gate 310 of the fet 300 also tends to decrease, but the first capacitor 410 discharges, so that the voltage of the gate 310 of the fet 300 remains unchanged. Illustratively, the second diode 420 may employ a schottky diode having an on-state voltage drop of 0.4 volts.
In some of these embodiments, the voltage drop unit 500 includes a zener diode 510; a first terminal of the zener diode 510 is connected to the source 330 of the fet 300 and a second terminal is connected to the input of the peak detection subcircuit 400. Specifically, the voltage drop unit 500 employs a zener diode 510, and the zener diode 510 is capable of providing a stable voltage drop. In some embodiments, the sum of the voltage drop value of zener diode 510 and the voltage drop value of second diode 420 should be slightly greater than the turn-on voltage of fet 300.
In some embodiments, the voltage drop unit 500 may further include a second resistor 520, and the second terminal of the zener diode 510 is connected to the input terminal of the peak detection sub-circuit 400 through the second resistor 520. Specifically, the second resistor 520 is disposed between the zener diode 510 and the second diode 420, and plays a role of current limiting. In this embodiment, the voltage drop across the second resistor 520 may be considered when selecting the voltage drop value of the zener diode 510.
In some embodiments, the anti-reverse power circuit further includes a second capacitor 600, and two ends of the second capacitor 600 are connected to the first end and the second end of the second connection portion 210, respectively.
Specifically, a second capacitor 600 is further connected in parallel to the second connection portion 210 of the power circuit. Specifically, the second capacitor 600 has a decoupling effect. The output voltage of the power circuit is prevented from being abnormally increased instantaneously under the condition of being disturbed or in some cases. Meanwhile, in the case that the power supply circuit is connected to the AC power supply, when the input voltage drops, the second capacitor 600 discharges, and the recharging current thereof affects the power supply, and in the present embodiment, the fet 300 can be turned off rapidly in this case, thereby protecting the power supply.
The utility model also provides a DC electronic device, which comprises the power reverse connection preventing circuit. After the DC electronic equipment adopts the power supply reverse connection preventing circuit, the DC electronic equipment has the functions of reverse connection preventing and error connection preventing of an AC power supply. Illustratively, the DC electronic device may be a camera, and further may be a spherical camera.
Further specifically, the power supply reverse connection preventing circuit includes: the power supply, the load, the field effect transistor, the peak value detection subcircuit and the voltage drop unit; the first end of the power supply is connected with the first end of the load through a field effect tube; the output end of the peak detection sub-circuit is connected with the grid electrode of the field effect tube, and the input end of the peak detection sub-circuit is connected with the source electrode of the field effect tube through the voltage drop unit; the second end of the power supply and the second end of the load are grounded.
Compared with the prior art, the output end of the peak detection subcircuit is coupled with the grid electrode of the field effect tube, and the input end of the peak detection subcircuit is coupled with the source electrode of the field effect tube through the voltage drop unit. Therefore, when the power supply circuit is connected with an AC power supply, the grid electrode of the field effect transistor can keep higher voltage, and when the source electrode voltage of the field effect transistor is reduced by a small extent, the voltage difference between the source electrode and the grid electrode does not meet the conduction condition, so that quick turn-off is realized. The problem that the MOS tube is not turned off timely when the conventional power reverse connection preventing circuit is connected to an AC power supply is solved.
The technical scheme of the utility model is described below through a specific embodiment.
Fig. 3 is a topology of a reverse power supply circuit in an embodiment of the utility model. Referring to fig. 3, the reverse power supply prevention circuit in this embodiment includes: p-type field effect transistor 100, diode 200, schottky diode 500, zener diode 600, first capacitor 300, second capacitor 700, and resistor 400. The input end of the power supply reverse connection preventing circuit is used for being connected with an external power supply, and the output end of the power supply reverse connection preventing circuit is used for being connected with a load 800. The drain 110 of the P-type field effect transistor 100 is connected to the circuit input terminal, the source 120 of the P-type field effect transistor 100 is connected to the circuit output terminal, and the diode 200 is connected to the drain 110 and the source 120 of the P-type field effect transistor 100. One end of the first capacitor 300 is connected to the gate 130 of the P-type field effect transistor 100, the other end is grounded, and the resistor 400 is connected in parallel with the first capacitor 300. The output end of the schottky diode 500 is connected to the gate 130 of the P-type field effect transistor 100, and the output end is connected to the zener diode 600, and the other end of the zener diode 600 is connected to the source 120 of the P-type field effect transistor 100. One end of the second capacitor 700 is connected with the output end of the circuit, and the other end is grounded. The working principle of the power supply reverse connection prevention circuit is as follows:
when the power supply is connected to DC:
the input power charges the second capacitor 700 through the diode 200, and when the voltage rises to operate the zener diode 600 and the schottky diode 500, the voltage of the gate 130 of the P-type field effect transistor 100 is:
V g ＝V s -(V z +V d )
wherein V is s Voltage of source 120 of P-type field effect transistor 100, V z V is the voltage drop of the zener diode 600 d Is the conduction voltage drop of the Schottky diode 500, and thus the voltage difference V between the gate 130 and the source 120 of the P-type field effect transistor 100 gs The method comprises the following steps:
V gs ＝V g -V s ＝-(V z +V d )
wherein V is th Is the turn-on voltage of the P-type field effect transistor 100, when V gs Less than V th And when the MOS tube is completely opened.
When the power supply is connected to AC:
the gate 130 voltage of the P-type fet 100 is:
V g ＝V p -(V z +V d )
wherein V is p Is the peak of the ac voltage.
Obtainable V gs The method comprises the following steps:
V gs ＝V g -V s ＝(V p -V s )-(V z +V d )
due to V p Is the peak of the AC voltage, so V p ≥V s ，
If the following steps are made: - (V) z +V d )-V th ＝V 1 The method comprises the steps of carrying out a first treatment on the surface of the Wherein V is th Is the turn-on voltage of the P-type field effect transistor 100.
Then V p -V s Greater than-V 1 The P-type field effect transistor 100 can be turned off, the current of the second capacitor 700 is outputted to reflux, the anti-reverse effect of the AC misinsertion is realized, and the clamping voltage V of the zener diode 600 is selected z The reverse speed of the P-type fet 100 may be controlled.
For example, if the turn-on voltage of the P-type field effect transistor 100 is selected to be-3V, the zener diode 600 with a voltage drop of 3.3V is selected, and the turn-on voltage drop of the schottky diode 500 is 0.4V. So V s Below V p 0.At 7V, the off-point of the fet 100 has been reached. The reverse current of the output second capacitor 700 can be effectively reduced, and circuit damage caused by misinsertion of AC can be avoided.
As can be seen from the above embodiments, the anti-reverse power connection circuit has the following advantages:
1. when the direct current power supply is inserted, the field effect transistor can work in a complete conducting state, so that the power consumption is reduced.
2. When the alternating current power supply is inserted, the grid diode can be quickly reversed, so that abnormal damage of the power supply board caused by backflow of capacitance current of the equipment is avoided.
It should be understood that the specific embodiments described herein are merely illustrative of this application and are not intended to be limiting. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present disclosure in accordance with the embodiments provided herein.
It is to be understood that the drawings are merely illustrative of some embodiments of the present utility model and that it is possible for those skilled in the art to adapt the present utility model to other similar situations without the need for inventive work. In addition, it should be appreciated that while the development effort might be complex and lengthy, it will nevertheless be a routine undertaking of design, fabrication, or manufacture for those of ordinary skill having the benefit of this disclosure, and further having the benefit of this disclosure.
The term "embodiment" in this disclosure means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the utility model. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive. It will be clear or implicitly understood by those of ordinary skill in the art that the embodiments described in the present utility model can be combined with other embodiments without conflict.
The above examples merely represent a few embodiments of the present utility model, which are described in more detail and are not to be construed as limiting the scope of the patent claims. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the utility model, which are all within the scope of the utility model. Accordingly, the scope of the utility model should be assessed as that of the appended claims.
Claims (10)
1. An anti-reverse power circuit connected between a power source and a load, the anti-reverse power circuit comprising: the device comprises a field effect transistor, a peak value detection subcircuit and a voltage drop unit;
the first end of the power supply is connected with the first end of the load through the field effect transistor;
the output end of the peak detection sub-circuit is connected with the grid electrode of the field effect tube, and the input end of the peak detection sub-circuit is connected with the source electrode of the field effect tube through the voltage drop unit;
the second end of the power supply and the second end of the load are grounded.
2. The reverse power supply circuit of claim 1, wherein a drain of the field effect transistor is connected to the first terminal of the power supply and a source of the field effect transistor is connected to the first terminal of the load;
the drain electrode and the source electrode of the field effect tube are also connected through a first diode, and the first diode is led to the source electrode from the drain electrode of the field effect tube.
3. The reverse power supply protection circuit of claim 2, wherein the peak detection sub-circuit comprises a first capacitor and a second diode;
the first end of the first capacitor is connected with the grid electrode of the field effect transistor, and the second end of the first capacitor is grounded;
the first end of the first capacitor is also connected with the voltage drop unit through the second diode, and the second diode is led to the first end of the first capacitor through the voltage drop unit.
4. The reverse power supply protection circuit of claim 3 wherein the peak detection subcircuit further comprises a first resistor connected in parallel with the first capacitor.
5. The reverse power supply circuit of claim 1 wherein the voltage drop unit comprises a zener diode;
the first end of the zener diode is connected with the source electrode of the field effect transistor, and the second end of the zener diode is connected with the input end of the peak detection sub-circuit.
6. The reverse power supply circuit of claim 5, wherein the voltage drop unit further comprises a second resistor, and the second terminal of the zener diode is connected to the input terminal of the peak detection sub-circuit through the second resistor.
7. The reverse power supply circuit of claim 3 wherein the second diode is a schottky diode.
8. The reverse power supply circuit of claim 1, further comprising a second capacitor having two ends connected to the first and second ends of the load, respectively.
9. A DC electronic device comprising the reverse power supply prevention circuit according to any one of claims 1 to 8.
10. The DC electronic device of claim 9, wherein the DC electronic device is a camera.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN202320046498.XU CN219592120U (en) | 2023-01-05 | 2023-01-05 | Power supply reverse connection preventing circuit and DC electronic equipment |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202320046498.XU CN219592120U (en) | 2023-01-05 | 2023-01-05 | Power supply reverse connection preventing circuit and DC electronic equipment |
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| CN219592120U true CN219592120U (en) | 2023-08-25 |
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| CN202320046498.XU Active CN219592120U (en) | 2023-01-05 | 2023-01-05 | Power supply reverse connection preventing circuit and DC electronic equipment |
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