CN219497799U

CN219497799U - Intelligent power module

Info

Publication number: CN219497799U
Application number: CN202223486858.2U
Authority: CN
Inventors: 李祥; 吴美飞; 陈颜; 盛春长
Original assignee: Hangzhou Silan Microelectronics Co Ltd
Current assignee: Hangzhou Silan Microelectronics Co Ltd
Priority date: 2022-12-26
Filing date: 2022-12-26
Publication date: 2023-08-08
Anticipated expiration: 2032-12-26

Abstract

The application discloses an intelligent power module, which comprises a lead frame, a first power module and a second power module, wherein the lead frame is provided with a plurality of base islands, a plurality of pins, a first side and a second side which are opposite and extend along the length direction; a plurality of high-side transistors and a plurality of low-side transistors fixed on the plurality of islands, a plurality of gate driving chips; a first conductive structure disposed on the lead frame, a portion of the first conductive structure extending in a length direction and at least one end of the first conductive structure extending to the first side or the second side, a plurality of high-side transistors and a plurality of low-side transistors between the second side and the first conductive structure, and a plurality of gate driving chips between the first side and the first conductive structure; the second ends of the plurality of low-side transistors are connected with a first conductive structure, and at least one end of the first conductive structure is used as a direct current power supply negative end. According to the three-phase direct-current power supply negative terminal, the three-phase direct-current power supply negative terminal is connected to one pin through the first conductive structure, so that the number of pins of the intelligent power module is reduced, and the volume of the intelligent power module is reduced.

Description

Intelligent power module

Technical Field

The utility model relates to the technical field of semiconductors, in particular to an intelligent power module.

Background

An inverter of a power conversion device converting DC power into AC power is used to drive motors in various devices, and IPM (Intelligent Power Module ) exists in the related art in which an inverter including a power device such as an IGBT (insulated gate bipolar transistor) or a MOSFET (metal oxide semiconductor field effect transistor) and a driver IC driving the power device are packaged in a single package.

In a power conversion device using a high voltage, it is generally necessary to make the high voltage pin and the low voltage pin satisfy an electrical gap, and a reasonable electrical gap (a distance of edges of copper foil around two pads) is in a range of 3.05mm or more according to safety regulations, so that the volume of an in-line IPM module increases in order to satisfy the electrical gap in the prior art, which leads to an increase in module cost.

Disclosure of Invention

In view of the foregoing, it is an object of the present utility model to provide an intelligent power module that solves the foregoing technical problem.

According to the utility model, an intelligent power module comprises: a lead frame having a plurality of islands and a plurality of pins, opposing first and second sides, the first and second sides extending in a lengthwise direction; a plurality of high-side transistors and a plurality of low-side transistors fixed on the plurality of islands, a plurality of gate driving chips; a first conductive structure disposed on the lead frame, a portion of the first conductive structure extending in a length direction and at least one end of the first conductive structure extending to a first side or a second side, the plurality of high-side transistors and the plurality of low-side transistors being located between the second side of the lead frame and the first conductive structure, the plurality of gate driver chips being located between the first side of the lead frame and the first conductive structure; the second ends of the plurality of low-side transistors are connected with the first conductive structure, and at least one end of the first conductive structure serves as a direct current power supply negative end.

Preferably, the low side driving reference ground terminals of the plurality of gate driving chips are connected to the first conductive structure.

Preferably, the lead frame further includes a third side and a fourth side opposite to each other, each of the third side and the fourth side being perpendicular to the first side.

Preferably, the first conductive structure includes a first end and a second end, the first and second ends of the first conductive structure being proximate to the opposite third and fourth sides, respectively.

Preferably, the first end of the first conductive structure extends to the first side of the lead frame and is located at an end close to the fourth side, and the second end of the first conductive structure extends to the second side and is located at an end close to the third side.

Preferably, the first conductive structure also extends to the third side and/or the fourth side.

Preferably, the first end of the first conductive structure extends to the first side of the lead frame and is located near one end of the fourth side, and the second end of the first conductive structure extends to the third side.

Preferably, the first conductive structure further extends to the fourth side.

Preferably, the first end of the first conductive structure extends to the second side of the lead frame and is located at an end of the most edge near the third side, and the second end of the first conductive structure extends to the fourth side.

Preferably, the first conductive structure further extends to the third side.

Preferably, the first end of the first conductive structure is used as a second direct current power supply negative terminal, the second end of the first conductive structure is used as a first direct current power supply negative terminal, and at least one of the first direct current power supply negative terminal and the second direct current power supply negative terminal extends a pin to the outside of the plastic package body of the lead frame.

Preferably, the first end of the first conductive structure is used as a second direct current power supply negative end, and a pin extends out of the plastic package body of the lead frame.

Preferably, the first end of the first conductive structure is used as a first direct current power supply negative terminal, and the pins are extended to the outside of the plastic package body of the lead frame.

Preferably, the plurality of islands includes first to fifth islands, wherein the first island is located between the first conductive structure and the first side, and the second to fifth islands are located between the first conductive structure and the second side.

Preferably, at least one end of the second base island is used as a direct current power supply positive end, and the direct current power supply positive end is located on the second side.

Preferably, the second base island leads out a first direct current power supply positive terminal and a second direct current power supply positive terminal at the second side edge; the first direct current power supply positive end is positioned at one end of the most edge of the second side edge; the second direct current power supply positive end is positioned between any pair of adjacent two phases on the second side edge.

Preferably, at least one of the first direct current power supply positive terminal and the second direct current power supply positive terminal extends a pin out of the plastic package body of the lead frame.

Preferably, the center-to-center distance between the first direct current power supply positive end and the first direct current power supply negative end is 24.7mm, and the error amplitude is +/-0.3 mm.

Preferably, the high-side drive levitation power supply terminal and the high-side drive levitation power supply ground terminal of any phase are disposed adjacently.

Preferably, the center-to-center distance between the first direct current power supply negative terminal and the high-side driving levitation power supply ground terminal of the adjacent phase is 3.8mm, and the error amplitude is +/-0.3 mm; the center-to-center distance between the first direct current power supply positive end (P1) and the high-side driving suspension power supply end of the adjacent phase is 3.8mm, and the error amplitude is +/-0.3 mm; the center-to-center distance between the second direct current power supply positive end (P2) and the high-side driving suspension power supply end of the adjacent phase is 3.8mm, and the error amplitude is +/-0.3 mm; the center-to-center distance between the second direct current power supply positive end and the high-side driving levitation power supply ground end (VSV) of the adjacent phase is 3.8mm, and the error amplitude is +/-0.3 mm; the center-to-center distance of the terminals between a pair of adjacent phases was 3.8mm, and the error amplitude was + -0.3 mm.

Preferably, the center-to-center distance between the high-side drive levitation power supply terminal and the high-side drive levitation power supply ground terminal of any phase is 1.9mm, and the error amplitude is + -0.2 mm.

Preferably, the high-side transistors and the low-side transistors are arranged at intervals, the plurality of high-side transistors are fixed on a common base island, and the plurality of low-side transistors are respectively fixed on respective base islands.

Preferably, the plurality of gate driving chips are fixed on a common first base island, the plurality of high-side transistors are fixed on a common second base island, and the plurality of low-side transistors are fixed on third to fifth base islands, respectively.

Preferably, the high-side transistor and the low-side transistor are one of a MOS device, an RC-IGBT device, an IGBT device, and a fast recovery diode.

Preferably, the IGBT tubes and the fast recovery diodes are arranged alternately or arranged up and down.

Preferably, the plurality of pins include a plurality of high voltage pins and a plurality of low voltage pins, wherein the plurality of high voltage pins are disposed on the second side of the lead frame, and the plurality of low voltage pins are disposed on the first side of the lead frame and are uniformly distributed.

Preferably, the low voltage pin includes two fault alarm signal output/enable input terminals respectively located between adjacent gate driving chips.

Preferably, the three gate driving chips each include an enable input pin, and the enable input pins of the three gate driving chips are electrically connected through wire bonding or connected to the fault alarm signal output end/enable input pins through internal metal connecting ribs; one gate driving chip of the three gate driving chips multiplexes the enable input pin thereof as a fault alarm signal output terminal.

Preferably, the intelligent power module further comprises: and the second conductive structure is positioned between the grid driving chip and the first side edge and electrically connects the plurality of fault alarm signal output pins/enable input pins.

Preferably, the fault alarm signal output/enable input of the gate driving chip is connected via the second conductive structure.

Preferably, the plurality of gate driving chips includes first to third gate driving chips, the plurality of high-side transistors includes first to third high-side transistors, and the plurality of low-side transistors includes first to third low-side transistors.

Preferably, the second terminal of the first high-side transistor is connected to the first terminal of the first low-side transistor and to the U-phase high-side drive floating supply ground; the output voltage between the U-phase high-side driving suspension power supply end and the U-phase high-side driving suspension power supply ground end supplies power to the motor; a second terminal of the second high-side transistor is connected to the first terminal of the second low-side transistor and to a V-phase high-side drive floating supply ground; the output voltage between the V-phase high-side driving levitation power supply end and the V-phase high-side driving levitation power supply ground end supplies power to the motor; a second terminal of the third high-side transistor is connected to the first terminal of the third low-side transistor and to a W-phase high-side drive floating supply ground; the output voltage between the W-phase high-side driving levitation power supply end and the W-phase high-side driving levitation power supply ground end supplies power to the motor; the first grid driving chip provides grid control signals for the control ends of the first high-side transistor and the first low-side transistor, and the second grid driving chip provides grid control signals for the control ends of the second high-side transistor and the second low-side transistor; the third gate driving chip provides gate control signals to the control ends of the third high-side transistor and the third low-side transistor.

Preferably, the dimensions of the first side edge and the second side edge are 27 mm-32 mm, the error amplitude is +/-0.3 mm, the vertical distance between the first side edge and the second side edge is 10 mm-15 mm, and the error amplitude is +/-0.3 mm.

Preferably, the gate driving chip further comprises a bootstrap diode connected between a power supply terminal and a high-side driving floating power supply terminal of the gate driving chip.

Preferably, a threaded hole is formed in the plastic package body of the lead frame, and the threaded hole is used for installing a radiator.

Preferably, the intelligent power module is a package structure.

According to the intelligent power module provided by the utility model, the three-phase direct current power supply negative terminal is connected to one pin through the first conductive structure, so that the number of pins of the intelligent power module is reduced, and the volume of the intelligent power module is reduced while the electrical spacing is ensured.

Further, the bootstrap diode is integrated in the gate driving chip, a base island provided with the bootstrap diode can be omitted, and therefore the three-phase high-side gate driving suspension power supply end is arranged on one side of the high-voltage pin, the high-voltage pin and the low-voltage pin are respectively positioned on two opposite sides of the lead frame, and the risk of pin leakage or circuit damage caused by insufficient electrical spacing between the high-voltage pin and the low-voltage pin is avoided.

Further, the first conductive structure extends from one end of the first side to the other end of the second side, and a part of the first conductive structure is laterally arranged in the middle of the lead frame to enhance the stability of the lead frame.

Further, screw holes are formed in the left side and the right side of the lead frame, so that the radiator can be conveniently installed for radiating heat of the module, and the application power of the intelligent power module is improved.

Further, alarm signal output pins are arranged between adjacent gate driving chips and are multiplexed into enabling input pins, at least two fault alarm signal output ends which are internally connected are arranged in the gate driving chips and are respectively connected with the alarm signal output pins on two sides of the gate driving chip in the middle, so that routing and layout are facilitated.

Further, the second conductive structure connects the alarm signal output pins arranged on the driving frame together, and the fault alarm signal output ends in the gate driving chips can be connected together by only arranging one fault alarm signal output end in the gate driving chips.

Further, a high-side grid driving suspension power supply end in the grid driving chip is adjacent to a high-side driving suspension power supply ground end, so that the positive end and the negative end of the high-side IGBT driving power supply are conveniently connected with the energy storage capacitor, and the PCB wiring in the grid driving chip is optimized.

Drawings

The above and other objects, features and advantages of the present utility model will become more apparent from the following description of embodiments of the present utility model with reference to the accompanying drawings, in which:

fig. 1 shows a schematic circuit structure of an intelligent power module according to the present utility model;

fig. 2 shows a pin distribution diagram of a gate driving chip of the intelligent power module according to the present utility model;

FIGS. 3 a-3 h show schematic packaging diagrams of a smart power module provided according to a first embodiment of the present utility model;

fig. 4 shows a schematic package diagram of a smart power module according to a second embodiment of the present utility model;

fig. 5 shows a schematic package diagram of a smart power module according to a third embodiment of the present utility model;

fig. 6 shows a schematic package diagram of an intelligent power module according to a fourth embodiment of the present utility model.

Detailed Description

The utility model will be described in more detail below with reference to the accompanying drawings. For clarity, the various features of the drawings are not drawn to scale. Furthermore, some well-known portions may not be shown. Numerous specific details are set forth in the following description, but as will be appreciated by those skilled in the art, the utility model may be practiced without such specific details.

The utility model may be embodied in various forms, some examples of which are described below.

Fig. 1 shows a schematic circuit structure of an intelligent power module according to the present utility model.

As shown in fig. 1, the intelligent power module 100 includes, for example, a three-phase half-bridge circuit and a three-phase gate driving chip, where the three-phase gate driving chip drives the three-phase half-bridge circuit, the three-phase half-bridge circuit and the gate driving chip of the corresponding phase form a half-bridge driving circuit of the corresponding phase, specifically, the three-phase gate driving chip includes a U-phase gate driving chip A1, a V-phase gate driving chip A2, and a W-phase gate driving chip A3, the U-phase half-bridge circuit includes a first high-side transistor Q11, a first low-side transistor Q12, the V-phase half-bridge circuit includes a second high-side transistor Q21 and a second low-side transistor Q22, and the W-phase half-bridge circuit includes a third high-side transistor Q31 and a third low-side transistor Q32.

The high-side transistor and the low-side transistor in this embodiment are one of a MOS device, an RC-IGBT device, an IGBT device, and a fast recovery diode.

When the transistor is a MOS device, the first end of the transistor is a drain electrode, the second end of the transistor is a source electrode, and the control end of the transistor is a grid electrode; when the transistor is an IGBT device, the first end of the transistor is a collector, the second end of the transistor is an emitter, and the control end of the transistor is a base.

The internal circuit structures of the U-phase gate driving chip A1 and the V-phase gate driving chip A2 in the intelligent power module 100 are identical, the designs are completely consistent, and the first-phase half-bridge circuit and the second-phase half-bridge circuit are driven respectively; the W-phase gate driving chip A3 is added with an overcurrent detection function and a temperature detection function, and other internal circuit structures are the same as those of the U-phase gate driving chip A1 and the V-phase gate driving chip A2 and are used for driving a third phase half-bridge circuit. The U-phase gate driving chip A1, the V-phase gate driving chip A2 and the W-phase gate driving chip A3 all comprise bootstrap diodes connected between a power supply end VCC and a high-side driving floating power supply end VB of the gate driving chip.

A schematic circuit configuration of a smart power module is shown in fig. 1, and the smart power module 100 includes a plurality of pins, pin names and descriptions as shown in the following table.

TABLE 1 Pin names of Intelligent Power Module and description thereof

In the U-phase gate driving chip and the U-phase half-bridge circuit of the intelligent power module 100, the first end of the first high-side transistor Q11 is connected to the first end of the second high-side transistor Q21 and the first end of the third high-side transistor Q31 and is connected to the first dc power supply positive end P1 (1) and the second dc power supply positive end P2 (6) of the intelligent power module 100. The control terminal of the first high-side transistor Q11 is connected to the high-side driving signal output terminal HO of the U-phase gate driving chip A1. An intermediate node between the second terminal of the first high-side transistor Q11 and the first terminal of the first low-side transistor Q12 is connected to the high-side driving floating supply ground VS of the U-phase gate driving chip A1 and serves as the U-phase output U/U-phase high-side driving floating supply ground U, VSU (3) of the intelligent power module 100. The control terminal of the first low-side transistor Q12 is connected to the low-side drive signal output terminal LO of the U-phase gate drive chip A1. The second terminal of the first low-side transistor Q12 is connected to the low-side drive reference ground VSS of the U-phase gate driver chip A1 and to the first negative dc supply terminal N1 (9) or the second negative dc supply terminal N2 (25). The anode of the first diode D1 is connected with the power end VCC of the U-phase gate driving chip A1 to serve as a U-phase power end VCCU (23) of the intelligent power module 100, and the cathode of the first diode D1 is connected with the high-side driving levitation power supply end VB of the U-phase gate driving chip A1 to serve as a U-phase high-side driving levitation power supply end VBU (2) of the intelligent power module 100. The fault alarm signal output end/off input end VFO/SD of the U-phase gate driving chip A1 is used as the fault alarm signal output end/enable input end VFO/SD (20) of the intelligent power module 100, U

The high-side signal input HIN of the phase gate driver chip A1 is used as the U-phase high-side signal input HINU (22) of the intelligent power module 100, the low-side signal input LIN of the U-phase gate driver chip A1 is used as the U-phase low-side signal input LINU (21) of the intelligent power module 100, and the signal ground COM of the U-phase gate driver chip A1 is used as the common ground COM (24) of the intelligent power module 100.

In the V-phase gate driving chip and the V-phase half-bridge circuit of the intelligent power module 100, the first end of the second high-side transistor Q21 is connected to the first end of the second low-side transistor Q22, and the control end of the third second high-side transistor Q21 is connected to the high-side driving signal output end HO of the V-phase gate driving chip A2. An intermediate node between the second terminal of the second high-side transistor Q21 and the first terminal of the second low-side transistor Q22 is connected to the high-side driving floating supply ground VS of the V-phase gate driving chip A2 and serves as V-phase output V/V-phase high-side driving floating supply ground V, VSV (5) of the intelligent power module 100. The control terminal of the second low-side transistor Q22 is connected to the low-side drive signal output terminal LO of the V-phase gate drive chip A2. The second terminal of the second low-side transistor Q22 is connected to the low-side drive reference ground VSS of the V-phase gate driver chip A2 and to the first negative dc supply terminal N1 (9) or the second negative dc supply terminal N2 (25). The anode of the second diode D2 is connected with the power supply end VCC of the V-phase gate driving chip A2 to serve as a V-phase power supply end VCCV (19) of the intelligent power module 100, and the cathode of the second diode D1 is connected with the high-side driving levitation power supply end VB of the V-phase gate driving chip A2 to serve as a V-phase high-side driving levitation power supply end VBV (4) of the intelligent power module 100. The high-side signal input HIN of the V-phase gate driver chip A2 serves as the V-phase high-side signal input HINV (18) of the intelligent power module 100, and the low-side signal input LIN of the V-phase gate driver chip A2 serves as the V-phase low-side signal input LINV (17) of the intelligent power module 100.

In the W-phase half-bridge driving circuit, the control terminal of the third high-side transistor Q31 is connected to the high-side driving signal output terminal HO of the W-phase gate driving chip A3. An intermediate node between the second terminal of the third high-side transistor Q31 and the first terminal of the third low-side transistor Q32 is connected to the high-side driving floating supply ground VS of the W-phase gate driving chip A3 and serves as the W-phase output W/W-phase high-side driving floating supply ground W, VSW (8) of the intelligent power module 100. The control terminal of the third low-side transistor Q32 is connected to the low-side drive signal output terminal LO of the W-phase gate drive chip A3. The second terminal of the third low-side transistor Q32 is connected to the low-side drive reference ground VSS of the W-phase gate driver chip A3 and to the first negative dc supply terminal N1 (9) or the second negative dc supply terminal N2 (25). The anode of the third diode D3 is connected to the power supply terminal VCC of the W-phase gate driving chip A3 as the W-phase power supply terminal VCCW (15) of the intelligent power module 100, and the cathode of the third diode D3 is connected to the high-side driving levitation power supply terminal VB of the W-phase gate driving chip A3 as the W-phase high-side driving levitation power supply terminal VBW (7) of the intelligent power module 100. The overcurrent detection input end CSC of the W-phase gate driving chip A3 is used as the overcurrent detection input end CSC (12) of the intelligent power module 100, the temperature signal output end VOT of the W-phase gate driving chip A3 is used as the temperature signal output end VOT (11) of the intelligent power module 100, and the fault alarm signal output end/enable input end VFO/SD of the W-phase gate driving chip A3 is used as the fault alarm signal output end/enable input end VFO/SD (16) of the intelligent power module 100. The high-side signal input terminal HIN of the W-phase gate driver chip A3 serves as the W-phase high-side signal input terminal HINW (14) of the intelligent power module 100, the low-side signal input terminal LIN of the W-phase gate driver chip A3 serves as the W-phase low-side signal input terminal LINW (13) of the intelligent power module 100, and the signal ground terminal COM of the W-phase gate driver chip A3 serves as the common ground terminal COM (10) of the intelligent power module 100.

The W-phase gate driving chip A3 is provided with an overcurrent detection unit for detecting an overcurrent, and the overcurrent detection unit detects an overcurrent detection input signal provided by an overcurrent detection input end CSC of the gate driving chip, and then outputs a fault alarm signal based on a detection result through a fault alarm signal output end/enable input end VFO/SD.

The fault alarm signal output/enable input end VFO/SD of the U-phase gate driving chip A1, the fault alarm signal output/enable input end VFO/SD of the V-phase gate driving chip A2, and the fault alarm signal output/enable input end VFO/SD of the W-phase gate driving chip A3 are connected inside the package of the intelligent power module 100, for example, by a wire bonding method and the fault alarm signal output/enable input end VFO/SD (16, 20) between the gate driving chips. The signal ground terminal COM of the U-phase gate driving chip A1 is connected to the signal ground terminal COM of the V-phase gate driving chip A2 and the signal ground terminal COM of the W-phase gate driving chip A3 as the common ground terminals COM (8, 24) of the intelligent power module 100. The three-phase direct current power supply positive terminal is connected with a first direct current power supply positive terminal P1 (1) and a second direct current power supply positive terminal P2 (6) serving as the intelligent power module 100; the three-phase dc supply negative terminal is connected to a first dc supply negative terminal N1 (9) and a second dc supply negative terminal N2 (25) of the intelligent power module 100.

The first diode D1, the second diode D2 and the third diode D3 are respectively built in the corresponding grid driving chips, the base island of the bootstrap diode can be omitted, so that the three-phase high-side grid driving suspension power supply end is arranged on one side of the high-voltage pin, the high-voltage pin and the low-voltage pin are respectively positioned on two opposite sides of the lead frame, and the risk of pin leakage or circuit damage caused by insufficient electrical spacing between the high-voltage pin and the low-voltage pin is avoided.

The improved intelligent power module provided by the utility model is characterized in that the three-phase direct current power supply negative terminal is connected into one pin through the first conductive structure, so that the number of pins of the intelligent power module is reduced, and the volume of the intelligent power module is reduced.

Fig. 2 shows a pin distribution diagram of a gate driving chip of an intelligent power module according to the present utility model.

The inside of the gate driving chip 200 is designed according to the circuit structure of the gate driving chip. The gate driving chip 200 includes functional pins (see pins of the gate driving chip shown in fig. 1), among others.

The gate driving chip 200 includes two fail alarm signal output terminals/enable input terminals VFO/SD connected through the chip. As shown in fig. 2, the bootstrap diode is integrated in the gate driving chip, and the base island provided with the bootstrap diode can be omitted, so that the three-phase high-side gate driving suspension power supply end can be arranged on one side of the high-voltage pin, the high-voltage pin and the low-voltage pin are respectively positioned on two opposite sides of the lead frame, and the risk of pin leakage or circuit damage caused by insufficient electrical spacing between the high-voltage pin and the low-voltage pin is avoided.

As shown in FIG. 2, at least two fault alarm signal output ends which are internally connected are arranged in the gate driving chip A1/A2 and are respectively connected with alarm signal output pins on two sides of the middle gate driving chip, so that the wiring and the layout are facilitated.

The high-side grid driving suspension power supply end in the grid driving chip is adjacent to the high-side driving suspension power supply ground end, so that the positive end and the negative end of the high-side IGBT driving power supply are conveniently connected with the energy storage capacitor, and the PCB wiring in the grid driving chip is optimized.

Fig. 3 a-3 h show schematic packaging diagrams of an intelligent power module according to a first embodiment of the present utility model.

The intelligent power module 300 includes at least two half-bridge driving circuits, and in this embodiment, a three-phase half-bridge driving circuit is taken as an example for explanation, as shown in fig. 3a, a gate driving chip in a U-phase half-bridge driving circuit and a gate driving chip in a V-phase half-bridge driving circuit of the intelligent power module 300 are the same, that is, the designs, pin distributions, and the like of the U-phase gate driving chip and the V-phase are completely the same. Compared with the grid driving chip in the two-phase half-bridge driving circuit, the grid driving chip in the W-phase half-bridge driving circuit has the over-current detection function and the temperature detection function.

For example, as shown in fig. 2, the gate driving chip 200 of the U-phase and the V-phase in the intelligent power module 300 include two fault alarm signal output/enable input terminals VFO/SD, the two enable input terminals SD are connected inside the chip, the gate driving chip of the W-phase includes one fault alarm signal output/enable input terminal VFO/SD, and the overcurrent detection input terminal CSC and the temperature signal output terminal VTO are added.

The smart power module 300 includes a lead frame 310, a plurality of islands 321-325 and a plurality of pins disposed on the lead frame 310, a three-phase half-bridge driving circuit disposed on the corresponding islands, and a first conductive structure 330. The U-phase gate driving chip A1, the first high-side transistor Q11 and the first low-side transistor Q12 in the U-phase half-bridge driving circuit. The V-phase gate driving chip A2, the second high-side transistor Q21, and the second low-side transistor Q22 in the V-phase half-bridge driving circuit are respectively disposed on the base island. The W-phase gate driving chip A3, the third high-side transistor Q31, and the third low-side transistor Q32 in the W-phase half-bridge driving circuit are respectively disposed on the corresponding islands.

The lead frame 310 includes a first side 311 and a second side 312 disposed opposite to each other, and a third side 313 and a fourth side 314, the first side 311 and the second side 312 extending in a length direction, the third side 313 and the fourth side 314 extending in a width direction, the first side 311 and the third side 313 being perpendicular.

Part of the first conductive structure 330 extends along a length direction, and at least one end of the first conductive structure 330 extends to the first side 311 or the second side 312, the plurality of high-side transistors (Q11-Q31) and the plurality of low-side transistors (Q12-Q32) are located between the second side 312 of the lead frame 310 and the first conductive structure 330, and the plurality of gate driving chips (A1-A3) are located between the first side 311 of the lead frame 310 and the first conductive structure 330.

A second terminal of the plurality of low-side transistors (Q12-Q32) is connected to the first conductive structure 330, at least one terminal of the first conductive structure 330 acting as a negative dc supply terminal N.

The low side driving reference ground VSS of the plurality of gate driving chips (A1-A3) is connected to the first conductive structure.

In this embodiment, the first conductive structure 330 includes a first end and a second end, which are respectively adjacent to the third 313 and fourth 314 opposite sides.

In the present embodiment, the first end of the first conductive structure 330 extends to the first side 311 of the lead frame 310 and is located near the fourth side 314, and the second end of the first conductive structure 330 extends to the second side 312 and is located near the third side 313 (see fig. 3 a). In a preferred embodiment, the first conductive structure 330 also extends to the third side 313 and/or the fourth side 314 (see fig. 3 b-3 d). The first end of the first conductive structure 330 is used as a second dc negative supply terminal (N2), the second end of the first conductive structure 330 is used as a first dc negative supply terminal (N1), and at least one of the first dc negative supply terminal N1 and the second dc negative supply terminal N2 extends a pin to the outside of the plastic package of the lead frame.

In a preferred embodiment, a first end of the first conductive structure 330 extends to the first side 311 of the leadframe 310 and is located near an end of the fourth side 314, and a second end of the first conductive structure 330 extends to the third side 313 (see fig. 3 e). In a preferred embodiment, the first conductive structure 330 also extends to the fourth side 314 (see fig. 3 f). The first end of the first conductive structure 330 serves as a second dc negative terminal (N2), and extends pins to the outside of the plastic package of the lead frame.

In a preferred embodiment, the first end of the first conductive structure 330 extends to the second side 312 and is located at an end near the third side 313; the second end of the first conductive structure 330 extends to a fourth side 314 (see fig. 3 g). In a preferred embodiment, the first conductive structure 330 also extends to the third side 313. The first end of the first conductive structure 330 serves as a first dc negative supply terminal (N1) and extends pins to the outside of the plastic package of the leadframe.

The first side edge 311 and the second side edge 312 have the dimensions of 27 mm-32 mm, and the error amplitude is +/-0.3 mm; the vertical distance between the first side edge and the second side edge is 10 mm-15 mm, namely the dimension of the third side edge and the fourth side edge is 10 mm-15 mm, and the error amplitude is +/-0.3 mm.

The plurality of pins includes a plurality of high voltage pins and a plurality of low voltage pins, wherein the plurality of low voltage pins are disposed on the first side 311 and the plurality of high voltage pins are disposed on the second side 312. The high-voltage pins comprise a first direct current power supply positive terminal P1 (1), a second direct current power supply positive terminal P2 (6), a high-side driving levitation power supply terminal VBU, VBV, VBW and output/high-side driving levitation power supply ground terminals U and VSu shown in fig. 1; v, VSv; w, VSw. The plurality of low voltage pins includes a plurality of control signal pins, a plurality of analog signal pins, and a plurality of I/O signal pins. The plurality of control signal pins includes: high side signal input HINU, HINV, HINW, low side signal input LINU, LINV, LINW, etc. The plurality of analog signal pins include an overcurrent detection input end CSC, a temperature signal output end VOT, and the like. The plurality of I/O signal pins include a fault alert signal output/enable input VFO/SD, etc.

The plurality of islands includes first to fifth islands 321 to 325, wherein a plurality of gate driving chips A1 to A3 are fixed on a common first island 321, a plurality of high-side transistors are fixed on a common second island 322, and a plurality of low-side transistors are fixed on third to fifth islands 323 to 325, respectively. That is, the U-phase gate driver chips A1, V-phase gate driver chips A2, W-phase gate driver chips A3 are fixed on a common first base island 321, the first high-side transistor Q11, the second high-side transistor Q21, and the third high-side transistor Q31 are provided on a common second base island 322, and the first low-side transistor Q12, the second low-side transistor Q22, and the third high-side transistor Q32 are provided on respective third base islands 323, fourth base islands 324, and fifth base islands 325.

In the present embodiment, the U-phase gate driving chips A1, V-phase gate driving chips A2, W-phase gate driving chips A3 are disposed in the upper half region of the lead frame. The U-phase half-bridge circuit, the V-phase half-bridge circuit and the W-phase half-bridge circuit are arranged in the lower half-edge area of the lead frame. Correspondingly, each phase of half-bridge circuit is arranged up and down relative to the corresponding driving chip.

The high-side transistors and the low-side transistors are arranged at intervals, the high-side transistors are fixed on a common base island, and the low-side transistors are respectively fixed on respective base islands.

The high-side transistor and the low-side transistor in this embodiment are MOS devices or RC-IGBT devices.

At least one end of the second island 322 is used as a dc power supply positive terminal, and the dc power supply positive terminal P is located on the second side 312. The second island 322 leads out a first dc power positive terminal P1 and a second dc power positive terminal P2 at the second side. At least one of the first dc power supply positive terminal P1 and the second dc power supply positive terminal P2 extends a pin to the outside of the plastic package of the lead frame.

The three-phase high-side driving floating power supply terminal VBW, VBU, VBV and the first dc power supply positive terminal P1 and the second dc power supply positive terminal P2 are both located on the second side 312 of the lead frame 310. The three-phase high-side drive floating supply terminal VBW, VBU, VBV and the first dc supply negative terminal N1 are both located on the second side 312 of the leadframe. The second dc supply negative terminal N2 is located at the first side 311 of the lead frame, and the three-phase high-side drive levitation supply terminal VBW, VBU, VBV is located at the second side 312 of the lead frame.

The first dc positive power supply terminal P1 and the first dc negative power supply terminal N1 are respectively located at two ends of the second side, that is, the first dc positive power supply terminal P1 is located at one end of the second side and close to the fourth side 314, and the first dc negative power supply terminal N1 is located at one end of the second side and close to the third side 313. The second dc power supply positive terminal P2 is located between the high-side driving levitation power supply terminals of any adjacent phases, and in this embodiment, the second dc power supply positive terminal P2 is located between the W-phase high-side driving levitation power supply terminal VBW and the V-phase high-side driving levitation power supply terminal VBV. The second dc supply negative terminal N2 is located at one end of the first side 311 and close to the fourth side 314. The center-to-center distance d1 between the first direct current power supply positive end P1 and the first direct current power supply negative end N1 is 24.7mm, and the error amplitude is +/-0.3 mm.

The center-to-center distance between the first direct current power supply negative terminal N1 and the high-side driving levitation power supply ground terminal VSW of the adjacent phase is 3.8mm, and the error amplitude is +/-0.3 mm; the center-to-center distance between the first direct current power supply positive end P1 and the VBU of the high-side driving suspension power supply end of the adjacent phase is 3.8mm, and the error amplitude is +/-0.3 mm; the center-to-center distance between the second direct current power supply positive end P2 and the high-side driving suspension power supply end VSW of the adjacent phase is 3.8mm, and the error amplitude is +/-0.3 mm; the center-to-center distance between the second direct current power supply positive end P2 and the high-side driving levitation power supply ground end VSV of the adjacent phase is 3.8mm, and the error amplitude is +/-0.3 mm; the center-to-center distance of the terminals between a pair of adjacent phases was 3.8mm, and the error amplitude was + -0.3 mm.

The high-side drive levitation power supply end and the high-side drive levitation power supply ground end of any phase are adjacently arranged. For example, the U-phase high-side drive levitation supply end VBU and the U-phase high-side drive levitation supply ground end VSU are disposed adjacently, the V-phase high-side drive levitation supply end VBV and the V-phase high-side drive levitation supply ground end VSV are disposed adjacently, the W-phase high-side drive levitation supply end VBW and the W-phase high-side drive levitation supply ground end VSW are disposed adjacently, and a center-to-center distance d5 between the high-side drive levitation supply end (VBW, VBU, VBV) and the high-side drive levitation supply ground end (VSW, VSU, VSV) of any phase is 1.9mm, and an error amplitude thereof is ±0.2mm.

The first direct current power supply positive end (P1) and/or the second direct current power supply positive end (P2) extend pins to the outside of the plastic package body; and the first direct current power supply negative terminal (N1) and/or the second direct current power supply negative terminal (N2) extend pins to the outside of the plastic package body. The intelligent power module 300 is a package structure.

In this embodiment, the three gate driving chips A1 to A3 each include an enable input pin SD, and the enable input pins SD of the three gate driving chips are electrically connected by wire bonding; one gate driving chip of the three gate driving chips multiplexes its enable input pin SD as a fault alarm signal output terminal VFO. Specifically, one fault alarm signal output/enable input VFO/SD of the V-phase gate driving chip A2 is connected to the fault alarm signal output/enable input VFO/SD (16) of the intelligent power module 300 located between the V-phase gate driving chip A2 and the W-phase gate driving chip A2 through wire bonding, so as to realize internal connection between the fault alarm signal output/enable input of the V-phase gate driving chip A2 and the fault alarm signal output/enable input of the W-phase gate driving chip A3 in the intelligent power module 300. The other fault alarm signal output/enable input VFO/SD of the V-phase gate driver chip A2 is connected to the fault alarm signal output/enable input VFO/SD (20) of the intelligent power module 300 located between the V-phase gate driver chip A2 and the U-phase gate driver chip A1, so as to implement the internal connection between the fault alarm signal output/enable inputs of the V-phase gate driver chip A2 and the U-phase gate driver chip A1 in the intelligent power module 300.

In this embodiment, the plastic package body of the lead frame is provided with a threaded hole 340, and the threaded hole 340 is used for installing a radiator.

In this implementation, the three-phase direct current power supply negative terminal is connected to one pin through the first conductive structure, so that the number of pins of the intelligent power module is reduced, and the volume of the intelligent power module is reduced.

Further, a fault alarm signal output end/an enabling input end is arranged between adjacent gate driving chips, the three gate driving chips comprise enabling input pins, the enabling input pins of the three gate driving chips are electrically connected through wire bonding, the enabling input pins are multiplexed into the fault alarm signal output end and are respectively connected with alarm signal output pins on two sides of the middle gate driving chip, and wire bonding and layout are facilitated.

Fig. 4 shows a schematic package diagram of an intelligent power module according to a second embodiment of the present utility model.

As shown in fig. 4, the smart power module 400 is different from the smart power module 300a in that the smart power module 400 further includes a second conductive structure 450 located between the gate driving chips A1-A3 and the first side 311 to electrically connect the plurality of fault alarm signal output/enable input pins. The fault alert signal outputs/enable inputs VFO/SD (16) and (20) of the smart power module 400 are electrically connected via the second conductive structure 450.

The enable input pins of the gate driver chips A1-A3 are electrically connected to the fault alarm signal output/enable input VFO/SD via internal metal connection bars, i.e., the second bottom structure 450. Namely, the fault alarm signal output/enable input end of the U-phase gate driving chip A1, the fault alarm signal output/enable input end of the V-phase gate driving chip A1, and the fault alarm signal output/enable input end of the W-phase gate driving chip A1 are all connected with the second conductive structure 450.

The second conductive structure 450 of the present embodiment may also be applied to the smart power modules 300b-300h.

The rest of the present embodiment is the same as the first embodiment, and will not be described here again.

The second conductive structure in this embodiment connects the plurality of alarm signal output terminals/enable input terminals provided on the driving frame together, and only one enable input pin is provided in the gate driving chip, so that the enable input pins in the plurality of gate driving chips can be connected together.

Fig. 5 shows a schematic package diagram of an intelligent power module according to a third embodiment of the present utility model. As shown in fig. 5, the smart power module 500 differs from the smart power module 300b in that the high-side transistor and the low-side transistor are IGBT transistors and fast recovery diodes. The IGBT tubes and the fast recovery diodes are arranged in a staggered mode, or the IGBT tubes and the fast recovery diodes are arranged up and down. The fast recovery diode and the corresponding transistor are arranged on the same base island.

The high-side transistor and the low-side transistor of the present embodiment may also be applied to the smart power module 300a and the smart power modules 300c-300h.

The rest of the present embodiment is the same as the fourth embodiment, and will not be described here again.

Fig. 6 shows a schematic package diagram of an intelligent power module according to a fourth embodiment of the present utility model. As shown in fig. 6, the intelligent power module 600 differs from the intelligent power module 300a in that the second dc supply positive terminal P2 is located between the adjacent U-phase high-side driving levitation supply terminal VBU and V-phase high-side driving levitation supply terminal VBV.

The position of the second dc power supply positive terminal P2 of the present embodiment can also be applied to the intelligent power modules 300b-300h.

The above-mentioned intelligent power modules are described by taking a single panel as an example, but it can be understood that the scheme disclosed in the application can be adopted in the case of the above-mentioned double panel.

It should be noted that in this document relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.

Embodiments in accordance with the present utility model, as described above, are not intended to be exhaustive or to limit the utility model to the precise embodiments disclosed. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the utility model and the practical application, to thereby enable others skilled in the art to best utilize the utility model and various modifications as are suited to the particular use contemplated. The utility model is limited only by the claims and the full scope and equivalents thereof.

Claims

1. An intelligent power module, comprising:

a lead frame having a plurality of islands and a plurality of pins, opposing first and second sides, the first and second sides extending in a lengthwise direction;

a plurality of high-side transistors and a plurality of low-side transistors fixed on the plurality of islands, a plurality of gate driving chips;

a first conductive structure disposed on the lead frame, a portion of the first conductive structure extending in a length direction and at least one end of the first conductive structure extending to a first side or a second side, the plurality of high-side transistors and the plurality of low-side transistors being located between the second side of the lead frame and the first conductive structure, the plurality of gate driver chips being located between the first side of the lead frame and the first conductive structure;

The second ends of the plurality of low-side transistors are connected with the first conductive structure, and at least one end of the first conductive structure serves as a direct current power supply negative end.

2. The smart power module of claim 1 wherein the leadframe further comprises third and fourth sides opposite each other, the third and fourth sides each being perpendicular to the first side.

3. The intelligent power module of claim 2, wherein a low side drive reference ground of the plurality of gate drive chips is connected to the first conductive structure.

4. The smart power module of claim 2 wherein the first conductive structure includes a first end and a second end, the first and second ends of the first conductive structure being proximate to opposing third and fourth sides, respectively.

5. The intelligent power module according to claim 4, wherein a first end of the first conductive structure extends to the first side of the leadframe and is located near an end of the fourth side, and a second end of the first conductive structure extends to the second side and is located near an end of the third side.

6. The smart power module of claim 5 wherein the first conductive structure further extends to a third side and/or a fourth side.

7. The intelligent power module according to claim 4, wherein a first end of the first conductive structure extends to a first side of the leadframe and is located near an end of the fourth side, and a second end of the first conductive structure extends to the third side.

8. The smart power module of claim 7 wherein the first conductive structure further extends to the fourth side.

9. The intelligent power module according to claim 4, wherein a first end of the first conductive structure extends to the second side of the leadframe and is located at an end of the most edge near the third side, and a second end of the first conductive structure extends to the fourth side.

10. The smart power module of claim 9 wherein the first conductive structure further extends to the third side.

11. The intelligent power module according to claim 5 or 6, wherein the first end of the first conductive structure is a second dc supply negative terminal, the second end of the first conductive structure is a first dc supply negative terminal, and at least one of the first dc supply negative terminal and the second dc supply negative terminal extends a pin out of the plastic package of the lead frame.

12. The smart power module of claim 7 or 8 wherein the first end of the first conductive structure acts as a second dc-powered negative terminal and extends pins to the plastic package exterior of the leadframe.

13. The smart power module of claim 9 or 10 wherein the first end of the first conductive structure acts as a first dc supply negative terminal and extends pins to the exterior of the plastic package of the leadframe.

14. The smart power module of claim 2 wherein the plurality of islands includes a first island, a second island, a third island, a fourth island, a fifth island, wherein the first island is located between the first conductive structure and the first side, and the second island, the third island, the fourth island, the fifth island are located between the first conductive structure and the second side.

15. The intelligent power module of claim 14, wherein at least one end of the second island is a positive dc supply end, the positive dc supply end being located on the second side.

16. The intelligent power module according to claim 15, wherein the second island directs a first dc supply positive terminal and a second dc supply positive terminal at the second side;

The first direct current power supply positive end is positioned at one end of the most edge of the second side edge;

the second direct current power supply positive end is positioned between any pair of adjacent two phases on the second side edge.

17. The intelligent power module according to claim 16, wherein at least one of the first dc supply positive terminal and the second dc supply positive terminal extends a pin outside of the plastic package of the lead frame.

18. The intelligent power module according to claim 16, wherein the center-to-center distance between the first dc supply positive terminal and the first dc supply negative terminal is 24.7mm, and the error magnitude is ± 0.3mm.

19. The intelligent power module of claim 16, wherein the high-side drive floating supply and the high-side drive floating supply of any one phase are disposed adjacent to each other.

20. The intelligent power module according to claim 19, wherein the center-to-center distance between the first dc supply negative terminal and the high side drive floating supply ground of the adjacent phase is 3.8mm, and the error magnitude is ± 0.3mm;

the center-to-center distance between the first direct current power supply positive end (P1) and the high-side driving suspension power supply end of the adjacent phase is 3.8mm, and the error amplitude is +/-0.3 mm;

The center-to-center distance between the second direct current power supply positive end (P2) and the high-side driving suspension power supply end of the adjacent phase is 3.8mm, and the error amplitude is +/-0.3 mm;

the center-to-center distance between the second direct current power supply positive end and the high-side driving levitation power supply ground end (VSV) of the adjacent phase is 3.8mm, and the error amplitude is +/-0.3 mm;

the center-to-center distance of the terminals between a pair of adjacent phases was 3.8mm, and the error amplitude was + -0.3 mm.

21. The intelligent power module according to claim 19, wherein the center-to-center spacing between the high-side drive floating supply and the high-side drive floating supply ground for either phase is 1.9mm, and the error magnitude is ± 0.2mm.

22. The intelligent power module according to claim 14, wherein the high-side transistors and the low-side transistors are spaced apart, the plurality of high-side transistors being secured to a common island, the plurality of low-side transistors being secured to respective islands.

23. The intelligent power module according to claim 14, wherein the plurality of gate driver chips are mounted on a common first island, the plurality of high-side transistors are mounted on a common second island, and the plurality of low-side transistors are mounted on a third island, a fourth island, and a fifth island, respectively.

24. The intelligent power module according to claim 1 or 2, wherein the high-side transistor and the low-side transistor are one of a MOS device, an RC-IGBT device, an IGBT device, and a fast recovery diode.

25. The intelligent power module of claim 24, wherein the IGBT tubes and the fast recovery diodes are staggered or arranged one above the other.

26. The intelligent power module of claim 1 or 2, wherein the plurality of pins comprises a plurality of high voltage pins and a plurality of low voltage pins, wherein the plurality of high voltage pins are disposed on the second side of the lead frame and the plurality of low voltage pins are disposed on the first side of the lead frame and are uniformly distributed.

27. The intelligent power module according to claim 26, wherein said low voltage pin comprises two fault alert signal outputs/enable inputs, each located between adjacent gate drive chips.

28. The intelligent power module according to claim 27, wherein each of the three gate driver chips includes an enable input pin, the enable input pins of the three gate driver chips being electrically connected by wire bonding or connected to the fault alarm signal output/enable input pins by internal metal connection bars; one gate driving chip of the three gate driving chips multiplexes the enable input pin thereof as a fault alarm signal output terminal.

29. The intelligent power module of claim 27, further comprising:

and the second conductive structure is positioned between the grid driving chip and the first side edge and electrically connects the plurality of fault alarm signal output pins/enable input pins.

30. The intelligent power module according to claim 29, wherein the fault alert signal output/enable input of the gate drive chip is connected via the second conductive structure.

31. The intelligent power module of claim 1 or 2, wherein the plurality of gate drive chips comprises a first gate drive chip, a second gate drive chip, a third gate drive chip, the plurality of high-side transistors comprises a first high-side transistor, a second high-side transistor, a third high-side transistor, and the plurality of low-side transistors comprises a first low-side transistor, a second low-side transistor, a third low-side transistor.

32. The intelligent power module of claim 31, wherein the second terminal of the first high-side transistor is connected to the first terminal of the first low-side transistor and to a U-phase high-side drive floating supply ground; the output voltage between the U-phase high-side driving suspension power supply end and the U-phase high-side driving suspension power supply ground end supplies power to the motor;

A second terminal of the second high-side transistor is connected to the first terminal of the second low-side transistor and to a V-phase high-side drive floating supply ground; the output voltage between the V-phase high-side driving levitation power supply end and the V-phase high-side driving levitation power supply ground end supplies power to the motor;

a second terminal of the third high-side transistor is connected to the first terminal of the third low-side transistor and to a W-phase high-side drive floating supply ground; the output voltage between the W-phase high-side driving levitation power supply end and the W-phase high-side driving levitation power supply ground end supplies power to the motor;

the first grid driving chip provides grid control signals for the control ends of the first high-side transistor and the first low-side transistor, and the second grid driving chip provides grid control signals for the control ends of the second high-side transistor and the second low-side transistor; the third gate driving chip provides gate control signals to the control ends of the third high-side transistor and the third low-side transistor.

33. The intelligent power module according to claim 1, wherein the first side and the second side have dimensions of 27mm to 32mm, an error magnitude of + -0.3 mm, a vertical spacing of the first side and the second side of 10mm to 15mm, and an error magnitude of + -0.3 mm.

34. The intelligent power module of claim 1, wherein the gate drive chip further comprises a bootstrap diode connected between a power supply terminal and a high-side drive floating power supply terminal of the gate drive chip.

35. The intelligent power module according to claim 1, wherein the plastic package body of the lead frame is provided with a threaded hole, and the threaded hole is used for installing a radiator.

36. The intelligent power module of claim 1, wherein the intelligent power module is a package on package structure.