CN219303696U - Packaging structure of LED device - Google Patents
Packaging structure of LED device Download PDFInfo
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- CN219303696U CN219303696U CN202223552668.6U CN202223552668U CN219303696U CN 219303696 U CN219303696 U CN 219303696U CN 202223552668 U CN202223552668 U CN 202223552668U CN 219303696 U CN219303696 U CN 219303696U
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Abstract
The utility model discloses a packaging structure of an LED device, which comprises a substrate, a plurality of chips, a fluorescent layer and a filling layer, wherein the substrate is provided with a plurality of chips; the chips are mutually independent and fixedly arranged on the surface of the substrate, and form a light-emitting component; the fluorescent layer is covered above the chip, the fluorescent layer is of a ladder-shaped structure with a narrow upper layer and a wide lower layer, and the fluorescent layer and the chip form an independent light-emitting unit; the filling layer is used for filling gaps between adjacent light-emitting units, and the surface of the filling layer is of an arc-shaped slightly convex structure; the chip comprises a chip substrate, a first semiconductor layer, a multiple quantum well layer, a second semiconductor layer and a transparent conducting layer, wherein the first semiconductor layer, the multiple quantum well layer, the second semiconductor layer and the transparent conducting layer are sequentially arranged on the chip substrate, the multiple quantum well layer is arranged between the first semiconductor layer and the second semiconductor layer, the transparent conducting layer is positioned at one end face, far away from the multiple quantum well layer, of the second semiconductor layer, and the transparent conducting layer comprises an n electrode and a p electrode. The packaging structure of the LED device has the advantages of high light utilization efficiency and high luminous brightness.
Description
Technical Field
The utility model relates to the technical field of packaging structures of LED devices, in particular to a packaging structure of an LED device.
Background
With the development of array type integrated LEDs, how to obtain high resolution and high contrast characteristic LED devices become the research trend in the current industry; the higher resolution means smaller pixel pitch, and the smaller the pitch, the more obvious the phenomena of light crosstalk and light overflow of adjacent light emitting elements are, thereby causing unclear pixels and reduced contrast, and introducing a light blocking structure between adjacent elements can improve the contrast of the pixels, but also reduce the light utilization efficiency to a certain extent, and reduce the light emitting brightness.
The existing packaging structure of the LED device is characterized in that a plurality of chips are independently packaged into the LED device and then mounted on a PCB, and the spacing between different pixels after mounting is larger, so that high-resolution pixel display is difficult to realize, and uniform light emission is difficult to ensure; because the black shading materials are directly filled between the LED devices, the final packaging brightness is greatly reduced under the light absorption effect of the black materials; the introduction of the light blocking structure between adjacent LED devices can improve the contrast ratio of the pixel, but also reduces the light utilization efficiency to some extent, and reduces the light emission brightness.
Therefore, the packaging structure of the LED device is provided for overcoming the defects of the prior art.
Disclosure of Invention
The utility model provides a packaging structure of an LED device, and aims to solve the problems of low light utilization efficiency and low light-emitting brightness.
The utility model adopts the following technical scheme:
the packaging structure of the LED device comprises a substrate, a plurality of chips, a fluorescent layer and a filling layer;
the chips are mutually independent and fixedly arranged on the surface of the substrate, and form a light-emitting component;
the fluorescent layer is covered above the chip, the fluorescent layer is of a ladder-shaped structure with a narrow upper layer and a wide lower layer, and the fluorescent layer and the chip form an independent light-emitting unit;
the filling layer is used for filling gaps between adjacent light-emitting units, and the surface of the filling layer is of an arc-shaped micro-convex structure;
the chip comprises a chip substrate, a first semiconductor layer, a multiple quantum well layer, a second semiconductor layer and a transparent conducting layer which are sequentially arranged on the chip substrate, wherein the multiple quantum well layer is arranged between the first semiconductor layer and the second semiconductor layer, the transparent conducting layer is positioned at one end face, far away from the multiple quantum well layer, of the second semiconductor layer, the transparent conducting layer comprises an n electrode and a p electrode, and positive and negative electrodes connected with the n electrode and the p electrode are arranged on the surface of the substrate.
Further as an improvement of the technical scheme of the utility model, the chips are arranged in a matrix on the substrate, and the distance between the adjacent chips is 30-200 mu m.
Further as an improvement of the technical scheme of the utility model, the side surface of the fluorescent layer is in a bevel edge type, circular arc type or step type structure.
Further as an improvement of the technical scheme of the utility model, the filling layer is thermosetting silica gel, and the filling layer is made of non-black materials.
Further as an improvement of the technical scheme of the utility model, the filling layer comprises a first filling layer and a second filling layer, the first filling layer is wrapped on the single light-emitting unit, and the second filling layer is wrapped on the light-emitting assembly in a closing manner.
Further as an improvement of the technical scheme of the utility model, the first filling layer and the second filling layer are communicated with each other.
Compared with the prior art, the utility model has the beneficial effects that:
according to the packaging structure of the LED device, the fluorescent layers with the ladder-shaped structures with the wide upper layers and the narrow lower layers are subjected to patterning treatment, so that different reflection light structures can be provided, the light utilization efficiency is improved, the influence on adjacent elements is reduced, the filling layers are filled between adjacent light-emitting units, and under the action of surface tension, the filling layers are of arc-shaped micro-convex structures, so that the side leakage of light is effectively reduced, and the light-emitting brightness is enhanced. The packaging structure of the LED device has the characteristics of high light utilization efficiency and high luminous brightness.
Drawings
The technology of the present utility model will be described in further detail below with reference to the attached drawings and detailed description:
fig. 1 is a schematic cross-sectional structure of a package structure of an LED device;
FIG. 2 is a schematic diagram of the fabrication of a chip in a package structure of an LED device;
FIG. 3 is a schematic diagram of the fabrication of a phosphor layer in the package structure of an LED device;
FIG. 4 is a schematic illustration of the fabrication of a fill layer in the package structure of an LED device;
FIG. 5 is a schematic diagram of the fabrication of a hypotenuse type phosphor layer in the package structure of an LED device;
fig. 6 is a schematic diagram of manufacturing an arc-shaped fluorescent layer in a package structure of an LED device.
Reference numerals:
1. a chip; 11. a chip substrate; 12. a first semiconductor layer; 13. a multiple quantum well layer; 14. a second semiconductor layer; 15. a transparent conductive layer; 151. an n-electrode; 152. a p electrode;
2. a fluorescent layer;
3. a filling layer; 31. a first filler layer; 32. a second filler layer;
4. a substrate; 401. positive and negative electrodes.
Detailed Description
The conception, specific structure, and technical effects produced by the present utility model will be clearly and completely described below with reference to the embodiments and the drawings to fully understand the objects, aspects, and effects of the present utility model. It should be noted that, in the case of no conflict, the embodiments and features in the embodiments may be combined with each other. The same reference numbers will be used throughout the drawings to refer to the same or like parts.
It should be noted that, unless otherwise specified, when a feature is referred to as being "fixed" or "connected" to another feature, it may be directly or indirectly fixed or connected to the other feature. Further, the descriptions of the upper, lower, left, right, etc. used in the present utility model are merely with respect to the mutual positional relationship of the constituent elements of the present utility model in the drawings.
An encapsulation structure of an LED device, referring to fig. 1 to 6, comprises a plurality of chips 1, a fluorescent layer 2, a filling layer 3 and a substrate 4;
the chips 1 are mutually independent and fixedly arranged on the surface of the substrate 4, and the chips 1 form a light-emitting component; the fluorescent layer 2 with a ladder-shaped structure with a narrow upper layer and a wide lower layer is covered above the chip 1, and the fluorescent layer 2 and the chip 1 form an independent light-emitting unit; the filling layer 3 is used for filling gaps between adjacent light-emitting units, and the surface of the filling layer 3 is of an arc-shaped micro-convex structure; the chip 1 comprises a chip 1 substrate, a first semiconductor layer 12, a multiple quantum well layer 13, a second semiconductor layer 14 and a transparent conductive layer 15 which are sequentially arranged on the chip 1 substrate, wherein the multiple quantum well layer 13 is arranged between the first semiconductor layer 12 and the second semiconductor layer 14, the transparent conductive layer 15 is positioned on one end surface of the second semiconductor layer 14, which is far away from the multiple quantum well layer 13, the transparent conductive layer 15 comprises an n electrode 151 and a p electrode 152, and the surface of the substrate 4 is provided with a positive electrode 401 connected with the n electrode 151 and the p electrode 152; the substrate of the chip 1 is a sapphire substrate, each independent chip 1 is provided with an n electrode 151 and a p electrode 152, and after the substrate of the chip 1 is peeled off, the light loss can be reduced, the light type can be changed, and the light emitting angle can be reduced.
The fluorescent layer 2 with the ladder-shaped structure with the wide upper layer and the narrow lower layer is subjected to graphic treatment, so that the side face can have different reflected light structures, the light utilization efficiency is improved, the influence on adjacent elements is reduced, the filling layer 3 is filled between adjacent light emitting units, the filling layer 3 is of an arc-shaped slightly convex structure under the action of surface tension, the side leakage of light is effectively reduced, and the light-emitting brightness is enhanced. The packaging structure of the LED device has the characteristics of high light utilization efficiency and high luminous brightness.
In one embodiment, the side surface of the fluorescent layer 2 is in a bevel-edge type, circular arc type or step-shaped structure; the areas of the upper layer and the lower layer of the fluorescent layer 2 with the bevel edge type, the circular arc type or the step type structures are equal; the side surface of the fluorescent layer 2 is subjected to patterning treatment, so that different reflected light structures can be provided, the light utilization efficiency is improved, the angle of emergent light is reduced, the light can be effectively reflected by the special side surface structure, and the influence on adjacent elements is reduced.
In one embodiment, the chips 1 are arranged in a matrix on the substrate 4, and the distance between adjacent chips 1 is 30-200 μm.
In one embodiment, the filler layer 3 is a high viscosity, high thixotropic or thermoset silica gel with added surface tension enhancing material, the filler layer 3 being a non-black material; the filling layer 3 comprises a first filling layer 313 and a second filling layer 323, the first filling layer 313 is wrapped on the single light-emitting unit, and the second filling layer 323 is wrapped on the light-emitting assembly in a closing manner; the first filling layer 313 and the second filling layer 323 are communicated with each other; by the action of surface tension, a micro-convex structure is formed on the surface of the adjacent fluorescent layer 2, so that the side leakage of light is reduced.
The manufacturing method of the LED device packaging structure is suitable for the LED device packaging structure and comprises the following steps:
in example 1, referring to fig. 3, it is shown that:
s1, after a first semiconductor layer 12, a multiple quantum well layer 13, a second semiconductor layer 14 and a transparent conductive layer 15 are sequentially grown on a substrate of a chip 1, a bevel-shaped blade is used for precisely cutting the first semiconductor layer 12, the multiple quantum well layer 13, the second semiconductor layer 14 and the transparent conductive layer 15, and an n electrode 151 and a p electrode 152 are formed on the cut transparent conductive layer 15;
s2, peeling the chip 1 substrate, and cutting the light-emitting assembly into a plurality of independent chips 1 by using a blade, wherein each independent chip 1 is provided with an n electrode 151 and a p electrode 152;
s3, performing layered fine cutting on the fluorescent layers 2 by using blades with the same thickness and different widths, and obtaining single fluorescent layers 2 with stepped side structures after finishing cutting;
s3.1, firstly cutting the uppermost layer of the fluorescent layer 2 by using a wider blade, and then sequentially cutting the fluorescent layer 2 by replacing blades with the same thickness and smaller width until a single fluorescent layer 2 is obtained;
s4, mounting the chip 1 obtained in the step S2 in an inverted mode, and connecting the n electrode 151 and the p electrode 152 on the chip 1 with the positive electrode 401 bonding pad and the negative electrode 401 bonding pad on the substrate 4 in a eutectic mode respectively, wherein the first semiconductor layer 12 is positioned at one end far away from the substrate 4 after connection is completed;
s5, adhering and fixing one wide surface of the lower layer of the fluorescent layer 2 in the step S3 on the surface of the first semiconductor layer 12, so as to ensure that the fluorescent layer 2 completely covers the first semiconductor layer 12;
s6, surrounding a template with the same size as the substrate 4 at the position of the light-emitting component, filling the gap of the light-emitting unit in a dispensing mode, ensuring that the surface of the filling layer 3 has an arc-shaped micro-convex structure, and removing the template after the silica gel is cooled and solidified to form the filling layer 3.
In one embodiment, in step S3, the blades have the same thickness and different cross-sectional lengths, the cross-sectional lengths of the blades are reduced, the blades with different thicknesses can be replaced according to the thickness of the fluorescent layer 2, and the cutting times can be kept at 6 times.
In one embodiment, in step S6, the whole filling layer 3 is ensured to be filled with the silica gel in a dispensing manner, no air bubbles are generated, and when the surface of the filling layer 3 is level with the upper surface of the fluorescent layer 2, the dispensing speed can be slowed down, so that the condition that the silica gel overflows due to the fact that the weight of the silica gel is greater than the surface tension and a qualified arc-shaped micro-convex structure cannot be formed is avoided.
In example 2, reference is made to fig. 5 as follows:
s1, after a first semiconductor layer 12, a multiple quantum well layer 13, a second semiconductor layer 14 and a transparent conductive layer 15 are sequentially grown on a substrate of a chip 1, a bevel-shaped blade is used for precisely cutting the first semiconductor layer 12, the multiple quantum well layer 13, the second semiconductor layer 14 and the transparent conductive layer 15, and an n electrode 151 and a p electrode 152 are formed on the cut transparent conductive layer 15;
s2, peeling the chip 1 substrate, and cutting the light-emitting assembly into a plurality of independent chips 1 by using a blade, wherein each independent chip 1 is provided with an n electrode 151 and a p electrode 152;
s3, oblique cutting is carried out on the fluorescent layer 2 by using a bevel blade, and after cutting is finished, a single fluorescent layer 2 with a smooth bevel edge side structure is obtained;
s4, mounting the chip 1 obtained in the step S2 in an inverted mode, and connecting the n electrode 151 and the p electrode 152 on the chip 1 with the positive electrode 401 bonding pad and the negative electrode 401 bonding pad on the substrate 4 in a eutectic mode respectively, wherein the first semiconductor layer 12 is positioned at one end far away from the substrate 4 after connection is completed;
s5, adhering and fixing one wide surface of the lower layer of the fluorescent layer 2 in the step S3 on the surface of the first semiconductor layer 12, so as to ensure that the fluorescent layer 2 completely covers the first semiconductor layer 12;
s6, surrounding a template with the same size as the substrate 4 at the position of the light-emitting component, filling the gap of the light-emitting unit in a dispensing mode, ensuring that the surface of the filling layer 3 has an arc-shaped micro-convex structure, and removing the template after the silica gel is cooled and solidified to form the filling layer 3. In example 3, reference is made to fig. 6:
s1, after a first semiconductor layer 12, a multiple quantum well layer 13, a second semiconductor layer 14 and a transparent conductive layer 15 are sequentially grown on a substrate of a chip 1, a bevel-shaped blade is used for precisely cutting the first semiconductor layer 12, the multiple quantum well layer 13, the second semiconductor layer 14 and the transparent conductive layer 15, and an n electrode 151 and a p electrode 152 are formed on the cut transparent conductive layer 15;
s2, peeling the chip 1 substrate, and cutting the light-emitting assembly into a plurality of independent chips 1 by using a blade, wherein each independent chip 1 is provided with an n electrode 151 and a p electrode 152;
s3, precisely cutting the fluorescent layers 2 by using an arc-shaped blade, and cutting off the connecting ends between the fluorescent layers 2 after cutting is completed to obtain a single fluorescent layer 2 with a smooth arc-shaped side surface structure;
s4, mounting the chip 1 obtained in the step S2 in an inverted mode, and connecting the n electrode 151 and the p electrode 152 on the chip 1 with the positive electrode 401 bonding pad and the negative electrode 401 bonding pad on the substrate 4 in a eutectic mode respectively, wherein the first semiconductor layer 12 is positioned at one end far away from the substrate 4 after connection is completed;
s5, adhering and fixing one wide surface of the lower layer of the fluorescent layer 2 in the step S3 on the surface of the first semiconductor layer 12, so as to ensure that the fluorescent layer 2 completely covers the first semiconductor layer 12;
s6, surrounding a template with the same size as the substrate 4 at the position of the light-emitting component, filling the gap of the light-emitting unit in a dispensing mode, ensuring that the surface of the filling layer 3 has an arc-shaped micro-convex structure, and removing the template after the silica gel is cooled and solidified to form the filling layer 3.
Other contents of the package structure of the LED device of the present utility model are referred to in the prior art, and are not described herein.
The above is only a preferred embodiment of the present utility model, and is not limited in any way, so any modification, equivalent variation and modification made to the above embodiment according to the technical substance of the present utility model still fall within the scope of the technical solution of the present utility model.
Claims (6)
1. The packaging structure of the LED device is characterized by comprising a substrate, a plurality of chips, a fluorescent layer and a filling layer;
the chips are mutually independent and fixedly arranged on the surface of the substrate, and form a light-emitting component;
the fluorescent layer is covered above the chip, the fluorescent layer is of a ladder-shaped structure with a narrow upper layer and a wide lower layer, and the fluorescent layer and the chip form an independent light-emitting unit;
the filling layer is used for filling gaps between adjacent light-emitting units, and the surface of the filling layer is of an arc-shaped micro-convex structure;
the chip comprises a chip substrate, a first semiconductor layer, a multiple quantum well layer, a second semiconductor layer and a transparent conducting layer which are sequentially arranged on the chip substrate, wherein the multiple quantum well layer is arranged between the first semiconductor layer and the second semiconductor layer, the transparent conducting layer is positioned at one end face, far away from the multiple quantum well layer, of the second semiconductor layer, the transparent conducting layer comprises an n electrode and a p electrode, and positive and negative electrodes connected with the n electrode and the p electrode are arranged on the surface of the substrate.
2. The packaging structure of an LED device of claim 1, wherein: the chips are arranged in a matrix on the substrate, and the distance between the adjacent chips is 30-200 mu m.
3. The packaging structure of an LED device of claim 1, wherein: the side surface of the fluorescent layer is in a bevel edge type, arc type or step type structure.
4. The packaging structure of an LED device of claim 1, wherein: the filling layer is thermosetting silica gel, and the filling layer is made of non-black materials.
5. The packaging structure of an LED device of claim 1, wherein: the filling layer comprises a first filling layer and a second filling layer, wherein the first filling layer is wrapped on the single light-emitting unit, and the second filling layer is wrapped on the light-emitting assembly in a closing mode.
6. The LED device package structure of claim 5, wherein: the first filling layer and the second filling layer are communicated with each other.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN202223552668.6U CN219303696U (en) | 2022-12-28 | 2022-12-28 | Packaging structure of LED device |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202223552668.6U CN219303696U (en) | 2022-12-28 | 2022-12-28 | Packaging structure of LED device |
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| CN219303696U true CN219303696U (en) | 2023-07-04 |
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| CN202223552668.6U Active CN219303696U (en) | 2022-12-28 | 2022-12-28 | Packaging structure of LED device |
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