CN219245973U

CN219245973U - PMIC power supply debugger

Info

Publication number: CN219245973U
Application number: CN202320949091.8U
Authority: CN
Inventors: 王月军; 周克智; 刘志军; 孙开瑞; 林子琼
Original assignee: Beijing Etouch Technology Co ltd
Current assignee: Beijing Etouch Technology Co ltd
Priority date: 2023-04-25
Filing date: 2023-04-25
Publication date: 2023-06-23
Anticipated expiration: 2033-04-25

Abstract

The utility model provides a PMIC power supply debugger, which relates to the technical field of power supply debugging and comprises a main control circuit, wherein the main control circuit is connected with an LED display circuit, an LOD chip, a USB circuit, an isolation circuit and an output sampling circuit; the USB circuit is connected to the upper computer; the PMIC circuit is connected with the isolation circuit, the output sampling circuit and the main control circuit, and is also connected with the voltage regulating circuit and the power supply, and the voltage regulating circuit and the LOD chip are both connected with the power supply; the PMIC circuit is preset with a 3-path buck conversion circuit and a 1-path low-dropout voltage regulator. The method is used for solving the problem that in the prior art, the voltage of OTP configuration is only matched with the original factory, so that a chip can only be returned to the original factory, the original factory burns OTP again, a large amount of time and cost are consumed in the process, and the project period is seriously influenced; meanwhile, the conventional PMIC information is required to be queried by means of an upper computer, so that a plurality of inconvenient technical problems are caused for clients.

Description

PMIC power supply debugger

Technical Field

The utility model relates to the technical field of power supply debugging, in particular to a power supply debugger of a PMIC.

Background

Currently, PMIC (Power Management IC) in the market is required to be burned OTP (One Time Programmable) in the original factory, and the customer cannot consider all parameters of the chip at one time at the beginning of design, and when the customer needs to modify certain parameters in the subsequent use process, the voltage of the OTP configuration is only matched with the original factory, so that the chip can only be returned to the original factory to burn the OTP again, which consumes a great amount of time and cost and seriously affects the project period; meanwhile, the conventional PMIC has the problem that the error information needs to be queried by means of an upper computer, which causes a lot of inconvenience to clients.

Disclosure of Invention

The present utility model is directed to a power supply debugger of a PMIC to improve the above-mentioned problems. In order to achieve the above purpose, the technical scheme adopted by the utility model is as follows:

the application provides a PMIC's power debugger, include:

the main control circuit is connected with the LED display circuit, the LOD chip, the USB circuit, the isolation circuit and the output sampling circuit; the USB circuit is connected to the upper computer;

the PMIC circuit is connected with the isolation circuit, the output sampling circuit and the main control circuit, and is also connected with the voltage regulating circuit and the power supply, and the voltage regulating circuit and the LOD chip are both connected with the power supply; the PMIC circuit is preset with a 3-path buck conversion circuit and a 1-path low-dropout voltage regulator.

Further, the master control circuit comprises an R7F71096A chip, the R7F71096A chip is connected with the USB circuit through RXD and TXD ports, and the R7F71096A chip is in communication connection with the PMIC circuit through SCL and SDA.

Further, the R7F71096A chip sends a watchdog timer signal to the PMIC circuit through an IO port, and acquires the output voltage of the PMIC through an AD port to form closed-loop control on the PMIC circuit.

Further, the LED display circuit comprises a tri-color lamp, and RED, GRE, BLU ports of the R7F71096A chip are respectively connected with resistors R27, R28 and R29 of the LED display circuit to control the display of the tri-color lamp.

Further, the main control circuit further comprises a capacitor C4 and a capacitor C5, one end of the capacitor C4 is connected with the VDD of the R7F71096A chip, and the other end of the capacitor C4 is grounded; one end of the capacitor C5 is connected with the REGC port of the R7F71096A chip, and the other end of the capacitor C is grounded.

Further, the PMIC circuit includes a RAA271082 chip, a pull 1 port, a pull 2 port and a pull 3 port of the RAA271082 chip are respectively connected with a buck conversion circuit, and an ldoot 4 port of the RAA271082 chip is connected with a low dropout regulator.

Further, the buck conversion circuit connected with the PUSHE1 port of the RAA271082 chip comprises capacitors C22 and C23 and an inductor L4, the types of the capacitors C22 and C23 are 100nF and 10uF respectively, one end of the inductor L4 is connected with the PUSHE1 port, the other end is connected with the capacitors C22, C23 and VOUT1, and the capacitors C22 and C23 are grounded.

Further, the buck conversion circuit connected with the PUSHE2 port of the RAA271082 chip comprises capacitors C15 and C18 and an inductor L1, the types of the capacitors C15 and C18 are respectively 10uFF and 10uF, one end of the inductor L1 is connected with the PUSHE2 port, the other end of the inductor L1 is connected with the capacitors C15, C18 and VOUT2, and the capacitors C15 and C18 are grounded.

Further, the voltage regulating circuit is connected with the IO end of the PMIC and the power supply respectively, and the IO port of the isolating circuit is connected with the IIC end of the main control circuit and the IIC end of the PMIC respectively.

Further, the output sampling circuit is connected between the PMIC circuit and the main control circuit, and comprises four groups of circuits which are respectively connected with a 3-way buck conversion circuit and a 1-way low-dropout voltage regulator of the PMIC circuit.

The beneficial effects of the utility model are as follows:

the utility model can realize the output of various voltages and can be adjusted, and can realize the voltage adaptation with the OTP, and the customer can modify the parameters of the PMIC by himself, thereby saving a great deal of time cost.

The utility model can quickly and simply realize the modification of the output configuration of the PMIC through the upper computer, and can check the configuration state through the upper computer.

3. Through the isolation chip, the condition of breaking down the MCU of the main control chip can be prevented. And the working state and the error state of the reactive PMCI are displayed through a three-color LED lamp.

Additional features and advantages of the utility model will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the embodiments of the utility model. The objectives and other advantages of the utility model will be realized and attained by the structure particularly pointed out in the written description and claims thereof as well as the appended drawings.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present utility model, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some embodiments of the present utility model and therefore should not be considered as limiting the scope, and other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a schematic diagram of a PMIC power supply debugger according to the present utility model;

FIG. 2 shows a master MCU circuit of a PMIC power supply debugger according to the present utility model;

FIG. 3 is a schematic diagram of a PMIC power source debugger indicator light circuit according to the present utility model;

FIG. 4 is a schematic diagram of a PMIC circuit of a PMIC power supply debugger according to the present utility model;

FIG. 5 is a schematic diagram of a PMIC power supply regulator voltage regulator circuit according to the present utility model;

FIG. 6 is a schematic diagram of an output sampling circuit of a PMIC power supply debugger according to the present utility model;

Detailed Description

For the purpose of making the objects, technical solutions and advantages of the embodiments of the present utility model more apparent, the technical solutions of the embodiments of the present utility model will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present utility model, and it is apparent that the described embodiments are some embodiments of the present utility model, but not all embodiments of the present utility model. The components of the embodiments of the present utility model generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the utility model, as presented in the figures, is not intended to limit the scope of the utility model, as claimed, but is merely representative of selected embodiments of the utility model. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.

It should be noted that: like reference numerals and letters denote like items in the following figures, and thus once an item is defined in one figure, no further definition or explanation thereof is necessary in the following figures. Meanwhile, in the description of the present utility model, the terms "first", "second", and the like are used only to distinguish the description, and are not to be construed as indicating or implying relative importance.

As shown in fig. 1 to 6, the present embodiment provides a power supply debugger of a PMIC, including:

the PMIC circuit is connected with the isolation circuit, the output sampling circuit and the main control circuit, and is also connected with the voltage regulating circuit and the power supply, and the voltage regulating circuit and the LOD chip are both connected with the power supply; the PMIC circuit is preset with a 3-path buck conversion circuit and a 1-path low-dropout voltage regulator;

specifically, the output voltage of the 3-path buck conversion circuit and the 1-path low-dropout voltage regulator and the corresponding power-on time sequence are configured on the upper computer. And configuring the threshold value of overvoltage and undervoltage of each output voltage;

specifically, the LOD chip adopts AMS1117-3.3, and can generate 3.3V to supply power for the MCU;

in particular, the power supply may provide a 12V power supply and a 3.3V power supply, and the PMIC circuit may output a voltage required for the OTP.

Based on the above embodiment, the voltage regulating circuit uses the zener diode U4 to generate a reference voltage of 2.5V, and controls the level of the EN pin to be in the range of 2.5V-1.4V through the resistors R19, R20 and the switch SW3, so as to meet the level requirements of the PMIC circuit on the EN pin in different states.

Based on the above embodiment, the master control circuit includes an R7F71096a chip, the R7F71096a chip is connected with the USB circuit through RXD and TXD ports, the R7F71096a chip is connected with the PMIC circuit through SCL and SDA in a communication manner, the master control circuit may collect an output voltage of the master control circuit, compare the output voltage with a configured threshold of the upper computer, and if the output voltage exceeds the threshold, send an early warning signal to the LED display circuit.

Based on the above embodiment, the R7F71096a chip sends a watchdog timer signal to the PMIC circuit through the IO port, and collects an output voltage of the PMIC through the AD port, forming a closed loop control for the PMIC circuit;

in this embodiment, the MCU may detect whether the PMCI has an error by sending a watchdog timer signal to PMIC, for example, if the PMIC has an error, or if the watchdog timer signal is not received, the pin of the MCU will be pulled high, and an alarm is given.

Based on the above embodiment, the LED display circuit includes a tri-color lamp, and the RED, GRE, BLU port of the R7F71096a chip is connected to the resistors R27, R28, and R29 of the LED display circuit, respectively, to control the display of the tri-color lamp;

specifically, the colors displayed by the three-color lamp include red, green and blue; when serious faults such as overcurrent and overvoltage occur in the PMIC, the tri-color lamp displays red and flashes; when the output voltage exceeds a predetermined range and the like generally fails, the lamp shows red color and slowly flashes. And all fault information can be read through the IIC interface of the MCU, and the corresponding register of the PMIC is displayed on the upper computer interface.

Based on the above embodiment, the master control circuit further includes capacitors C4 and C5, one end of the capacitor C4 is connected to VDD of the R7F71096a chip, and the other end is grounded; one end of the capacitor C5 is connected with the REGC port of the R7F71096A chip, and the other end of the capacitor C is grounded.

Based on the above embodiment, the PMIC circuit includes a RAA271082 chip, a pull 1 port, a pull 2 port and a pull 3 port of the RAA271082 chip are respectively connected with a buck conversion circuit, and an ldoot 4 port of the RAA271082 chip is connected with a low dropout voltage regulator.

Based on the above embodiment, the buck conversion circuit connected to the pull 1 port of the RAA271082 chip includes capacitors C22, C23 and an inductor L4, the types of the capacitors C22, C23 are 100nF and 10uF, respectively, one end of the inductor L4 is connected to the pull 1 port, the other end is connected to the capacitors C22, C23 and VOUT1, and the capacitors C22 and C23 are grounded.

Based on the above embodiment, the buck conversion circuit connected with the pull 2 port of the RAA271082 chip includes capacitors C15 and C18 and an inductor L1, the types of the capacitors C15 and C18 are 10uF and 10uF, respectively, one end of the inductor L1 is connected with the pull 2 port, the other end is connected with the capacitors C15, C18 and VOUT2, and the capacitors C15 and C18 are grounded.

Based on the above embodiment, the voltage regulating circuit is connected with the IO terminal of the PMIC and the power supply, and the IO terminal of the isolation circuit is connected with the IIC terminal of the master control circuit and the IIC terminal of the PMIC circuit, respectively.

Based on the above embodiment, the output sampling circuit is connected between the PMIC circuit and the master control circuit, and the output sampling circuit includes four sets of circuits, which are respectively connected with the 3-way buck conversion circuit and the 1-way low dropout voltage regulator of the PMIC circuit.

Working principle:

firstly, configuring output voltages of a 3-path buck conversion circuit and a 1-path low-dropout voltage regulator and corresponding power-on time sequences on an upper computer, and when pmic is configured, switching on 1 and switching off 2 of SW1, wherein a three-color lamp is blue; after the arrangement is completed, the switch 1 of the SW1 is turned off, the switch 2 is turned off, and the three-color lamp is turned green, which indicates that the PMIC is outputting a voltage, and when the output voltage exceeds the threshold value, the three-color lamp is displayed as red. Meanwhile, the MCU detects whether the PMCI has an error by transmitting a watchdog timer signal to the pmic.

The above description is only of the preferred embodiments of the present utility model and is not intended to limit the present utility model, but various modifications and variations can be made to the present utility model by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present utility model should be included in the protection scope of the present utility model.

The foregoing is merely illustrative of the present utility model, and the present utility model is not limited thereto, and any person skilled in the art will readily recognize that variations or substitutions are within the scope of the present utility model. Therefore, the protection scope of the utility model is subject to the protection scope of the claims.

Claims

1. A power supply debugger for a PMIC, comprising:

2. The PMIC power debugger according to claim 1, wherein: the master control circuit comprises an R7F71096A chip, wherein the R7F71096A chip is connected with the USB circuit through RXD and TXD ports, and the R7F71096A chip is connected with the PMIC circuit through SCL and SDA.

3. The PMIC power debugger according to claim 2, wherein: the R7F71096A chip sends a watchdog timer signal to the PMIC circuit through an IO port, and acquires the output voltage of the PMIC through an AD port to form closed-loop control on the PMIC circuit.

4. A power supply debugger for PMIC according to claim 3, wherein: the LED display circuit comprises a tri-color lamp, and RED, GRE, BLU ports of the R7F71096A chip are respectively connected with resistors R27, R28 and R29 of the LED display circuit to control the display of the tri-color lamp.

5. The PMIC power debugger according to claim 2, wherein: the main control circuit further comprises a capacitor C4 and a capacitor C5, wherein one end of the capacitor C4 is connected with the VDD of the R7F71096A chip, and the other end of the capacitor C4 is grounded; one end of the capacitor C5 is connected with the REGC port of the R7F71096A chip, and the other end of the capacitor C is grounded.

6. The PMIC power debugger according to claim 1, wherein: the PMIC circuit comprises an RAA271082 chip, a PUSHE1 port, a PUSHE2 port and a PUSHE3 port of the RAA271082 chip are respectively connected with a buck conversion circuit, and an LDOOT 4 port of the RAA271082 chip is connected with a low dropout voltage regulator.

7. The PMIC power debugger according to claim 6, wherein: the buck conversion circuit connected with the PUSHE1 port of the RAA271082 chip comprises capacitors C22 and C23 and an inductor L4, wherein the types of the capacitors C22 and C23 are 100nF and 10uF respectively, one end of the inductor L4 is connected with the PUSHE1 port, the other end is connected with the capacitors C22, C23 and VOUT1, and the capacitors C22 and C23 are grounded.

8. The power supply debugger of PMIC according to claim 1, wherein the buck conversion circuit connected to the pull 2 port of the RAA271082 chip includes capacitors C15, C18 and an inductor L1, the capacitors C15, C18 are respectively 10uFF and 10uF, one end of the inductor L1 is connected to the pull 2 port, the other end is connected to the capacitors C15, C18 and VOUT2, and the capacitors C15, C18 are all grounded.

9. The power supply debugger of the PMIC according to claim 1, wherein the voltage regulating circuit is connected with an IO terminal and a power supply of the PMIC, respectively, and an IO port of the isolation circuit is connected with an IIC terminal of the master circuit and an IIC terminal of the PMIC circuit, respectively.

10. The power supply debugger of the PMIC according to claim 1, wherein the output sampling circuit is connected between the PMIC circuit and the master circuit, and the output sampling circuit includes four sets of circuits respectively connected to a 3-way buck conversion circuit and a 1-way low dropout voltage regulator of the PMIC circuit.