CN219201848U

CN219201848U - On-off state isolation detection circuit of multipath solid-state switch

Info

Publication number: CN219201848U
Application number: CN202223243105.9U
Authority: CN
Inventors: 刘成明; 杨秀涛
Original assignee: Guizhou Space Appliance Co Ltd
Current assignee: Guizhou Space Appliance Co Ltd
Priority date: 2022-12-05
Filing date: 2022-12-05
Publication date: 2023-06-16
Anticipated expiration: 2032-12-05

Abstract

The utility model provides an on-off state isolation detection circuit of a multi-path solid-state switch; the control unit is connected with the power supply circuit, the control end of the control unit is respectively connected with the gating control circuit, the state signal circuit and the switch control circuit, and the gating control circuit, the state signal circuit and the switch control circuit are respectively connected with a plurality of solid switches. The input end of the solid-state switch can detect the switch state when being powered on or not powered on, and the current in the detection circuit and the solid-state switch are isolated through the diode, so that the detection current cannot flow into the solid-state switch, and the power circuit is prevented from receiving current interference.

Description

On-off state isolation detection circuit of multipath solid-state switch

Technical Field

The utility model relates to an on-off state isolation detection circuit of a multipath solid-state switch.

Background

In power supply and distribution systems of spacecrafts and aircrafts, solid-state switches are increasingly used for replacing traditional electromechanical relays to perform power distribution control, the solid-state switches are realized by power semiconductor devices, and common power semiconductor devices comprise Metal Oxide Semiconductor Field Effect Transistors (MOSFET), insulated Gate Bipolar Transistors (IGBT), thyristors (SCR) and the like. Among the numerous consumers of space vehicles and aircraft, a power distribution device with a plurality of solid state switches receives the time sequence instruction of a computer to conduct on-off control of power supply to each consumer. Therefore, the solid-state switch is a key device in a power supply and distribution system, and in order to ensure reliable operation of electric equipment, particularly a spacecraft and an aircraft which need to be operated repeatedly for a long time, the on-off state of the solid-state switch needs to be detected on line in real time.

In the prior art, the on or off state is judged by detecting the voltage or current of the output end of the solid-state switch, for example, the publication number is: the current and working state detection circuit of the MOS tube is disclosed by CN202330630U, is connected with the drain electrode of the MOS tube through a resistor serving as a load for detection, uses an electronic switch between a detection port and the resistor as a control device for controlling the on-off of a detection channel, and when the switch is turned on, the drain electrode of the MOS tube and the resistor are conducted on the resistor to form current and voltage, and the current and the voltage of the detection port through the resistor react to the on-off state of the MOS tube. However, when the input end of the solid-state switch is not powered on, the detection cannot be performed, and therefore the on-off switching self-detection of the solid-state switch cannot be performed.

Disclosure of Invention

In order to solve the technical problems, the utility model provides an on-off state isolation detection circuit of a multi-path solid-state switch.

The utility model is realized by the following technical scheme.

The utility model provides an on-off state isolation detection circuit of a multipath solid-state switch; the control unit is connected with the power supply circuit, the control end of the control unit is respectively connected with the gating control circuit, the state signal circuit and the switch control circuit, and the gating control circuit, the state signal circuit and the switch control circuit are respectively connected with a plurality of solid switches.

The power supply circuit comprises an isolation transformer U1, wherein the input end of the isolation transformer U1 is connected with the positive electrode and the negative electrode of a first power supply VCC output by the power end of the control unit, and the output end of the isolation transformer U1 outputs the positive electrode and the negative electrode of a second power supply ISO respectively.

The gating control circuit comprises a digital isolator U2, wherein a VIA, VIB, VIC pin of the digital isolator U2 is respectively connected with a gating control port of the control unit, a VID pin is connected with an enabling port of the control unit, a VDD1 pin and a VDD2 pin are respectively connected with a first power supply VCC and a second power supply ISO, a GND1 pin and a GND2 pin are respectively connected with a first power supply negative electrode DGND and a second power supply negative electrode ISO-GND, and a VoA, voB, voC, voD pin is respectively connected with pins A2, A1, A0 and EN of the analog switch U3; the power end of the analog switch U3 is respectively connected with the second power supply ISO and the second power supply negative electrode ISO-GND, the COM port is connected with the second power supply negative electrode ISO-GND, and the input ends N01-N08 are respectively connected with the power output ends of the solid-state switches.

The switch control circuit comprises the same number of the optical couples as the solid-state switches, wherein the positive electrode of the input end of each optical couple is connected with the power input end of each solid-state switch, the positive electrode of the input end of each optical couple is also connected with a second power supply ISO through a resistor, the negative electrode of the output end of each optical couple is connected with the negative electrode ISO-GND of the second power supply, the positive electrode of the output end of each optical couple is connected with the signal input port of the control unit and is connected with the first power supply VCC through a resistor, the negative electrode of the output end of each optical couple is connected with the negative electrode DGND of the first power supply, and the control signal end of each solid-state switch is connected with the control signal output port of the control unit.

And a diode is also connected between the positive pole of the input end of the optical coupler and the solid-state switch in the forward direction.

The control unit is one of a singlechip, a programmable gate array and a digital signal processor.

The solid-state switch is one of an MOS tube, an IGBT tube and an SCR tube.

The utility model has the beneficial effects that: the input end of the solid-state switch can detect the switch state when being powered or not powered, and the current in the detection circuit is isolated from the solid-state switch through the diode, so that the detection current cannot flow into the solid-state switch, and the power circuit is prevented from receiving current interference.

Drawings

Fig. 1 is a schematic diagram of a MOS tube state detection circuit according to the present utility model.

Detailed Description

The technical solution of the present utility model is further described below, but the scope of the claimed utility model is not limited to the above.

Example 1: as shown in fig. 1, the present embodiment uses MOS transistors as solid-state switching devices; the control unit is connected with the power supply circuit, the control end of the control unit is respectively connected with the gating control circuit, the state signal circuit and the switch control circuit, and the gating control circuit, the state signal circuit and the switch control circuit are respectively connected with a plurality of solid switches.

The control unit is provided with a first power supply VCC and a controller, and the multi-way switch detection unit is provided with a DC-DC isolation transformer U1, a four-way digital isolator U2, an eight-channel analog switch U3, first to eighth photocouplers U4 to U11, first to eighth diodes D1 to D8 and resistors R1 to R16. The first power supply provides a first voltage for direct current power supply for the control unit and the multi-way switch detection unit, an input positive power end Vin of the DC-DC isolation transformer U1 is connected with a first voltage positive end VCC, and an input negative power end GND of the DC-DC isolation transformer U1 is connected with a first voltage negative end DGND; the output end of the DC-DC isolation transformer U1 provides a second voltage of direct current power supply for the multi-way switch detection unit, the second voltage is physically isolated from the first voltage, the output end +Vo of the DC-DC isolation transformer U1 is connected with a second voltage positive end ISO_5V, and the output end 0V of the DC-DC isolation transformer U1 is connected with a second voltage negative end ISO_GND.

The positive power supply end VDD1 of the input side of the four-channel digital isolator U2 is connected with the first voltage positive end VCC, the negative power supply end GND1 of the input side of the four-channel digital isolator U2 is connected with the first voltage negative end DGND, and the signal input end VIA, VIB, VIC, VID of the input side of the four-channel digital isolator U2 is respectively connected with the signal output end gating control IN2, the gating control IN1, the gating control IN0 and the chip selection enabling IN of the controller; the positive power supply end VDD2 of the output side of the four-channel digital isolator U2 is connected with a second voltage positive end ISO_5V, the negative power supply end GND2 of the output side of the four-channel digital isolator U2 is connected with a second voltage negative end ISO_GND, and the signal output end VoA, voB, voC, voD of the output side of the four-channel digital isolator U2 is respectively connected with the control ends A2, A1, A0 and EN of the eight-channel analog switch U3;

the positive power end V+ of the eight-channel analog switch U3 is connected with the second voltage positive end ISO_5V, the negative power ends V-and GND of the eight-channel analog switch U3 are connected with the second voltage negative end ISO_GND, the eight input ends NO 1-NO 8 of the eight-channel analog switch U3 are respectively connected with the output ends of the eight MOS tubes to output 1-8 power output paths, and the public output end COM of the eight-channel analog switch U3 is connected with the second voltage negative end ISO_GND. The input end 1 of the first optocoupler U4 is connected to the first end of the resistor R2 and the anode of the first diode D1, the input end 2 of the first optocoupler U4 is connected to the second voltage negative end iso_gnd, the output end 3 of the first optocoupler U4 is connected to the first voltage negative end DGND, and the output end 4 of the first optocoupler U4 is connected to the first end of the resistor R1 and the signal input end switch state detection signal 1 of the controller. The second end of the resistor R1 is connected with the first voltage positive end VCC, the second end of the resistor R2 is connected with the second voltage positive end ISO_5V, and the cathode of the first diode D1 is connected with the power output end of the MOSQ.

Taking on-off state isolation detection of the 1 st path MOS tube Q1 as an example: the controller sends the gating control signal and the chip selection enabling signal to the four-channel digital isolator U2, the four-channel digital isolator U2 sends the isolated gating control signal and the chip selection enabling signal to the eight-channel analog switch U3, and the input end NO1 of the eight-channel analog switch U3 is controlled to be connected to the common output end COM of the eight-channel analog switch U3, so that the output end power output 1 path of the solid-state switch Q1 is connected to the second voltage negative end ISO_GND. At this time, if the MOS transistor Q1 is in the off state, the second voltage positive terminal iso_5v drives the first optocoupler U4 to be turned on, the voltage formed at the output terminal 4 of the first optocoupler U4 by the first voltage positive terminal VCC after passing through the resistor R1 is 0, so that the voltage of the signal input terminal switch state detection signal 1 of the controller is 0, the MOS transistor Q1 is considered to be in the off state, the resistor R1 and the resistor R2 act as current limiting, and the first diode D1 acts as a protection circuit for preventing the voltage and the current input by the power electricity+ of the input terminal of the MOS transistor Q1 from flowing backward into the device;

if the MOS transistor Q1 is in the on state, the second voltage positive terminal iso_5v forms a closed loop through the resistor R2, the first diode D1, and the MOS transistor Q1 to the second voltage negative terminal iso_gnd, so that the voltage at the input terminal 1 of the first optocoupler U4 is the on voltage drop of the first diode D1, and is close to 0, the first optocoupler U4 is turned off, the voltage at the output terminal 4 of the first optocoupler U4 formed by the first voltage positive terminal VCC through the resistor R1 is VCC, so that the signal input terminal switch state detection signal 1 of the controller is VCC, and the MOS transistor Q1 is considered to be in the on state.

After the detection is completed, the controller controls the connection and disconnection of the input end NO1 of the eight-channel analog switch U3 to the common output end COM. The second voltage positive terminal ISO_5V is physically isolated from the first voltage positive terminal VCC, the second voltage negative terminal ISO_GND is physically isolated from the first voltage negative terminal DGND, and isolation control and isolation detection of signals are realized through the functions of the four-channel digital isolator U2 and the first optocoupler U4.

The circuit connection of the second optical coupler U5 to the eighth optical coupler U11 may refer to the circuit connection of the first optical coupler U4 in the embodiment described above with reference to fig. 1, and the specific implementation manner of the state detection of the 2 nd-8 th MOS transistor Q2 to Q8 may refer to the step of the state detection of the 1 st MOS transistor Q1 in the embodiment described above with reference to fig. 1, and the corresponding input channels of the eight-channel analog switch U3 are switched, which is not described herein again.

Further, referring to fig. 1, the embodiment of the present application may implement fault isolation detection of multiple MOS transistors. In the specific implementation, the signal output end switch control signals 1 to 8 of the controller are respectively connected with the driving ends of the eight MOS tubes Q1 to Q8, and the controller can control the on and off of the MOS tubes Q1 to Q8.

The specific method for detecting the faults of the No. 1 MOS transistor Q1 is as follows: the controller sequentially controls the MOS tube Q1 to be conducted, controls the input end NO1 of the analog switch U3 to be conducted to the public output end COM, and detects a switch state detection signal 1 of the output end 4 of the first optical coupler U4, if the level of the switch state detection signal 1 is high level, the MOS tube Q1 is considered to be conducted normally without faults, and if the level of the switch state detection signal 1 is low level, the MOS tube Q1 is considered to be not conducted, and the MOS tube Q1 has open-circuit faults; the controller sequentially controls the MOS tube Q1 to be turned off, controls the input end NO1 of the analog switch U3 to be conducted to the public output end COM, detects the switch state detection signal 1 of the output end 4 of the first optical coupler U4, considers that the MOS tube Q1 is normally turned off if the level of the switch state detection signal 1 is low level, has NO faults, and considers that the MOS tube Q1 is conducted if the level of the switch state detection signal 1 is high level, and has short circuit faults.

The state detection method of the MOS transistors Q2 to Q8 is the same as that of the MOS transistor Q1.

Example 2: IN the embodiment, an ATmega123 singlechip is used as a control chip on the basis of the embodiment 1, PB 0-PB 2 pins of the singlechip are respectively used as gating control IN 2-gating control IN0 ports and are connected with VIA, VIB, VIC pins of a digital isolation device U2, PB3 pins are used as enabling ports and are connected with gating control IN, and PA 0-PA 7 pins of the singlechip are respectively connected with gates of MOS transistors Q1-Q8 to control on-off of the MOS transistors. Pins PC0 to PC7 are respectively connected with the optical couplers U4 to U11, and are connected with voltage signals of the optical couplers.

Claims

1. The utility model provides a multichannel solid-state switch's break-make state isolation detection circuit which characterized in that: the control unit is connected with the power supply circuit, the control end of the control unit is respectively connected with the gating control circuit, the state signal circuit and the switch control circuit, and the gating control circuit, the state signal circuit and the switch control circuit are respectively connected with a plurality of solid switches.

2. The on-off state isolation detection circuit of a multi-way solid state switch as claimed in claim 1, wherein: the power supply circuit comprises an isolation transformer U1, wherein the input end of the isolation transformer U1 is connected with the positive electrode and the negative electrode of a first power supply VCC output by the power end of the control unit, and the output end of the isolation transformer U1 outputs the positive electrode and the negative electrode of a second power supply ISO respectively.

3. The on-off state isolation detection circuit of a multi-way solid state switch as claimed in claim 1, wherein: the gating control circuit comprises a digital isolator U2, wherein a VIA, VIB, VIC pin of the digital isolator U2 is respectively connected with a gating control port of the control unit, a VID pin is connected with an enabling port of the control unit, a VDD1 pin and a VDD2 pin are respectively connected with a first power supply VCC and a second power supply ISO, a GND1 pin and a GND2 pin are respectively connected with a first power supply negative electrode DGND and a second power supply negative electrode ISO-GND, and a VoA, voB, voC, voD pin is respectively connected with pins A2, A1, A0 and EN of the analog switch U3; the power end of the analog switch U3 is respectively connected with the second power supply ISO and the second power supply negative electrode ISO-GND, the COM port is connected with the second power supply negative electrode ISO-GND, and the input ends N01-N08 are respectively connected with the power output ends of the solid-state switches.

4. The on-off state isolation detection circuit of a multi-way solid state switch as claimed in claim 1, wherein: the switch control circuit comprises the same number of the optical couples as the solid-state switches, wherein the positive electrode of the input end of each optical couple is connected with the power input end of each solid-state switch, the positive electrode of the input end of each optical couple is also connected with a second power supply ISO through a resistor, the negative electrode of the output end of each optical couple is connected with the negative electrode ISO-GND of the second power supply, the positive electrode of the output end of each optical couple is connected with the signal input port of the control unit and is connected with the first power supply VCC through a resistor, the negative electrode of the output end of each optical couple is connected with the negative electrode DGND of the first power supply, and the control signal end of each solid-state switch is connected with the control signal output port of the control unit.

5. The on-off state isolation detection circuit of a multi-way solid state switch as claimed in claim 4, wherein: and a diode is also connected between the positive pole of the input end of the optical coupler and the solid-state switch in the forward direction.

6. The on-off state isolation detection circuit of a multi-way solid state switch as claimed in claim 1, wherein: the control unit is one of a singlechip, a programmable gate array and a digital signal processor.

7. The on-off state isolation detection circuit of a multi-way solid state switch as claimed in claim 1, wherein: the solid-state switch is one of an MOS tube, an IGBT tube and an SCR tube.