CN218630456U

CN218630456U - Wiring structure of electronic paper display array substrate

Info

Publication number: CN218630456U
Application number: CN202223066806.XU
Authority: CN
Inventors: 李秀秀; 赵朗朗; 谈浩; 涂天宝; 童思成
Original assignee: Wuhu Token Sciences Co Ltd
Current assignee: Wuhu Token Sciences Co Ltd
Priority date: 2022-11-18
Filing date: 2022-11-18
Publication date: 2023-03-14
Anticipated expiration: 2032-11-18

Abstract

The utility model discloses a wiring structure of electronic paper display array substrate, substrate surface have the pixel district, the edge of base plate is equipped with the distribution district, the distribution district is equipped with many wiring stacked structure side by side, wiring stacked structure is by first wiring L1, second wiring L2 and the alternative configuration of third wiring L3, every wiring stacked structure homogeneous phase electricity connection pixel district, the signal terminal in other end electricity connection terminal district. The wiring structure of the electronic paper display array substrate can ensure the effect of a narrow frame and can also avoid the open circuit and short circuit of the wiring.

Description

Wiring structure of electronic paper display array substrate

Technical Field

The utility model relates to a display screen technical field especially relates to electronic paper display array substrate's wiring structure.

Background

With the rapid development of electronic paper display technology in recent ten years, electronic paper displays with thin and thin narrow frames are more and more important for people seeking higher cost performance and higher screen ratio. The display screen frame is mainly affected by the wiring area of the electronic paper display array substrate, and the local structure of the electronic paper display array substrate in the prior art is shown in fig. 3, the substrate surface has a pixel area P (i.e. display area), a terminal area T and a wiring area L, wherein the wiring area L and the terminal area T are located outside the pixel area.

The pixel area of the substrate is formed by the TFT array and the pixel area terminals. The wiring region L includes a plurality of wirings L1 to Ln connected between a plurality of pixel terminals P1 to Pn of the pixel region P and a plurality of signal terminals T1 to Tn of the terminal region T. The pixel terminals are electrically connected with the scanning lines or the data lines. A plurality of pixel terminals of the pixel region and a plurality of signal terminals of the terminal region are electrically connected by wirings L1 to Ln, and a data signal is transmitted to the display region.

The problems of the prior art are as follows: in the electronic paper display device, the wiring area L is generally wired by using the same layer or two layers of metal, and in order to reduce the wiring area to achieve the goal of narrow frame, the wiring line width and the line pitch of the wiring area are reduced. Although the purpose of a narrow frame can be achieved by reducing the line width and the line pitch of the wiring region, the adverse phenomena such as wiring disconnection and short circuit between wirings are caused, and the product yield is affected.

Disclosure of Invention

The utility model aims to solve the technical problem that realize one kind and can guarantee the narrow frame effect, also can avoid the distribution to open circuit, the wiring structure of the electron paper display array substrate of short circuit.

In order to realize the purpose, the utility model discloses a technical scheme be: the utility model provides a wiring structure of electronic paper display array substrate, the base plate surface has the pixel district, the edge of base plate is equipped with the wiring district, the wiring district is equipped with many wiring laminated structure side by side, wiring laminated structure is by first wiring L1, second wiring L2 and third wiring L3 alternative configuration, every wiring laminated structure homogeneous end electricity connection pixel district, the signal terminal in other end electricity connection terminal area.

The pixel area is formed by connecting a TFT array and a plurality of pixel terminals, the TFT array comprises a grid electrode, a source electrode and a drain electrode of the TFT, a shading layer is arranged on the TFT array, the pixel terminals P1-Pn are positioned at the edge of the pixel area and used for being electrically connected with the wiring laminated structure, the terminal area is positioned at the edge of the substrate, and the terminal area is provided with signal terminals T1-Tn used for being electrically connected with the wiring laminated structure.

The first wiring L1 is tightly attached to a wiring area of the substrate, a lower insulating layer covers the first wiring L1, the second wiring L2 is fixed to the lower insulating layer, an upper insulating layer covers the second wiring L2, and the third wiring L3 is fixed to the upper insulating layer.

The lower insulating layer is provided with a semiconductor layer which contacts the second wiring L2.

The first wiring L1 and the grid are made of the same metal, and the height positions of the first wiring L1 and the grid on the substrate are the same.

The second wiring L2 is made of the same metal as the source and the drain, and the second wiring L2 is at the same height position on the substrate as the source and the drain.

The third wiring L3 and the light-shielding layer are made of the same metal, and the third wiring L3 and the light-shielding layer have the same height position on the substrate.

The utility model has the advantages of utilize the TFT array substrate's in pixel area grid metal level and source drain metal level, the light shield layer metal level is as the wiring layer respectively, the line width line distance problem that individual layer metal distribution and double-deck metal distribution met easily has been solved, use three-layer alternative distribution can make the array substrate frame reach narrower effect, pixel area display range is bigger, more comfortable in the vision, the screen accounts for than higher, display effect is better, and can avoid the wiring to open circuit or bad phenomena such as short circuit between the distribution, promote the quality and the qualification rate of product.

Drawings

The following is a brief description of the contents expressed by each figure in the specification of the present invention:

fig. 1 is a schematic diagram of a wiring structure of an electronic paper display array substrate according to the present invention;

fig. 2 is a cross-sectional structure diagram of a single laminated structure of the electronic paper display array substrate according to the present invention;

fig. 3 is a schematic diagram of a wiring structure of an electronic paper display array substrate in the prior art.

In fig. 2, 1, a lower insulating layer; 2. a semiconductor layer; 3. an upper insulating layer; 4. and a protective layer.

Detailed Description

The following description of the embodiments with reference to the drawings is intended to illustrate the present invention in further detail, such as the shapes and structures of the components, the mutual positions and connections between the components, the functions and working principles of the components, the manufacturing process, and the operation and use methods, etc., so as to help those skilled in the art understand the present invention more completely, accurately and deeply.

As shown in fig. 1, the surface of the electronic paper display array substrate has a pixel region P (i.e., a display region) defined by a plurality of scan lines and a plurality of data signal lines crossing each other; a wiring region L and a terminal region T; the pixel terminals are electrically connected with the scanning lines or the data lines. Wherein, the wiring region and the terminal region are positioned outside the pixel region; a TFT array (not shown) and a plurality of pixel terminals formed in the pixel region of the substrate; the TFT array comprises a grid electrode, a source electrode and a drain electrode of the TFT, and a shading layer is arranged on the TFT array. The wiring region L includes a plurality of wirings L1 and a plurality of wirings L2 and L3 connected between a plurality of pixel terminals P1 to Pn of the pixel region P and a plurality of signal terminals T1 to Tn of the terminal region T. The plurality of lines L1 and the plurality of lines L2 and L3 are formed as three-layered wiring layers and are alternately arranged.

The wiring area is actually that the first wiring L1, the second wiring L2 and the third wiring L3 are alternately configured to form a wiring laminated structure similar to a wiring harness, and then the wiring laminated structures are arranged side by side, the routing direction of the arrangement can be designed according to needs, the alternately configured structure is shown in fig. 2, the first wiring L1 is closely attached to the wiring area of the substrate, the first wiring L1 is covered with a lower insulating layer 1, the second wiring L2 is fixed on the lower insulating layer 1, the second wiring L2 is covered with an upper insulating layer 3, the third wiring L3 is fixed on the upper insulating layer 3, and the third wiring L3 is covered with a protective layer 4.

During manufacturing, a wiring area of the electronic paper display array substrate corresponding to the glass substrate is tightly attached to the glass substrate to form a first wiring layer and a plurality of first wirings L1, meanwhile, a grid electrode of a TFT array is formed in a pixel area, and the first wirings L1 and the grid electrode are in the same layer and are formed by the same metal; then on the L1 layer is a lower insulating layer 1, and then on the lower insulating layer 1 is a semiconductor layer 2. The second wiring layer is formed with a plurality of second wirings L2 formed in the same layer as the source/drain electrodes of the TFT array in the pixel region and made of the same metal. The third wiring L3 is formed in the same layer as the light-shielding layer of the TFT array in the pixel region and is formed of the same metal. A plurality of first wirings L1, a plurality of second wirings L2 and a plurality of third wirings L3 formed by a first wiring layer, a second wiring layer and a third wiring are alternately arranged, a lower insulating layer 1 is arranged between the first wiring layer and the second wiring layer, and an upper insulating layer 3 is arranged between the second wiring layer and the third wiring layer L3, the upper insulating layer 3 can be fixed by punching, and the third wiring layer L3, ITO pixel electrodes of a pixel area and part or all of the second wiring layer L2 are connected by punching.

The plurality of first wirings of the first wiring layer are formed of the same metal and in the same layer as the gate electrodes of the TFT array. The plurality of second wires of the second wiring layer and the source and drain electrodes of the TFT array are in the same layer and are formed by the same metal. The plurality of third wirings in the third wiring layer are formed of the same metal and in the same layer as the light-shielding layer of the TFT array.

The present invention has been described above with reference to the accompanying drawings, and it is to be understood that the invention is not limited to the specific embodiments described above, and that the invention is not limited to the specific embodiments described above, but rather is intended to cover various insubstantial modifications of the inventive method and solution, or its application to other applications without modification.

Claims

1. A wiring structure of an electronic paper display array substrate is provided, the surface of the substrate is provided with a pixel area, the edge of the substrate is provided with a wiring area, and the wiring structure is characterized in that: the wiring area is provided with a plurality of wiring laminated structures side by side, the wiring laminated structures are alternately arranged by a first wiring L1, a second wiring L2 and a third wiring L3, one end of each wiring laminated structure is electrically connected with the pixel area, and the other end of each wiring laminated structure is electrically connected with a signal terminal of the terminal area.

2. The wiring structure of the electronic paper display array substrate of claim 1, wherein: the pixel area is formed by connecting a TFT array and a plurality of pixel terminals, the TFT array comprises a grid electrode, a source electrode and a drain electrode of the TFT, a shading layer is arranged on the TFT array, the pixel terminals P1-P n are positioned at the edge of the pixel area and used for being electrically connected with a wiring laminated structure, the terminal area is positioned at the edge of the substrate, and the terminal area is provided with signal terminals T1-Tn used for being electrically connected with the wiring laminated structure.

3. The wiring structure of the electronic paper display array substrate of claim 2, wherein: the first wiring L1 is tightly attached to a wiring area of the substrate, a lower insulating layer covers the first wiring L1, the second wiring L2 is fixed to the lower insulating layer, an upper insulating layer covers the second wiring L2, and the third wiring L3 is fixed to the upper insulating layer.

4. The wiring structure of the electronic paper display array substrate according to claim 3, wherein: the lower insulating layer is provided with a semiconductor layer which contacts the second wiring L2.

5. The wiring structure of the electronic paper display array substrate according to claim 3 or 4, wherein: the first wiring L1 and the grid are made of the same metal, and the height positions of the first wiring L1 and the grid on the substrate are the same.

6. The wiring structure of the electronic paper display array substrate according to claim 5, wherein: the second wiring L2 is made of the same metal as the source and the drain, and the height positions of the second wiring L2 and the source and the drain on the substrate are the same.

7. The wiring structure of the electronic paper display array substrate of claim 6, wherein: the third wiring L3 and the light-shielding layer are made of the same metal, and the third wiring L3 and the light-shielding layer have the same height position on the substrate.