CN218416381U

CN218416381U - Multi-frequency-band satellite communication receiving device

Info

Publication number: CN218416381U
Application number: CN202222797389.XU
Authority: CN
Inventors: 黄小东; 唐林; 袁文彬
Original assignee: Sichuan Runze Jingwei Information Technology Co ltd
Current assignee: Sichuan Runze Jingwei Information Technology Co ltd
Priority date: 2022-10-24
Filing date: 2022-10-24
Publication date: 2023-01-31
Anticipated expiration: 2032-10-24

Abstract

The utility model discloses a multi-frequency-band satellite communication receiving device, which comprises at least two RF interfaces and a broadband signal acquisition processing card, wherein the broadband signal acquisition processing card is connected with the RF interfaces and is used for processing the radio frequency signals received by the RF interfaces; the radio frequency signal processing circuit comprises an intermediate frequency signal processing circuit and an ADC circuit, wherein the intermediate frequency signal processing circuit and the ADC circuit are matched with the number of the RF interfaces and are respectively connected with the RF interfaces, and each path of intermediate frequency signal processing circuit carries out filtering, amplification, attenuation and IQ demodulation processing on a radio frequency signal received by each path of RF interface to obtain an I path signal and a Q path signal which are input to the ADC circuit for processing; the ADC circuit comprises two paths of ADC channels and respectively carries out analog-to-digital conversion on the demodulated signals of the I path and the Q path. The device is provided with at least two RF interfaces, so that the receiving of at least two frequency band signals is realized, the processing of a plurality of frequency band signals is realized by matching with the intermediate frequency signal processing circuit and the ADC circuit which are matched with the device, a plurality of devices are not required to be configured, and the layout and the cost of the device are simplified.

Description

Multi-frequency-band satellite communication receiving device

Technical Field

The utility model belongs to the technical field of the satellite communication product, concretely relates to a plurality of frequency channel satellite communication receiving equipment.

Background

Satellite communication, which is simply a communication mode that uses artificial satellites as relay stations to transmit or reflect radio waves between radio communication stations on the earth (including the ground, sleeping and in the lower atmosphere) so as to realize communication between two or more earth stations, is a wireless communication mode, can carry multiple communication services, and is one of the important communication means in today's society.

At present, in satellite communication receiving applications, it is generally necessary to perform receiving processing on signals of multiple frequency bands (multiple frequency bands), and the present application is proposed on the premise.

SUMMERY OF THE UTILITY MODEL

An object of the utility model is to provide a plurality of frequency channel satellite communication receiving equipment, this equipment can receive a plurality of frequency channel signals and handle, need not to dispose a plurality of equipment, simplifies equipment overall arrangement and cost.

Therefore, the utility model provides a plurality of frequency channel satellite communication receiving equipment includes two at least RF interfaces and broadband signal acquisition processing card, broadband signal acquisition processing card links to each other with the RF interface for handle the radio frequency signal that the RF interface received; the radio frequency signal processing circuit comprises an intermediate frequency signal processing circuit and an ADC circuit, wherein the intermediate frequency signal processing circuit and the ADC circuit are matched with the number of the RF interfaces and are respectively connected with the RF interfaces, and each path of intermediate frequency signal processing carries out filtering, amplification, attenuation and IQ demodulation processing on a radio frequency signal received by each path of RF interface to obtain an I path signal and a Q path signal which are input to the ADC circuit for processing; the ADC circuit comprises two paths of ADC channels and respectively carries out analog-to-digital conversion on the demodulated signals of the I path and the Q path.

In some embodiments, the broadband signal acquisition processing card further comprises an FPGA circuit for processing the ADC circuit output signal; further processing of the received data is achieved.

In some embodiments, the broadband signal acquisition processing card further includes a GPS circuit connected to the FPGA circuit for receiving and processing a GPS/BD dual-mode signal, a management data interface connected to the FPGA circuit, and/or a service data interface connected to the FPGA circuit.

In some embodiments, the wideband signal acquisition and processing card further includes a clock circuit for generating clocks of various frequencies to provide operating clocks for the functional circuit units, including a crystal oscillator and a phase-locked loop.

In some embodiments, the broadband signal acquisition and processing card further comprises a power circuit for providing operating power.

In some embodiments, the ADC circuit has a sampling rate of 3000MHz per ADC channel.

The utility model provides a another kind of structure of a plurality of frequency channel satellite communication receiving equipment includes:

the RF interface is used for receiving radio frequency signals and comprises at least two interfaces;

the broadband signal acquisition processing card is used for processing radio frequency signals received by the RF interface and comprises an intermediate frequency signal processing circuit, an ADC (analog to digital converter) circuit, an FPGA (field programmable gate array) circuit, a clock circuit, a power circuit and an interface circuit, wherein the intermediate frequency signal processing circuit, the ADC circuit, the FPGA circuit, the clock circuit, the power circuit and the interface circuit are matched with the RF interface in number and are respectively connected with the RF interface; each path of intermediate frequency signal processing carries out filtering, amplification, attenuation and IQ demodulation processing on the radio frequency signals received by each path of RF interface to obtain I path signals and Q path signals which are input to the ADC circuit for processing; the ADC circuit comprises two paths of ADC channels, and the two paths of ADC channels are used for respectively performing analog-to-digital conversion on the demodulated signals of the I path and the Q path and inputting the demodulated signals into the FPGA circuit for processing; the clock circuit is used for generating clocks with various frequencies to provide working clocks for each functional circuit unit;

the data exchange card comprises an exchange module for providing a data exchange function, an interface circuit connected with the exchange module and a power supply circuit for providing a working power supply; and

the main control card is used for managing the interaction of data and service data, and comprises a CPU processor circuit, an interface circuit, a storage circuit and a GPU, wherein the storage circuit and the GPU are connected with the CPU processor circuit; the GPU is interconnected with the CPU processor circuit, performs data transmission and provides a DP display interface to the outside;

the broadband signal acquisition and processing card, the data exchange card and the main control card are interconnected through a connection interface circuit to carry out data transmission.

In some embodiments, the broadband signal acquisition processing card further comprises a GPS circuit connected to the FPGA circuit for receiving and processing of dual-mode GPS/BD signals.

In some embodiments, the apparatus includes a machine frame, a front panel, a rear panel, and a back panel that fits within an integral cavity formed by the machine frame, the front panel, and the rear panel; the back board is provided with three slot positions which are respectively used for assembling the broadband signal acquisition and processing card, the data exchange card and the main control card, and the interfaces of the interface circuit parts on the broadband signal acquisition and processing card, the data exchange card and the main control card are assembled on the front panel and the rear panel; the front panel is also provided with a power switch and an indicator light, and the rear panel also comprises a power interface electrically connected with the power circuit.

In some embodiments, the whole machine frame further comprises a fan interface for fan assembly, and the fan mounted on the fan interface is electrically connected with the CPU processor circuit.

Adopt the technical scheme of the utility model, the technological effect that can reach includes:

the utility model provides an equipment configuration two at least RF interfaces has realized two at least frequency channel signal's receipt, and the cooperation has realized the processing to a plurality of frequency channel signals rather than assorted intermediate frequency signal processing circuit and ADC circuit, need not to dispose a plurality of equipment, has simplified equipment overall arrangement and cost.

The utility model discloses the sampling rate configuration of the ADC passageway in the equipment is 3000MHz, has realized functions such as intermediate frequency signal collection, data processing to a plurality of L frequency channels (950 MHz ~ 2150 MHz).

The utility model discloses equipment adopts the function card design, connects through the interface mode between the function card, and the equipment of the complete machine of being convenient for, and be convenient for to the maintenance of equipment, when one of them function card broke down, can only change, maintain just to trouble function card, reduced the maintenance degree of difficulty, improved the life of equipment.

The utility model utilizes the interface mode to connect each function card, which improves the data transmission capability; and the interface circuit configured by each functional card can also realize the connection with other equipment or an upper computer, and realize data transmission and service interaction.

The utility model discloses equipment function card is independently assembled in the trench respectively, and the dismouting of being convenient for is favorable to fortune dimension.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and together with the description, serve to explain the principles of the invention. It is obvious that the drawings in the following description are only some embodiments of the invention, and that for a person skilled in the art, other drawings can be derived from them without inventive effort. In the drawings:

fig. 1 is an internal assembly view of the apparatus provided by the present invention;

fig. 2 is a front view of the apparatus provided by the present invention;

fig. 3 is a rear view of the apparatus provided by the present invention;

fig. 4 is a schematic diagram of the apparatus provided by the present invention;

FIG. 5 is a schematic diagram of the broadband signal acquisition and processing card of the present invention;

FIG. 6 is a schematic diagram of a data exchange card according to the present invention;

fig. 7 is a schematic diagram of a main control card according to the present invention;

fig. 8 is a schematic diagram of the backplane hardware components described in the present invention.

Detailed Description

Example embodiments will now be described more fully with reference to the accompanying drawings. Example embodiments may, however, be embodied in many different forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art.

For the receipt processing who realizes a plurality of frequency channels of a equipment, the utility model discloses a plurality of frequency channels satellite communication receiving equipment. With reference to fig. 1-8, the apparatus includes a machine frame 1, a front panel 14, a rear panel 5, a back panel 8 and a fan 9, wherein the machine frame 1, the front panel 14 and the rear panel 5 form a housing having a cavity, and the back panel 8 is assembled in the cavity; the back plate 8 is provided with a slot position for assembling the function card. The fan 9 is assembled on the whole machine frame 1 and used for dissipating heat; the fans 9 can be configured to be one or two, and when the two fans are configured to be two, the two fans are oppositely installed to form convection wind, so that the heat dissipation effect is better.

The function card assembled on the back plate 8 comprises a broadband signal acquisition processing card 11 for acquiring and processing radio frequency signals. Referring to fig. 5, the broadband signal collecting and processing card of the present disclosure includes: the device comprises an intermediate frequency signal processing circuit, an ADC circuit, an FPGA circuit, a clock circuit, an interface circuit, a GPS circuit and a power supply circuit, wherein the functional circuits respectively realize the following functions:

1) The intermediate frequency signal processing circuit comprises a filter, an amplifier, an attenuator and an IQ demodulator, and is used for filtering, amplifying, attenuating, IQ demodulating and the like the input frequency band signal to obtain an I path signal and a Q path signal processed by the ADC circuit; the intermediate frequency signal processing circuit is equal to the number of the RF interfaces for receiving the radio frequency signals so as to process the radio frequency signals received by each RF interface; in the present disclosure, the RF interfaces are configured to be at least two, and the corresponding intermediate frequency signal processing circuits are configured to be two paths, respectively for processing the input 2 paths of radio frequency signals.

2) And the ADC circuit comprises two ADC channels, analog-to-digital conversion (A/D conversion) is respectively carried out on the demodulated signals of the I channel and the Q channel to obtain digital signals, and the digital signals are transmitted to the FPGA circuit through a high-speed JESD204B interface or directly transmitted to a data line for processing, namely data acquisition is finished. The sampling rate of the ADC circuit is configured according to the radio frequency signal to be sampled and processed, so as to realize acquisition of signals of different frequency bands, for example, the sampling rate is configured to 3000MHz, and functions such as intermediate frequency signal acquisition and data processing of multiple L frequency bands (950 MHz to 2150 MHz) can be realized.

3) The FPGA circuit is used for carrying out digital baseband filtering on the digital signal from the ADC circuit and optimizing the signal-to-noise ratio of the signal; then DDC processing is carried out to obtain digital zero-frequency signals of a plurality of carriers; and finally, respectively identifying each carrier to obtain information such as frequency spectrum data, service data and the like.

4) The clock circuit adopts a clock crystal oscillator buffer and a phase-locked loop PLL circuit to generate clocks with various frequencies of 25MHz, 100MHz, 125MHz, 200MHz and the like, and provides working clocks for each circuit unit.

5) The interface circuit comprises a management data interface, and all modules (the intermediate frequency signal processing circuit, the ADC circuit and the FPGA circuit) are communicated by adopting a gigabit Ethernet interface; the business data interface adopts a gigabit Ethernet interface to communicate among the modules because of large data volume; the data interface to the back panel adopts a high-speed connector, and the front panel interface adopts an RJ45 connector.

6) And the GPS circuit is used for receiving and processing the GPS/BD dual-mode signal.

7) And the power supply circuit provides 12V working power supply for the card.

Satellite signal bands can be generally divided into c-band, ku-band, ka-band, S-band, L-band, etc., and each band is defined as follows:

1) The c wave band is a section of frequency band with the frequency of 4.0-8.0 GHz and is used as the frequency band of the downlink transmission signal of the communication satellite;

2) Ku band, wherein the downlink of Ku band is from 10.7 to 12.75GHz, and the uplink is from 12.75 to 18.1GHz;

3) A Ka band, a portion of the microwave band of the electromagnetic spectrum, the frequency range of the Ka band being 26.5-40GHz;

4) The S wave band refers to an electromagnetic wave frequency band with the frequency range of 1.55-3.4 GHz;

8) The L-band is a radio wave band with a frequency of 1-2GHz according to the IEEE 521-2002 standard, and belongs to millimeter waves.

In the present disclosure, the function cards mounted on the backplane 8 may further include a data exchange card 12, and referring to fig. 6, the exchange card mainly includes:

1) And the switching module integrates gigabit Ethernet interfaces and ten-gigabit Ethernet interfaces and provides a data switching function.

2) The interface circuit provides 2 paths of gigabit Ethernet interfaces and 2 paths of gigabit Ethernet interfaces to the back panel, and provides 2 paths of gigabit SFP + interfaces and 1 path of gigabit RJ45 interfaces to the front panel.

3) And the power supply circuit provides 12V working power supply for the board.

The data exchange card 12 and the broadband signal acquisition processing card 11 are cross-linked through an interface, and a gigabit Ethernet interface and/or a gigabit Ethernet interface of the data exchange card and the broadband signal acquisition processing card are connected through a connecting line to realize data transmission.

With reference to fig. 4 and 7, the functional card assembled on the back plate 8 of the device of the present disclosure may be inserted with a main control card 13, after the data exchange card 12 and the broadband signal acquisition and processing card 11 are assembled, or only the broadband signal acquisition and processing card 11 is assembled, to complete the interaction between the management data and the service data, including:

1) The CPU processor circuit and the core of the CPU monitoring management module are used for completing configuration management and state monitoring of the equipment, providing functions of data statistics, data storage, data forwarding, interface data transmission and the like, and providing multiple data interfaces, so that the management mode is more flexible.

2) The storage circuit comprises a DDR4 circuit used for data caching; the FLASH circuit is used for storing information such as system software, logs and the like; the EEPROM circuit is used for storing equipment ID, factory information and the like; and the SSD circuit is used for storing the service data of the equipment.

3) The interface circuit comprises a data interface circuit, a gigabit management data interface and a gigabit service data interface, and adopts a VPX standard connector; the RJ45 interface circuit is used for carrying out data transmission and service interaction with an upper computer or other equipment; and the GPU circuit is interconnected with the CPU through a PCIe bus, performs data transmission and provides a DP display interface to the outside.

When the main control card 13 is configured, a fan interface is configured on the back plate of the equipment, and the fan interface comprises a power interface of the fan and provides power for the fan; the fan interface also comprises a monitoring interface for monitoring and controlling the state of the fan, and the monitoring interface is connected with the CPU processor circuit.

The fan 9 is provided with a rotating speed state signal and a rotating speed control signal, wherein the rotating speed state signal feeds the rotating speed of the fan back to the main control card, and the main control card controls the rotating speed of the fan through the rotating speed control signal. The main control card monitors the temperature of the equipment, and when the temperature of the equipment during working exceeds a certain value 1, the rotating speed of the fan is increased; when the temperature at which the device is operating is below a certain value 2, the fan speed is adjusted down. When the main control board monitors that the rotating speed of the fan is lower than a certain value 3 or higher than a certain value 4, the fan works abnormally, and an alarm is given.

In the present disclosure, a power interface connected to the power module 6 is further configured on the back board of the device, and the power interface is respectively interconnected with the power circuits of the function cards to convert power into working power and provide the working power to the back board.

As shown in fig. 2 and 3, the front panel 14 of the apparatus is provided with a power switch 10 (with indicator light), an indicator light, and a part of interfaces of interface circuits of each function card. The rear panel is provided with:

1) And the power input interface 7 is used for connecting an AC220V/50Hz power supply, is connected with the power module 6, performs AC/DC conversion, and is respectively connected to each functional card through a power interface arranged on the backboard 8.

2) And an intermediate frequency input interface including an L _ RX1 interface 2 and an L _ RX2 interface 3 as RF interfaces, and an N-type female connector.

3) A GPS/BD antenna interface 4, an SMA female head and an external GPS/BD antenna.

4) And the grounding column is used for being connected with the cabinet shell to be grounded.

The main functions that the device of the present disclosure can accomplish are as follows:

(1) And completing data acquisition and processing of the L-band signal.

(2) And completing large bandwidth transmission of L-band collected data.

(3) And finishing the functions of data statistics, storage and forwarding.

(4) Completing shielding of intermediate frequency signals and improving EMC performance, 1) adopting a shielding line for an intermediate frequency signal line, and adopting a special radio frequency interface for an interface; 2) The intermediate frequency circuit adopts a customized shielding case with a cavity body to carry out isolation shielding.

(5) The heat dissipation of the equipment is completed, and the reliability is improved.

(6) The modularization of the equipment is completed, and the equipment is suitable for application of multi-band satellite signal receiving processing.

The above embodiments are only used for illustrating the technical solutions of the present invention and not for limiting, and modifications or equivalent replacements made by those of ordinary skill in the art to the technical solutions of the present invention are all covered within the scope of the claims of the present invention as long as they do not depart from the spirit and scope of the technical solutions of the present invention.

Claims

1. A multi-frequency-band satellite communication receiving device is characterized by comprising at least two RF interfaces and a broadband signal acquisition processing card, wherein the broadband signal acquisition processing card is connected with the RF interfaces and is used for processing radio frequency signals received by the RF interfaces; the radio frequency signal processing circuit comprises an intermediate frequency signal processing circuit and an ADC circuit, wherein the intermediate frequency signal processing circuit and the ADC circuit are matched with the number of the RF interfaces and are respectively connected with the RF interfaces, and each path of intermediate frequency signal processing carries out filtering, amplification, attenuation and IQ demodulation processing on a radio frequency signal received by each path of RF interface to obtain an I path signal and a Q path signal which are input to the ADC circuit for processing; the ADC circuit comprises two paths of ADC channels and is used for performing analog-to-digital conversion on the demodulated signals of the I path and the Q path respectively.

2. The multiple frequency band satellite communications receiver of claim 1, wherein said wideband signal acquisition processing card further comprises FPGA circuitry for processing said ADC circuitry output signals.

3. The multi-band satellite communication receiving device according to claim 2, wherein the broadband signal collecting and processing card further comprises a GPS circuit connected to the FPGA circuit for receiving and processing a GPS/BD dual-mode signal, a management data interface connected to the FPGA circuit, and/or a service data interface connected to the FPGA circuit.

4. The multiple frequency band satellite communications receiver of claim 1, wherein said wideband signal acquisition processing card further comprises clock circuitry, including a crystal oscillator and a phase locked loop, for generating multiple frequency clocks to provide operating clocks for each functional circuit unit.

5. The multiple frequency band satellite communications receiver of claim 1, wherein said wideband signal acquisition processing card further comprises power circuitry for providing operating power.

6. The multiple band satellite communications receiver of claim 1, wherein the ADC circuit has a sampling rate of 3000MHz per ADC channel.

7. A multiple frequency band satellite communications receiver apparatus, comprising:

the RF interface is used for receiving radio frequency signals and comprises at least two;

8. The multiple frequency band satellite communication receiving device of claim 7, wherein said wideband signal acquisition processing card further comprises GPS circuitry connected to said FPGA circuitry for receiving and processing dual-mode GPS/BD signals.

9. The multiple frequency band satellite communication receiving device of claim 7, comprising a machine frame, a front panel, a rear panel, and a back panel, said back panel being mounted within an integral cavity formed by said machine frame, said front panel, and said rear panel; the back board is provided with three slot positions which are respectively used for assembling the broadband signal acquisition and processing card, the data exchange card and the main control card, and partial interfaces of an interface circuit on the broadband signal acquisition and processing card, the data exchange card and the main control card are assembled on the front panel and the rear panel; the front panel is also provided with a power switch and an indicator light, and the rear panel also comprises a power interface electrically connected with the power circuit.

10. The multiple frequency band satellite communication receiving device of claim 9, wherein the machine frame further comprises a fan interface for fan assembly, and a fan mounted on the fan interface is electrically connected to the CPU processor circuit.