CN218331853U - Eight-pin operational amplifier chip test probe card - Google Patents
Eight-pin operational amplifier chip test probe card Download PDFInfo
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- CN218331853U CN218331853U CN202222412363.9U CN202222412363U CN218331853U CN 218331853 U CN218331853 U CN 218331853U CN 202222412363 U CN202222412363 U CN 202222412363U CN 218331853 U CN218331853 U CN 218331853U
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Abstract
The utility model relates to the technical field of chip testing, and discloses an eight-pin operational amplifier chip testing probe card, which comprises a PCB (printed circuit board), wherein a testing unit is arranged on the PCB; the testing unit comprises a chip contact base, a signal adapter base, a first switching branch, four second switching branches and a third switching branch; the first switching branch comprises a first resistor and a first switch, the second switching branch comprises a second resistor, a third resistor and a second switch, the third switching branch comprises a sixth resistor and a third switch, when the test socket is in practical use, a terminal on the chip test socket is electrically connected with a pin of a chip to be tested, a test signal can be sent to the chip to be tested or a return signal can be received from the chip to be tested by controlling the on-off of the switches in the first switching branch, the second switching branch and the third switching branch of the test unit, when the test signal is input to the chip to be tested and the return signal of the chip to be tested is received without manual control, and the test flow is simplified.
Description
Technical Field
The utility model relates to a chip test technical field, concretely relates to chip test probe card is put to eight pin fortune.
Background
Before packaging, the chips need to be tested by using a probe card to screen out bad products in the chips. Because of the wide variety of chip types, different chips require different test circuits. For the operational amplifier chip in the chip, the on-off of the pins of the operational amplifier chip and the peripheral circuit needs to be manually changed during testing, or the on-off of the peripheral signal and the corresponding pins of the operational amplifier chip needs to be manually changed, so that the whole operation process is complicated, the automation degree is low, and the efficiency is low.
SUMMERY OF THE UTILITY MODEL
In view of the deficiencies of the background art, the utility model provides an eight pin fortune are put chip test probe card tests the model and is put the chip for C132-008 fortune, need not the break-make of manual control chip pin and peripheral circuit.
For solving the technical problem, the utility model provides a following technical scheme: an eight-pin operational amplifier chip test probe card comprises a PCB, wherein at least one test unit is arranged on the PCB;
the testing unit comprises a chip contact base, a signal adapter, a first switching branch, four second switching branches, a third switching branch, a capacitor C1 and a capacitor C2;
the first switching branch comprises a first resistor and a first switch, and one end of the first resistor is electrically connected with the second output end of the first switch; the second switching branch comprises a second resistor, a third resistor and a second switch, a first output end of the second switch is respectively and electrically connected with one end of the second resistor and one end of the third resistor, the other end of the second resistor is electrically connected with a second output end of the second switch, and the other end of the third resistor is grounded; the third switching branch comprises a sixth resistor and a third switch, and one end of the sixth resistor is electrically connected with the common end of the third switch;
the first terminal of the chip contact base is electrically connected with the other end of the first resistor; the public end of the first change-over switch is electrically connected with the second terminal of the chip contact base; the second terminal, the third terminal, the fifth terminal and the sixth terminal of the chip contact base are respectively electrically connected with the common end of a second change-over switch of one second change-over branch; a seventh terminal of the chip contact base is electrically connected with the other end of the sixth resistor, and a second output end of the third change-over switch is electrically connected with a sixth terminal of the chip contact base; the fourth terminal of the chip contact base is grounded through a capacitor C1, and the eighth terminal of the chip contact base is grounded through a capacitor C2;
the other ends of the first terminal, the fourth terminal, the eighth terminal, the seventh terminal and the second resistors of the four second switching branches of the chip contact base are respectively and electrically connected with different terminals on the signal adapter.
In one embodiment, four test units are disposed on the PCB.
In one embodiment, the signal adapter of one test unit is located on the left side of the PCB, the signal adapters of two test units are located on the bottom of the PCB, and the signal adapter of one test unit is located on the right side of the PCB.
In a certain embodiment, twelve relays are arranged on the PCB and respectively include a first relay to a twelfth relay, and the relays include two normally open and normally closed channels;
the first change-over switches of the first switching branches of the two test units are two normally open and normally closed channels of the first relay, and the first change-over switches of the first switching branches of the other two test units are two normally open and normally closed channels of the second relay;
the third change-over switches of the third switching branches of the two test units are two normally open and normally closed channels of the fourth relay, and the third change-over switches of the third switching branches of the other two test units are two normally open and normally closed channels of the fourth relay;
taking the four test units as a first test unit to a fourth test unit;
second change-over switches of four second switching branches of the first test unit are respectively a normally open and normally closed channel of a fifth relay, a normally open and normally closed channel of a sixth relay, a normally open and normally closed channel of a seventh relay and a normally open and normally closed channel of an eighth relay;
second transfer switches of four second switching branches of the second test unit are respectively another normally-open and normally-closed channel of the fifth relay, another normally-open and normally-closed channel of the sixth relay, another normally-open and normally-closed channel of the seventh relay and another normally-open and normally-closed channel of the eighth relay;
second change-over switches of four second switching branches of the third test unit are respectively a normally open and normally closed channel of a ninth relay, a normally open and normally closed channel of a tenth relay, a normally open and normally closed channel of an eleventh relay and a normally open and normally closed channel of a twelfth relay;
and the second change-over switches of the four second switching branches of the fourth test unit are respectively another normally-open and normally-closed channel of the ninth relay, another normally-open and normally-closed channel of the tenth relay, another normally-open and normally-closed channel of the eleventh relay and another normally-open and normally-closed channel of the twelfth relay.
In one embodiment, both ends of the control coil of the first to twelfth relays are electrically connected to terminals on the signal adapter.
Compared with the prior art, the utility model beneficial effect who has is: when the test unit is actually used, the terminal on the chip test base is electrically connected with the pin of the chip to be tested, the test signal can be sent to the chip to be tested or the return signal can be received from the chip to be tested by controlling the on-off of the change-over switches in the first change-over branch, the second change-over branch and the third change-over branch of the test unit, the test signal is not input to the chip to be tested by manual control, the return signal of the chip to be tested is not received by manual control, and the test flow is simplified.
Drawings
FIG. 1 is a circuit diagram of a chip holder, a first switching leg, a second switching leg, and a third switching leg of a test cell in an embodiment;
FIG. 2 is a schematic diagram of a signal adapter in an embodiment;
fig. 3 is a wiring diagram of the control coils of twelve relays.
Detailed Description
The present invention will now be described in further detail with reference to the accompanying drawings. These drawings are simplified schematic drawings and illustrate the basic structure of the present invention only in a schematic manner, and thus show only the components related to the present invention.
As shown in fig. 1-2, an eight-pin operational amplifier chip test probe card comprises a PCB board, wherein at least one test unit is arranged on the PCB board;
the testing unit comprises a chip contact base J1, a signal adapter SET1, a first switching branch 1, four second switching branches 2, a third switching branch 3, a capacitor C1 and a capacitor C2;
the first switching branch 1 comprises a first resistor R1 and a first switching switch K5_ S12A, and one end of the first resistor R1 is electrically connected with a second output end of the first switching switch K5_ S12A; the second switching branch 2 comprises a second resistor R2, a third resistor R3 and a second switch K6_ S12A, a first output end of the second switch K6_ S12A is respectively electrically connected with one end of the second resistor R2 and one end of the third resistor R3, the other end of the second resistor R2 is electrically connected with a second output end of the second switch K6_ S12A, and the other end of the third resistor R3 is grounded; the third switching branch 3 comprises a sixth resistor R6 and a third switch K5_2 \/s12a, and one end of the sixth resistor R6 is electrically connected with the common terminal of the third switch K5_2 \/s12a; it should be noted that, for the sake of convenience, the second resistors and the third resistors in the remaining three second switching legs 2 in fig. 1 are not represented by R2 and R3, and the second switches in the remaining three second switching legs 2 are not represented by K6_ S12A;
a first terminal PIN1 of the chip contact base J1 is electrically connected with the other end of the first resistor R1; the public end of the first switch K5_ S12A is electrically connected with the second terminal PIN2 of the chip contact base J1; the second terminal PIN2, the third terminal PIN3, the fifth terminal PIN5 and the sixth terminal PIN6 of the chip contact base J1 are respectively and electrically connected with the public end of a second selector switch K6_ S12A of a second switching branch 2; a seventh terminal PIN7 of the chip contact base J1 is electrically connected with the other end of the sixth resistor R6, and a second output end of the third change-over switch K5_2 \ S12A is electrically connected with a sixth terminal PIN6 of the chip contact base J1; the fourth terminal PIN4 of the chip contact base J1 is grounded through a capacitor C1, and the eighth terminal PIN8 of the chip contact base J1 is grounded through a capacitor C2;
the other ends of the first terminal PIN1, the fourth terminal PIN4, the eighth terminal PIN8, the seventh terminal PIN7 of the chip contact base J1 and the second resistors R2 of the four second switching branches 2 are electrically connected with different terminals on the signal transfer base SET1 respectively.
In this embodiment, the first switch K5_ S12A, the second switch K6_ S12A, and the third switch K5_2 _s12ahave the same pin distribution, and taking the first switch K5_ S12A as an example, the common terminal thereof is a terminal labeled "3", the first output terminal thereof is a terminal labeled "2", and the second output terminal thereof is a terminal labeled "4".
In practical use, the terminal on the chip test socket J1 is electrically connected with the pin of the chip to be tested, the test signal can be sent to the chip to be tested or the return signal can be received from the chip to be tested by controlling the on-off of the switches in the first switching branch 1, the second switching branch 2 and the third switching branch 3 of the test unit, the test signal is not input to the chip to be tested by manual control, and the return signal of the chip to be tested is not received by manual control, so that the test flow is simplified.
In order to increase the number of chips to be tested, in this embodiment, four test units are disposed on the PCB, and the four test units include four signal adapters SET1. Specifically, the signal adapter of one test unit is located on the left side of the PCB, the signal adapters of two test units are located at the bottom of the PCB, and the signal adapter of one test unit is located on the right side of the PCB.
When four test units are arranged on the PCB, twenty-four change-over switches are required for the four test units. In order to facilitate the test, twelve relays are arranged on the PCB and respectively comprise a first relay to a twelfth relay, and each relay comprises two normally-open and normally-closed channels;
the first change-over switches K5_ S12A of the first switching branches 1 of the two test units are two normally open and normally closed channels of the first relay, and the first change-over switches K5_ S12A of the first switching branches 1 of the other two test units are two normally open and normally closed channels of the second relay;
the third change-over switches K5_2 \/s12a of the third switching branches 3 of the two test units are two normally open and normally closed channels of the fourth relay, and the third change-over switches K5_2 \/s12a of the third switching branches 3 of the other two test units are two normally open and normally closed channels of the fourth relay;
taking the four test units as a first test unit to a fourth test unit;
the second change-over switches K6_ S12A of the four second switching branches 2 of the first testing unit are respectively a normally open and normally closed channel of the fifth relay, a normally open and normally closed channel of the sixth relay, a normally open and normally closed channel of the seventh relay, and a normally open and normally closed channel of the eighth relay;
second transfer switches K6_ S12A of four second switching branches 2 of the second test unit are respectively another normally-open and normally-closed channel of the fifth relay, another normally-open and normally-closed channel of the sixth relay, another normally-open and normally-closed channel of the seventh relay and another normally-open and normally-closed channel of the eighth relay;
the second change-over switches K6_ S12A of the four second switching branches 2 of the third testing unit are respectively a normally open and normally closed channel of the ninth relay, a normally open and normally closed channel of the tenth relay, a normally open and normally closed channel of the eleventh relay and a normally open and normally closed channel of the twelfth relay;
the second switches K6_ S12A of the four second switching branches 2 of the fourth test unit are respectively another normally open and normally closed channel of the ninth relay, another normally open and normally closed channel of the tenth relay, another normally open and normally closed channel of the eleventh relay, and another normally open and normally closed channel of the twelfth relay.
The wiring diagram of the control coils of twelve relays is shown in FIG. 3, in which
The control coil K5_ S12C is a control coil of the first relay; the control coil K5_ S34C is a control coil of the second relay;
the control coil K5_2 _s12cis the control coil of the third relay; the control coil K5_2 _s34cis the control coil of the fourth relay;
the control coil K6_ S12C is a control coil of the fifth relay; the control coil K6_2 _s12cis the control coil of the sixth relay; the control coil K7_ S12C is a control coil of the seventh relay; the control coil K7_2 _s12cis the control coil of the eighth relay;
the control coil K6_ S34C is a control coil of the ninth relay; the control coil K6_2 _s34cis the control coil of the tenth relay; the control coil K7_ S34C is a control coil of the eleventh relay; control coil K7_2 _s34cis the control coil of the twelfth relay;
for the control coils of the twelve relays, 5V voltage is respectively input to one end of each control coil, and in actual use, the 5V voltage can be connected to a terminal of the signal adapter SET1, one end of each control coil is electrically connected with a 5V terminal on the signal adapter SET1 through a lead, and the other end of each control coil is connected to a terminal on the signal adapter SET1. In this embodiment, twelve control coils are connected to different signal sockets SET1, and for the signal socket SET1 shown in fig. 3, the other ends of the control coil K5_ S12C, the control coil K5_2 \/s12c, the control coil K6_ S12C, the control coil K6_2 \/s12c, the control coil K7_ S12C, and the control coil K7_2 \/s12c are connected to the signal socket SET1, and the other ends of the remaining control coils can be connected to other signal sockets, specifically, testing is performed according to actual test requirements.
When the test device is in actual use, when the control coil of the relay is connected with a power supply, the control coil is electrified to act, and then the normally open contact of the relay is closed and the normally closed contact is disconnected, so that the utility model can control the on-off of the corresponding change-over switch by controlling the on-off of the power supply of the control coil of the relay in actual use, and further can automatically control whether to input a test signal to a chip to be tested which is electrically connected with a terminal of a chip test seat or receive a return signal of the chip to be tested, and different manual operations, namely the on-off of the corresponding switch is not manually controlled, thereby simplifying the test flow; and all devices are arranged on the PCB, so that the problem that the testing of the devices is influenced by poor contact of the electric leads is not worried about.
In light of the above, the present invention is not limited to the above embodiments, and various changes and modifications can be made by the worker without departing from the scope of the present invention. The technical scope of the present invention is not limited to the content of the specification, and must be determined according to the scope of the claims.
Claims (5)
1. An eight-pin operational amplifier chip test probe card is characterized by comprising a PCB (printed circuit board), wherein at least one test unit is arranged on the PCB;
the testing unit comprises a chip contact base, a signal adapter, a first switching branch, four second switching branches, a third switching branch, a capacitor C1 and a capacitor C2;
the first switching branch comprises a first resistor and a first switch, and one end of the first resistor is electrically connected with the second output end of the first switch; the second switching branch comprises a second resistor, a third resistor and a second switch, a first output end of the second switch is electrically connected with one end of the second resistor and one end of the third resistor respectively, the other end of the second resistor is electrically connected with a second output end of the second switch, and the other end of the third resistor is grounded; the third switching branch comprises a sixth resistor and a third switch, and one end of the sixth resistor is electrically connected with the common end of the third switch;
the first terminal of the chip contact base is electrically connected with the other end of the first resistor; the common end of the first change-over switch is electrically connected with the second terminal of the chip contact base; the second terminal, the third terminal, the fifth terminal and the sixth terminal of the chip contact base are respectively and electrically connected with the public end of a second change-over switch of one second change-over branch; a seventh terminal of the chip contact base is electrically connected with the other end of the sixth resistor, and a second output end of the third change-over switch is electrically connected with a sixth terminal of the chip contact base; the fourth terminal of the chip contact base is grounded through a capacitor C1, and the eighth terminal of the chip contact base is grounded through a capacitor C2;
the other ends of the first terminal, the fourth terminal, the eighth terminal, the seventh terminal and the second resistors of the four second switching branches of the chip contact base are respectively electrically connected with different terminals on the signal adapter.
2. The probe card for testing the eight-pin operational amplifier chip of claim 1, wherein four test units are arranged on the PCB.
3. The probe card for testing the eight-pin operational amplifier chip according to claim 2, wherein the signal adapter of one test unit is located at the left side of the PCB, the signal adapter of two test units is located at the bottom of the PCB, and the signal adapter of one test unit is located at the right side of the PCB.
4. The eight-pin operational amplifier chip test probe card according to claim 2, wherein twelve relays are arranged on the PCB, and are respectively a first relay to a twelfth relay, and the relays comprise two normally open and normally closed channels;
the first change-over switches of the first switching branches of the two test units are two normally open and normally closed channels of the first relay, and the first change-over switches of the first switching branches of the other two test units are two normally open and normally closed channels of the second relay;
the third change-over switches of the third switching branches of the two test units are two normally open and normally closed channels of the fourth relay, and the third change-over switches of the third switching branches of the other two test units are two normally open and normally closed channels of the fourth relay;
taking the four test units as a first test unit to a fourth test unit;
second change-over switches of four second switching branches of the first test unit are respectively a normally open and normally closed channel of a fifth relay, a normally open and normally closed channel of a sixth relay, a normally open and normally closed channel of a seventh relay and a normally open and normally closed channel of an eighth relay;
second transfer switches of four second switching branches of the second test unit are respectively another normally-open and normally-closed channel of the fifth relay, another normally-open and normally-closed channel of the sixth relay, another normally-open and normally-closed channel of the seventh relay and another normally-open and normally-closed channel of the eighth relay;
second change-over switches of four second switching branches of the third test unit are respectively a normally open and normally closed channel of a ninth relay, a normally open and normally closed channel of a tenth relay, a normally open and normally closed channel of an eleventh relay and a normally open and normally closed channel of a twelfth relay;
the second change-over switches of the four second switching branches of the fourth test unit are respectively another normally open and normally closed channel of the ninth relay, another normally open and normally closed channel of the tenth relay, another normally open and normally closed channel of the eleventh relay and another normally open and normally closed channel of the twelfth relay.
5. The probe card for testing the eight-pin operational amplifier chip according to claim 4, wherein two ends of the control coils of the first to twelfth relays are electrically connected to terminals on the signal adapter.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202222412363.9U CN218331853U (en) | 2022-09-13 | 2022-09-13 | Eight-pin operational amplifier chip test probe card |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202222412363.9U CN218331853U (en) | 2022-09-13 | 2022-09-13 | Eight-pin operational amplifier chip test probe card |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN218331853U true CN218331853U (en) | 2023-01-17 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202222412363.9U Active CN218331853U (en) | 2022-09-13 | 2022-09-13 | Eight-pin operational amplifier chip test probe card |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN218331853U (en) |
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2022
- 2022-09-13 CN CN202222412363.9U patent/CN218331853U/en active Active
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