CN212031656U - Operational amplifier test module of integrated circuit test system - Google Patents
Operational amplifier test module of integrated circuit test system Download PDFInfo
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- CN212031656U CN212031656U CN201922309507.6U CN201922309507U CN212031656U CN 212031656 U CN212031656 U CN 212031656U CN 201922309507 U CN201922309507 U CN 201922309507U CN 212031656 U CN212031656 U CN 212031656U
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Abstract
The utility model discloses a test module is put in integrated circuit test system's fortune. The test module comprises a chip switching card seat, an auxiliary operational amplifier test loop, an optical coupling matrix and a test system interface, wherein the optical coupling matrix is connected with the chip switching card seat and the test system interface on one hand, and is connected with the auxiliary operational amplifier test loop on the other hand. The test module is matched with an integrated circuit test system, the automatic control of the optocoupler matrix is realized, the operational amplifier chip to be tested is connected into the auxiliary operational amplifier test circuit, and the auxiliary operational amplifier test circuit is controlled to realize the test task of the operational amplifier chip to be tested according to the test specification of the operational amplifier chip to be tested. In addition, the operational amplifier test module is flexible in configuration and convenient to operate.
Description
Technical Field
The utility model relates to a test module is put in integrated circuit test system's fortune (hereinafter for short fortune put test module), belongs to integrated circuit test technical field.
Background
With the wide application of digital integrated circuits, integrated circuit test systems are becoming more and more important. It has been observed by those skilled in the art that testing is essentially the biggest bottleneck in the production of integrated circuits. Since chips in the production process of integrated circuits are tested, it is most important to reduce the test cost for testing large-scale integrated circuit products.
Generally, the hardware devices required for testing integrated circuit chips mainly include a test module, a test circuit and a test pin. The test module is used for distributing system resources of the test equipment such as test ports and the like to each pin of the tested chip, completely loading various test signals sent by the test system to related pins of the tested chip, and completely transmitting response signals of the tested chip to the test system. The essence of the test module is therefore the signal path circuit board between the integrated circuit test equipment and the integrated circuit chip, which has become one of the standard configurations of integrated circuit test systems.
At present, the number of test modules of the operational amplifier chip of the integrated circuit specially developed for the integrated circuit test system in the market is small, and the matching performance is still not ideal enough, so that the requirements of the majority of users are difficult to meet.
Disclosure of Invention
The utility model aims to solve the technical problem that a test module is put to integrated circuit test system's fortune is provided.
In order to achieve the above purpose, the utility model adopts the following technical scheme:
an operational amplifier test module of an integrated circuit test system comprises a chip switching card seat, an auxiliary operational amplifier test loop, an optical coupling matrix and a test system interface, wherein the optical coupling matrix is connected with the chip switching card seat and the test system interface on one hand, and is connected with the auxiliary operational amplifier test loop on the other hand.
Preferably, the chip adapter card seat is provided with a plurality of sockets for connecting pins of the operational amplifier chip to be tested.
Wherein more preferentially, supplementary fortune is put test circuit and is put the unit including the fortune that awaits measuring and supplementary fortune, await measuring fortune and put the first input of unit and be provided with first relay between input power supply voltage and the ground wire, the second input that the unit was put to fortune that awaits measuring respectively through second relay and third relay corresponding with the unit is put to fortune that awaits measuring the output of supplementary fortune the unit is connected, the output that the unit was put to fortune that awaits measuring pass through the fourth relay with an input of supplementary fortune is put the unit and is connected, another input of supplementary fortune is put the unit with the third input that the unit was put to fortune that awaits measuring ground connection respectively, the output that the unit was put to fortune that awaits measuring still passes through fifth relay and first resistance ground connection, the output that the unit was put to supplementary fortune still connects low level voltage and passes through capacitance ground connection.
Preferably, the operational amplifier unit to be tested comprises an operational amplifier to be tested, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth relay and a seventh relay, wherein a positive phase input end of the operational amplifier to be tested is respectively connected with one end of the second resistor and the sixth relay, the other end of the second resistor is respectively connected with one end of the third resistor and one end of the fourth resistor and the sixth relay, a negative phase input end of the operational amplifier to be tested is respectively connected with one end of the fifth resistor and the seventh relay, and the other end of the fifth resistor is respectively connected with the sixth resistor, one end of the seventh resistor and the seventh relay; the other ends of the sixth resistor and the third resistor are connected together to serve as a first input end of the operational amplifier unit to be detected, the other ends of the fourth resistor and the seventh resistor correspondingly serve as a second input end and a third input end of the operational amplifier unit to be detected, and the output end of the operational amplifier to be detected serves as the output end of the operational amplifier unit to be detected.
Preferably, the auxiliary operational amplifier unit includes an auxiliary operational amplifier, an eighth resistor, a ninth resistor and an eighth relay, a positive phase input terminal of the auxiliary operational amplifier is connected to one end of the eighth resistor and one end of the ninth resistor, respectively, the other end of the eighth resistor serves as an input terminal of the auxiliary operational amplifier unit, the eighth relay is disposed between the other end of the ninth resistor and a bias voltage and a ground line, an inverting input terminal of the auxiliary operational amplifier serves as another input terminal of the auxiliary operational amplifier unit, and an output terminal of the auxiliary operational amplifier serves as an output terminal of the auxiliary operational amplifier unit.
Preferably, the optical coupling matrix comprises a plurality of groups of optical coupling relays, and each group of optical coupling relays is respectively connected with a corresponding socket on the chip switching card seat on one hand, and is respectively and correspondingly connected with a positive phase input end, a negative phase input end and an output end of the operational amplifier to be tested and the test system interface on the other hand.
Preferably, each group of optocoupler relays respectively comprises 3 optocoupler relays for corresponding connection with the positive input end, the negative input end and the output end of the operational amplifier to be tested.
Preferably, the test system interface is a socket for a plurality of pins on a printed circuit board.
Preferably, the sockets for the pins of the test system interface are identical to the sockets for the plurality of pins on the integrated circuit test head.
Preferably, the test system interface comprises a test channel, a test power supply and a test ground.
The utility model provides a test module is put to fortune puts test circuit, opto-coupler matrix and test system interface through setting up chip switching cassette, supplementary fortune to mutually support with integrated circuit test system, realize that automatic control opto-coupler matrix will await measuring fortune and put the chip and insert supplementary fortune and put test circuit, and put the test specification of chip according to awaiting measuring fortune, control supplementary fortune is put test circuit and is realized putting the test task of chip to the fortune that awaits measuring. In addition, the operational amplifier test module is flexible in configuration and convenient to operate.
Drawings
Fig. 1 is a schematic diagram of a operational amplifier testing module provided by the present invention;
fig. 2 is a schematic diagram of a test of the operational amplifier test module provided by the present invention;
fig. 3 is a schematic diagram of an optical coupling matrix structure of the operational amplifier testing module provided by the present invention;
fig. 4 is a schematic diagram of the operational amplifier testing module according to the present invention.
Detailed Description
The technical content of the present invention will be further described in detail with reference to the accompanying drawings and specific embodiments.
As shown in fig. 1, the utility model provides a test module is put to fortune, put test Circuit 2, optical coupling matrix 3 and test system interface 4 including setting up chip switching cassette 1, supplementary fortune on Printed Circuit Board (Printed Circuit Board), optical coupling matrix 3 connects chip switching cassette 1 and test system interface 4 on the one hand, and test Circuit 2 is put to supplementary fortune in the connection of on the other hand optical coupling matrix 3.
The test system interface 4 of the operational amplifier test module is connected to a test head of an integrated circuit test system, one or more operational amplifier chips to be tested are installed on the chip switching card seat 1, a test program of the operational amplifier chips to be tested is selected in test software of the integrated circuit test system, and clicking and loading are carried out. At this moment, the operational amplifier testing module can automatically control the optocoupler matrix 3 to connect the selected operational amplifier chip into the auxiliary operational amplifier testing loop 2 according to the name of the selected operational amplifier chip, and control the auxiliary operational amplifier testing loop 2 to realize parameter testing of the operational amplifier chip to be tested according to the testing specification of the operational amplifier chip.
The chip transfer card holder 1 is provided with a plurality of sockets (such as sockets PIN0-11 shown in FIG. 3) for connecting PINs of the operational chip to be tested, so that the chip transfer card holder 1 can firmly fix one or more operational chips to be tested on the chip transfer card holder 1, and on the other hand, the PINs of the operational chip to be tested can be connected to the printed circuit board, so that the operational chip to be tested is connected with the optical coupling matrix 3. Therefore, the chip adapter card holder 1 is equivalent to an operational amplifier chip clamp fixed on a printed circuit board. The specific implementation of the chip adapting card holder 1 is a conventional technology that can be grasped by a person skilled in the art, and is not described herein.
As shown in fig. 2, the auxiliary operational amplifier test circuit 2 includes an operational amplifier unit to be tested 21 and an auxiliary operational amplifier unit 22, a first relay K1 is disposed between a first input terminal of the operational amplifier unit to be tested 21 and an input power voltage VIC and a ground line, a second input terminal of the operational amplifier unit to be tested 21 is connected to an output terminal of the operational amplifier unit to be tested 21 through a second relay K2 and a third relay K3 respectively, the operational amplifier unit to be tested 21 and the output terminal of the auxiliary operational amplifier unit 22 are connected to one input terminal of the auxiliary operational amplifier unit 22 through a fourth relay K4, the other input terminal of the auxiliary operational amplifier unit 22 and a third input terminal of the operational amplifier unit to be tested 21 are grounded respectively, an output terminal of the operational amplifier unit to be tested 21 is grounded through a fifth relay K5 and a first resistor R1, and an output terminal of the auxiliary operational amplifier unit 22 is connected to a low level voltage VL and grounded through a capacitor C.
As shown in fig. 2, the operational amplifier unit to be tested 21 includes an operational amplifier DUT to be tested, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a sixth relay K6, and a seventh relay K7; the connection relationship of each part of the operational amplifier unit to be tested 21 is as follows: the positive phase input end of the operational amplifier DUT to be tested is respectively connected with one end of the second resistor R2 and one end of the normally open contact of the sixth relay K6, and the other end of the second resistor R2 is respectively connected with the other end of the normally open contact of the sixth relay K6, one end of the third resistor R3 and one end of the fourth resistor R4; the inverting input end of the operational amplifier DUT to be tested is respectively connected with one end of a fifth resistor R5 and one end of a normally open contact of a seventh relay K7, and the other end of a fifth resistor R5 is respectively connected with the other end of the normally open contact of the seventh relay K7, one end of a sixth resistor R6 and one end of a seventh resistor R7; the other ends of the sixth resistor R6 and the third resistor R3 are connected together to serve as a first input end of the operational amplifier unit to be tested 21, the other ends of the fourth resistor R4 and the seventh resistor R7 are correspondingly served as a second input end and a third input end of the operational amplifier unit to be tested 21, and an output end of the operational amplifier to be tested DUT serves as an output end of the operational amplifier unit to be tested 21. The positive phase input end, the negative phase input end and the output end of the operational amplifier DUT to be tested are respectively connected with the optical coupling matrix 3, and different operational amplifier chips to be tested are connected into the auxiliary operational amplifier test loop 2 through the optical coupling matrix 3.
As shown in fig. 2, the auxiliary operational amplifier unit 22 includes an auxiliary operational amplifier a, an eighth resistor R8, a ninth resistor R9, and an eighth relay K8; the non-inverting input terminal of the auxiliary operational amplifier a is connected to one terminals of an eighth resistor R8 and a ninth resistor R9, respectively, the other terminal of the eighth resistor R8 is used as one input terminal of the auxiliary operational amplifier unit 22, an eighth relay K8 is arranged between the other terminal of the ninth resistor R9 and the bias voltage Vref and the ground, the inverting input terminal of the auxiliary operational amplifier a is used as the other input terminal of the auxiliary operational amplifier unit 22, and the output terminal of the auxiliary operational amplifier a is used as the output terminal of the auxiliary operational amplifier unit 22.
According to the test requirements of the operational amplifier chip to be tested, the normally open contacts of the corresponding relays in the auxiliary operational amplifier test loop 2 are controlled to be in a closed state through the integrated circuit test system, so that different parameter test items of the operational amplifier chip to be tested are tested.
The optical coupling matrix 3 comprises a plurality of groups of optical coupling relays, each group of optical coupling relays are respectively connected with corresponding sockets on the chip switching card seat 1, and each group of optical coupling relays are respectively and correspondingly connected with a positive phase input end, a negative phase input end, an output end and a test system interface 4 of the operational amplifier to be tested DUT. Specifically, each group of optical coupling relays respectively comprises 3 optical coupling relays which are correspondingly connected with a positive phase input end, a negative phase input end and an output end of the operational amplifier DUT to be tested. By controlling 3 optocoupler relays of a certain group of optocoupler relays, the normal phase input end, the reverse phase input end and the output end of a certain operational amplifier chip to be tested, which are connected with the group of optocoupler relays, can be correspondingly connected with the normal phase input end, the reverse phase input end and the output end of an operational amplifier to be tested DUT in the auxiliary operational amplifier test circuit 2, so that the operational amplifier chip to be tested can be subjected to parameter test.
In an embodiment of the present invention, taking BC3192EX test system as an example, as shown in fig. 3, the optical coupling matrix 3 includes 4 sets of optical coupling relays, and there are 12 optical coupling relays, which are numbered respectively to obtain optical coupling relays G0-G11; the optical coupling relays G0-G11 are respectively and correspondingly connected with sockets PIN0-11 of the chip switching card seat 1 on one hand, and on the other hand, every 3 optical coupling relays G0-G11 are respectively and correspondingly connected with a positive phase input end, a negative phase input end and an output end of an operational amplifier DUT to be tested in the auxiliary operational amplifier test loop 2 in a group of 3 optical coupling relays. The optical coupling relays G0-G11 are correspondingly connected with the test system interface 4. The on-off of the optocoupler relay G0-11 is controlled by a relay instruction preset in the integrated circuit test system, so that the normal phase input end, the reverse phase input end and the output end of a certain operational amplifier chip to be tested are correspondingly connected with the normal phase input end, the reverse phase input end and the output end of an operational amplifier DUT to be tested in the auxiliary operational amplifier test loop 2, and the operational amplifier chip to be tested is subjected to parameter test. Therefore, the operational amplifier testing module can be matched with a BC3192EX testing system to automatically complete the testing tasks of single operational amplifier, double operational amplifier and four operational amplifier chips.
As shown in fig. 4, the test system interface 4 is a socket for a plurality of pins on the printed circuit board, and the socket for the pins is matched with the socket for the plurality of pins on the test head of the integrated circuit test system, so as to connect the test module and the test head and guide the test resources of the integrated circuit test system to the test module. For example, taking BC3192EX test system as an example, test system interface 4 is a 6 pin 154 socket on a printed circuit board that matches the 6 pin 154 socket on the BC3192EX test system test head. As shown in fig. 3, the test system interface 4 includes a test channel, a test power supply, and a test ground.
The utility model provides a test module is put to fortune puts test circuit, opto-coupler matrix and test system interface through setting up chip switching cassette, supplementary fortune to mutually support with integrated circuit test system, realize that automatic control opto-coupler matrix will await measuring fortune and put the chip and insert supplementary fortune and put test circuit, and put the test specification of chip according to awaiting measuring fortune, control supplementary fortune is put test circuit and is realized putting the test task of chip to the fortune that awaits measuring. In addition, the operational amplifier test module is flexible in configuration and convenient to operate.
It is right above that the utility model provides an integrated circuit test system's fortune is put test module and is carried out detailed description. Any obvious modifications to the device, which would be obvious to those skilled in the art, without departing from the essential spirit of the invention, are intended to be covered by the appended claims.
Claims (10)
1. An operational amplifier test module of an integrated circuit test system is characterized by comprising a chip switching card seat, an auxiliary operational amplifier test loop, an optical coupling matrix and a test system interface, wherein the optical coupling matrix is connected with the chip switching card seat and the test system interface on one hand, and is connected with the auxiliary operational amplifier test loop on the other hand.
2. The operational amplifier test module of the integrated circuit test system of claim 1, wherein:
and a plurality of sockets for connecting all pins of the operational amplifier chip to be tested are arranged on the chip switching card seat.
3. The operational amplifier test module of the integrated circuit test system of claim 1, wherein:
the unit is put including awaiting measuring fortune to supplementary fortune in the test circuit and supplementary fortune, the unit is put to the fortune that awaits measuring between the first input of unit and input mains voltage and the ground wire is put to the fortune that awaits measuring, the second input of unit is put to the fortune that awaits measuring respectively through second relay and third relay corresponding with the unit is put to the fortune that awaits measuring the output of supplementary fortune is put the unit is connected, the output that the unit is put to fortune that awaits measuring pass through the fourth relay with an input of supplementary fortune is put the unit and is connected, another input of unit is put to supplementary fortune with the third input of unit is put to fortune that awaits measuring ground connection respectively, the output that the unit is put to fortune that awaits measuring still through fifth relay and first resistance ground connection, the output of unit is put to supplementary fortune still connects low level voltage and through capacitance ground connection.
4. The operational amplifier test module of the integrated circuit test system of claim 3, wherein:
the operational amplifier unit to be tested comprises an operational amplifier to be tested, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth relay and a seventh relay, wherein a normal phase input end of the operational amplifier to be tested is respectively connected with one end of the second resistor and the sixth relay, the other end of the second resistor is respectively connected with one ends of the third resistor and the fourth resistor and the sixth relay, a reverse phase input end of the operational amplifier to be tested is respectively connected with one end of the fifth resistor and the seventh relay, and the other end of the fifth resistor is respectively connected with one ends of the sixth resistor and the seventh relay; the other ends of the sixth resistor and the third resistor are connected together to serve as a first input end of the operational amplifier unit to be detected, the other ends of the fourth resistor and the seventh resistor correspondingly serve as a second input end and a third input end of the operational amplifier unit to be detected, and the output end of the operational amplifier to be detected serves as the output end of the operational amplifier unit to be detected.
5. The operational amplifier test module of the integrated circuit test system of claim 3, wherein:
the auxiliary operational amplifier unit comprises an auxiliary operational amplifier, an eighth resistor, a ninth resistor and an eighth relay, wherein a positive phase input end of the auxiliary operational amplifier is respectively connected with one end of the eighth resistor and one end of the ninth resistor, the other end of the eighth resistor serves as an input end of the auxiliary operational amplifier unit, the eighth relay is arranged between the other end of the ninth resistor and bias voltage and ground wire, an inverted input end of the auxiliary operational amplifier serves as the other input end of the auxiliary operational amplifier unit, and an output end of the auxiliary operational amplifier serves as an output end of the auxiliary operational amplifier unit.
6. The operational amplifier test module of the integrated circuit test system of claim 4, wherein:
the optical coupling matrix comprises a plurality of groups of optical coupling relays, and each group of optical coupling relays is respectively connected with a corresponding socket on the chip switching card seat on one hand and respectively connected with a positive phase input end, a negative phase input end and an output end of the operational amplifier to be tested and the test system interface correspondingly on the other hand.
7. The operational amplifier test module of the integrated circuit test system of claim 6, wherein:
and each group of optical coupling relays respectively comprises 3 optical coupling relays and is used for correspondingly connecting the positive phase input end, the negative phase input end and the output end of the operational amplifier to be tested.
8. The operational amplifier test module of the integrated circuit test system of claim 1, wherein:
the test system interface is a socket for a plurality of pins on a printed circuit board.
9. The operational amplifier test module of the integrated circuit test system of claim 8, wherein:
the sockets of the pins of the test system interface are matched with the sockets of a plurality of pins on the test head of the integrated circuit test system.
10. The operational amplifier test module of the integrated circuit test system of claim 9, wherein:
the test system interface comprises a test channel, a test power supply and a test ground.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922309507.6U CN212031656U (en) | 2019-12-20 | 2019-12-20 | Operational amplifier test module of integrated circuit test system |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201922309507.6U CN212031656U (en) | 2019-12-20 | 2019-12-20 | Operational amplifier test module of integrated circuit test system |
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| CN212031656U true CN212031656U (en) | 2020-11-27 |
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| CN201922309507.6U Active CN212031656U (en) | 2019-12-20 | 2019-12-20 | Operational amplifier test module of integrated circuit test system |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112485647A (en) * | 2020-12-10 | 2021-03-12 | 深圳市奥伦德元器件有限公司 | Optocoupler high-voltage testing device with loop testing function and testing method thereof |
| CN114859211A (en) * | 2022-04-29 | 2022-08-05 | 江西万年芯微电子有限公司 | Operational amplifier function test system |
-
2019
- 2019-12-20 CN CN201922309507.6U patent/CN212031656U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112485647A (en) * | 2020-12-10 | 2021-03-12 | 深圳市奥伦德元器件有限公司 | Optocoupler high-voltage testing device with loop testing function and testing method thereof |
| CN114859211A (en) * | 2022-04-29 | 2022-08-05 | 江西万年芯微电子有限公司 | Operational amplifier function test system |
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