CN218319227U

CN218319227U - Silicon chip caching device

Info

Publication number: CN218319227U
Application number: CN202222410773.XU
Authority: CN
Inventors: 顾徐锋; 戴秋喜; 潘加永; 刘光照
Original assignee: Suzhou Yingzhen Intelligent Technology Co ltd
Current assignee: Suzhou Yingzhen Intelligent Technology Co ltd
Priority date: 2022-09-13
Filing date: 2022-09-13
Publication date: 2023-01-17
Anticipated expiration: 2032-09-13

Abstract

The utility model discloses a silicon wafer caching device, which comprises a lifting component, an installation frame and a caching component, wherein the installation frame is fixed on the lifting component, the caching component is fixed on the installation frame, and the caching component at least comprises a first caching fixing frame and a second caching fixing frame; a plurality of comb racks are arranged along the height direction of the first cache fixing frame and the second cache fixing frame, two side edges of the silicon wafer are located in tooth grooves of the comb racks of the first cache fixing frame and the second cache fixing frame, and the upper surface and the lower surface of each comb rack are obliquely arranged. The utility model discloses a silicon chip memory device can realize the buffer memory of silicon chip, and when the buffer memory less with the area of contact of silicon chip, reduces the fish tail of silicon chip.

Description

Silicon chip caching device

Technical Field

The utility model relates to a solar cell panel field, more specifically the utility model relates to a silicon chip memory device that says so.

Background

In the production process of solar cells, a silicon wafer caching device is often needed to be used for temporarily storing silicon wafers by utilizing a space time period in the transmission process of the silicon wafers so as to prevent the occurrence of material breakage when a carrier is replaced. For example, patent No. CN202022117941.7 discloses a silicon wafer transportation buffer device, in which a plurality of limiting plates are disposed, and the plurality of limiting plates form a plurality of slots. When the cache of this patent is realizing the silicon chip, insert the slot with the silicon chip and the centre gripping is fixed, in the slot is inserted completely to the both sides limit of silicon chip, the area of contact of silicon chip and limiting plate is big to have certain fish tail to the silicon chip, influence the quality of silicon chip.

SUMMERY OF THE UTILITY MODEL

An object of the utility model is to provide a silicon chip memory device, this silicon chip memory device can realize the buffer memory of silicon chip, and when the buffer memory less with the area of contact of silicon chip, reduce the fish tail of silicon chip.

The technical scheme is as follows:

a silicon wafer caching device comprises a lifting assembly, an installation frame and a caching assembly, wherein the installation frame is fixed on the lifting assembly, the caching assembly is fixed on the installation frame, and the caching assembly at least comprises a first caching fixing frame and a second caching fixing frame; the silicon wafer caching device is characterized in that a plurality of comb rack bars are arranged in the height direction of the first caching fixing frame and the second caching fixing frame, two side edges of the silicon wafer are located in tooth grooves of the comb rack bars of the first caching fixing frame and the second caching fixing frame, and the upper surface and the lower surface of each comb rack bar are obliquely arranged.

Preferably, the width of the bottom of the tooth groove is smaller than the width of the opening part of the tooth groove.

Preferably, the number of the first buffer memory fixing frames is two, the second buffer memory fixing frame is located between the two first buffer memory fixing frames, and comb racks are arranged on one side, close to the two first buffer memory fixing frames, of the second buffer memory fixing frame.

Preferably, the buffer memory subassembly still includes first buffer memory fixed plate and second buffer memory fixed plate, and first buffer memory fixed plate, second buffer memory fixed plate are fixed in on the installation frame, and first buffer memory mount is fixed in on the first buffer memory fixed plate, and the second buffer memory mount is fixed in on the second buffer memory fixed plate.

Preferably, the first cache fixing plate is of an inverted L-shaped structure, and the second cache fixing plate is of a T-shaped structure.

Preferably, the lifting component at least comprises a lifting frame, a lifting driving motor and a ball screw assembly, wherein the lifting driving motor is fixed on the lifting frame, the lifting driving motor is connected with the ball screw assembly, and the mounting frame is connected with the ball screw assembly.

Preferably, the lifting driving motor is a servo motor.

Preferably, the mounting frame comprises a frame fixing plate and a frame reinforcing plate, and the frame reinforcing plate is fixed in the middle of the upper surface of the frame fixing plate.

Preferably, two first buffer fixing frames are respectively arranged on two side edges of the second buffer fixing frame, and the two first buffer fixing frames are respectively fixed on two opposite side edges of the frame fixing plate.

The advantages or principles of the present invention are explained below:

the first cache fixing frame and the second cache fixing frame are provided with a plurality of comb racks, and when the silicon wafer is cached, the silicon wafer is cached through tooth sockets between the comb racks of the first cache fixing frame and the second cache fixing frame. Because the upper surface and the lower surface of the comb teeth strip are obliquely arranged, when the silicon wafer is clamped and cached, the comb teeth strip is in line contact with the silicon wafer, the contact area is small, the scratch of the silicon wafer can be reduced, and the product quality of the silicon wafer is improved.

Drawings

FIG. 1 is a front view of a silicon wafer caching apparatus of the present embodiment;

FIG. 2 is a right side view of the silicon wafer caching apparatus of the present embodiment;

FIG. 3 is a left side view of the silicon wafer caching apparatus of the present embodiment;

FIG. 4 is a top view of the silicon wafer cache apparatus of the present embodiment;

FIG. 5 is a schematic structural diagram of a second buffer fixing frame according to the present embodiment;

fig. 6 is a schematic structural diagram of a first buffer fixing frame in the embodiment;

description of reference numerals:

10. a lifting assembly; 20. a mounting frame; 30. a cache component; 31. a first cache fixing frame; 32. a second cache fixing frame; 33. a comb rack; 34. a tooth socket; 35. a first buffer fixing plate; 36. a second cache fixing plate; 11. a lifting frame; 12. a lifting drive motor; 13. a ball screw assembly; 21. a frame fixing plate; 22. a frame stiffener.

Detailed Description

In the description of the present invention, it should be understood that the terms "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "middle", "inner", and the like indicate orientations or positional relationships based on orientations or positional relationships shown in the drawings, and are only for convenience of description and simplification of description, but do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first", "second", etc. are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first," "second," etc. may explicitly or implicitly include one or more of that feature. In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected" and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present invention can be understood by those of ordinary skill in the art through specific situations.

The following detailed description of the preferred embodiments of the present invention will be provided in conjunction with the accompanying drawings, so as to enable those skilled in the art to more easily understand the advantages and features of the present invention, and thereby define the scope of the invention more clearly and clearly.

As shown in fig. 1 to fig. 6, the present embodiment discloses a silicon wafer caching apparatus, which is used for caching silicon wafers. In order to realize the caching of the silicon wafer, the silicon wafer caching device comprises a lifting assembly 10, a mounting frame 20 and a caching assembly 30. The installation frame 20 is fixed on the lifting assembly 10, the buffer assembly 30 is fixed on the installation frame 20, and the lifting assembly 10 drives the installation frame 20 to move upward or downward, and further drives the buffer assembly 30 to move upward or downward.

In order to further implement the caching of the silicon wafer, the cache module 30 at least includes a first cache fixing frame 31 and a second cache fixing frame 32. A plurality of comb racks 33 are arranged along the height direction of the first cache fixing frame 31 and the second cache fixing frame 32, two side edges of the silicon wafer are positioned in tooth sockets 34 of the comb racks 33 of the first cache fixing frame 31 and the second cache fixing frame 32, and the two side edges of the silicon wafer are clamped and fixed through the tooth sockets 34 formed by the comb racks 33 for caching.

In order to reduce the contact between the silicon wafer and the first and

second buffer holders

31 and 32, the upper and lower surfaces of the comb rack 33 are both inclined, so that the width of the bottom of the tooth slot 34 is smaller than the width of the opening of the tooth slot 34. When the cache is performed through the first cache fixing frame 31 and the second cache fixing frame 32, the local parts of the two side edges of the silicon wafer are located in the tooth grooves 34 and are clamped through the part close to the bottoms of the tooth grooves 34, so that the silicon wafer is in line contact with the comb rack 33, the contact area with the silicon wafer is reduced, the scratch of the silicon wafer is reduced, and the quality of the silicon wafer is improved.

In order to buffer the silicon wafers as many as possible, the number of the first buffer fixing frames 31 is two, the second buffer fixing frame 32 is located between the two first buffer fixing frames 31, and comb racks 33 are disposed on one sides of the second buffer fixing frames 32 close to the two first buffer fixing frames 31. When the caching of the silicon wafer is carried out, the caching can be carried out simultaneously through two sides of the second cache fixing frame 32, the caching efficiency is improved, and the caching of more silicon wafers can be realized under the condition that the volume of the silicon wafer caching device is relatively small.

In order to fix the first and

second buffer holders

31 and 32, the buffer assembly 30 further includes a first buffer fixing plate 35 and a second buffer fixing plate 36. The first buffer fixing plate 35 and the second buffer fixing plate 36 are fixed on the mounting frame 20, the first buffer fixing frame 31 is fixed on the first buffer fixing plate 35, and the second buffer fixing frame 32 is fixed on the second buffer fixing plate 36. Preferably, the first buffer fixing plate 35, the second buffer fixing plate 36 and the mounting frame 20 may be fixedly connected by screws, and the first buffer fixing frame 31 and the first buffer fixing plate 35, the second buffer fixing frame 32 and the second buffer fixing plate 36 may also be fixedly connected by screws. Further, the first buffer fixing plate 35 is of an inverted L-shaped structure, and the second buffer fixing plate 36 is of a T-shaped structure.

In order to realize the lifting of the first buffer memory fixing frame 31 and the second buffer memory fixing frame 32, the lifting assembly 10 comprises a lifting frame 11, a lifting driving motor 12 and a ball screw assembly 13, wherein the lifting driving motor 12 is fixed on the lifting frame 11, the lifting driving motor 12 is connected with the ball screw assembly 13, and the mounting frame 20 is connected with the ball screw assembly 13. The lifting driving motor 12 drives the ball screw of the ball screw assembly 13 to rotate, and the ball screw drives the mounting frame 20 to move upwards or downwards in the rotating process, so that the first buffer fixing frame 31 and the second buffer fixing frame 32 can be lifted and moved.

Preferably, the lifting driving motor 12 is a servo motor. The lifting positioning accuracy formed by the servo motor and the ball screw assembly 13 is high, the silicon wafer and the comb teeth strips 33 can be prevented from being scratched due to dislocation in height, and the collision of the silicon wafer can be avoided.

The mounting frame 20 includes a frame fixing plate 21 and a frame reinforcing plate 22, and the frame reinforcing plate 22 is fixed to the middle of the upper surface of the frame fixing plate 21.

In order to fix the silicon wafer firmly, two first buffer holders 31 are respectively disposed on two sides of the second buffer holder 32, and the two first buffer holders 31 are respectively fixed on two opposite sides of the frame fixing plate 21. During caching, two ends of the side edge of the silicon wafer are respectively arranged in the tooth grooves 34 of the first cache fixing frame 31 and the second cache fixing frame 32.

The working process of the silicon wafer caching device in the embodiment is as follows:

the lifting assembly 10 drives the mounting frame 20 to move upwards, so that the uppermost tooth sockets 34 of the first buffer fixing frame 31 and the second buffer fixing frame 32 are flush with the height of the silicon wafer, and when the silicon wafer passes through the silicon wafer buffer device, two side edges of the silicon wafer enter the tooth sockets 34 of the first buffer fixing frame 31 and the second buffer fixing frame 32. Then the lifting component 10 drives the first buffer fixing frame 31, the second buffer fixing frame 32 and the silicon wafer to move upwards, so that the tooth socket 34 at the second position is flush with the height of the silicon wafer to be conveyed to the position for buffering, then the buffering of the silicon wafer is carried out, and the steps are circulated in sequence, so that a plurality of silicon wafers can be buffered on the first buffer fixing frame 31 and the second buffer fixing frame 32.

The embodiment of the present invention is not limited to this, according to the above-mentioned content of the present invention, the common technical knowledge and the conventional means in the field are utilized, without departing from the basic technical idea of the present invention, the present invention can also make other modifications, replacements or combinations in various forms, all falling within the protection scope of the present invention.

Claims

1. A silicon wafer cache device is characterized by comprising a lifting assembly, an installation frame and a cache assembly, wherein the installation frame is fixed on the lifting assembly; a plurality of comb racks are arranged along the height direction of the first cache fixing frame and the second cache fixing frame, two side edges of the silicon wafer are located in tooth grooves of the comb racks of the first cache fixing frame and the second cache fixing frame, and the upper surface and the lower surface of each comb rack are obliquely arranged.

2. The wafer cache apparatus of claim 1 wherein the width of the bottom of the gullet is less than the width of the mouth of the gullet.

3. The silicon wafer caching device of claim 1, wherein the number of the first cache fixing frames is two, the second cache fixing frame is located between the two first cache fixing frames, and comb racks are arranged on one side of the second cache fixing frame close to the two first cache fixing frames.

4. The silicon wafer caching device of any one of claims 1 to 3, wherein the cache assembly further comprises a first cache fixing plate and a second cache fixing plate, the first cache fixing plate and the second cache fixing plate are fixed on a mounting frame, the first cache fixing frame is fixed on the first cache fixing plate, and the second cache fixing frame is fixed on the second cache fixing plate.

5. The silicon wafer caching device of claim 4, wherein the first cache fixing plate is of an inverted L-shaped structure and the second cache fixing plate is of a T-shaped structure.

6. The silicon wafer cache device according to any one of claims 1 to 3, wherein the lifting assembly comprises at least a lifting frame, a lifting driving motor and a ball screw assembly, the lifting driving motor is fixed on the lifting frame, the lifting driving motor is connected with the ball screw assembly, and the mounting frame is connected with the ball screw assembly.

7. The silicon wafer caching apparatus of claim 6, wherein the lift drive motor is a servo motor.

8. The silicon wafer buffering device of claim 1, wherein the mounting frame comprises a frame fixing plate and a frame reinforcing plate, and the frame reinforcing plate is fixed to a middle portion of an upper surface of the frame fixing plate.

9. The silicon wafer caching device of claim 8, wherein two first cache holders are respectively disposed on two sides of the second cache holder, and the two first cache holders are respectively fixed on two opposite sides of the frame fixing plate.