CN218039210U - Display panel and display device - Google Patents

Display panel and display device Download PDF

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Publication number
CN218039210U
CN218039210U CN202221608885.XU CN202221608885U CN218039210U CN 218039210 U CN218039210 U CN 218039210U CN 202221608885 U CN202221608885 U CN 202221608885U CN 218039210 U CN218039210 U CN 218039210U
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China
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line
display area
virtual
lines
coupled
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Chinese (zh)
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王磊
马扬昭
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Wuhan Tianma Microelectronics Co Ltd
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Wuhan Tianma Microelectronics Co Ltd
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Abstract

An embodiment of the utility model provides a display panel and display device. The display panel comprises a display area and a non-display area; the display area comprises a plurality of data lines and a plurality of connecting lines, and the non-display area comprises a plurality of bonding pads; the data line extends in a first direction, one end of the connecting line is coupled with the data line, and the other end of the connecting line is coupled with the bonding pad; the display area comprises a first boundary close to one side of the bonding pad; the connecting line comprises a first line segment; in a first direction, a first line segment extends from a first boundary to the display area; the length of a first line segment in the at least one connecting line in the first direction is D 1 The display area being in a first directionLength of D 0 Wherein D is 1 >D 0 /2. The utility model discloses can improve the uneven problem of screen picture of breathing out.

Description

Display panel and display device
Technical Field
The utility model relates to a show technical field, especially relate to a display panel and display device.
Background
In the prior art, a fan-out line is arranged on a lower frame of a display panel, one end of the fan-out line is connected to a display driving chip, and the other end of the fan-out line is connected to a data line in a display area. The fanout line occupies a larger space on the lower frame, so that the width of the lower frame is larger, and the appearance is influenced. One current design solution is to set a portion of the fanout line in the display area, so as to reduce the width of the lower frame. However, after part of the fan-out lines are arranged in the display area, the fan-out lines in the display area have certain reflectivity to the ambient light, so that the reflectivity to the ambient light of the area where the fan-out lines are located in the display area is different from that of other display areas where the fan-out lines are not arranged, and the problem of uneven screen-saving pictures is caused.
SUMMERY OF THE UTILITY MODEL
An embodiment of the utility model provides a display panel and display device to solve the uneven problem of screen image of breathing out among the prior art.
In a first aspect, an embodiment of the present invention provides a display panel, where the display panel includes a display area and a non-display area;
the display area comprises a plurality of data lines and a plurality of connecting lines, and the non-display area comprises a plurality of bonding pads; the data line extends in a first direction, one end of the connecting line is coupled with the data line, and the other end of the connecting line is coupled with the bonding pad; the display area comprises a first boundary close to one side of the bonding pad;
the connecting line comprises a first line segment; in a first direction, a first line segment extends from a first boundary to the display area;
the length of a first line segment in the at least one connecting line in the first direction is D 1 The length of the display area in the first direction is D 0 Wherein D is 1 >D 0 /2。
The second aspect, based on the same utility model discloses think, the embodiment of the utility model provides a display device, include the utility model discloses arbitrary embodiment provides a display panel.
The embodiment of the utility model provides a display panel and display device has following beneficial effect: the connecting line is arranged in the display area, at least part of the data lines are coupled with the welding disc through the connecting line, and part of fanout lines which are originally required to be arranged in the non-display area are arranged in the display area, so that the wiring space in the non-display area can be saved, and the narrowing of the non-display area is facilitated. And the connecting lines are elongated along the extending direction of the data lines, so that at least part of the connecting lines extend from the lower display area of the display area to the upper display area of the display area, and the connecting lines are arranged at a plurality of positions in the extending direction of the data lines in the display area, thereby avoiding the sharp change of the graph density of the connecting lines along the first direction in the display area, reducing the difference of the reflectivity of the ambient light between the upper display area and the lower display area in the display area, and improving the problem of uneven screen image.
Drawings
In order to illustrate the embodiments of the present invention or the technical solutions in the prior art more clearly, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without inventive exercise.
FIG. 1 is a schematic diagram of a display panel in the prior art;
fig. 2 is a schematic view of a display panel according to an embodiment of the present invention;
fig. 3 is a schematic view of another display panel according to an embodiment of the present invention;
fig. 4 is a schematic view of another display panel according to an embodiment of the present invention;
fig. 5 is a schematic view of another display panel according to an embodiment of the present invention;
fig. 6 is a schematic view of another display panel according to an embodiment of the present invention;
fig. 7 is a schematic view of another display panel according to an embodiment of the present invention;
FIG. 8 isbase:Sub>A schematic cross-sectional view taken at line A-A' of FIG. 7;
fig. 9 is a schematic view of another display panel according to an embodiment of the present invention;
fig. 10 is a schematic view of another display panel according to an embodiment of the present invention;
fig. 11 is a schematic view of another display panel according to an embodiment of the present invention;
fig. 12 is a schematic view of another display panel according to an embodiment of the present invention;
fig. 13 is a schematic view of another display panel according to an embodiment of the present invention;
fig. 14 is a schematic diagram of a film layer of another display panel according to an embodiment of the present invention;
fig. 15 is a circuit diagram of a pixel circuit in a display panel according to an embodiment of the present invention;
fig. 16 is a schematic diagram of another pixel circuit provided in an embodiment of the present invention;
fig. 17 is a partial schematic view of another display panel according to an embodiment of the present invention;
fig. 18 is a schematic view of a display device according to an embodiment of the present invention.
Detailed Description
To make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the attached drawings in the embodiments of the present invention are combined to clearly and completely describe the technical solution in the embodiments of the present invention, and obviously, the described embodiments are part of the embodiments of the present invention, rather than all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
The terminology used in the embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the embodiments of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
The non-display area of the conventional display panel is provided with a fan-out wire, and the fan-out wire is a connecting wire which is connected between a data wire in the display area and a driving chip in the non-display area. Because the distance between the data lines in the display area is larger than the distance between the adjacent pins on the driving chip, in order to realize the connection between the data lines in the display area and the pins of the driving chip, the fanout lines are arranged in the non-display area, and the distance between the fanout lines in the direction from the display area to the driving chip is gradually reduced. That is to say, the fan-out lines are drawn out from the boundary between the display area and the non-display area, then gradually converge and converge, and are connected to the corresponding bonding pads, and a certain space is occupied in the convergence process of the fan-out lines. In order to reduce the space occupied by the fan-out lines in the non-display area, a part of the fan-out lines in the prior art are disposed in the display area, and fig. 1 is a schematic diagram of a display panel in the prior art, as shown in fig. 1, the fan-out lines 001 in the display area AA are coupled to the data lines 002, and the fan-out lines 001 in the display area AA are coupled to the corresponding data lines 002 substantially at the lower portion of the display area AA, so that the display area AA is divided into an upper area and a lower area. A patterned fanout line 001 is disposed in the first region Q1, and no fanout line 001 is disposed in the second region Q2, thereby resulting in a large pattern density difference between the two regions. The patterned fan-out line 001 in the display area AA has a certain reflectivity to ambient light, which causes a large difference between the reflectivity to ambient light in the area where the fan-out line 001 is located in the display area AA and other display areas where the fan-out line 001 is not located, resulting in a problem of non-uniform screen-playing images.
In order to solve the problems existing in the prior art, the embodiment of the utility model provides a display panel, set up the connecting wire in the display area (also can say that the fan-out line that is located the display area), at least part data line is coupled with the pad through the connecting wire, and stretch out the connecting wire along going up in the data line extending direction, make at least part connecting wire stretch out more than the vertical central line of display area, or at least part connecting wire is stretched out in the upper portion display area of display area by the lower part display area of display area, make a plurality of positions departments on the inherent data line extending direction of display area all be provided with the connecting wire, can avoid the interior connecting wire figure density of display area to change sharply, reduce the difference of different positions department to ambient light reflectivity in the display area, improve the problem of the screen picture is uneven.
Fig. 2 is a schematic view of a display panel according to an embodiment of the present invention, as shown in fig. 2, the display panel includes a display area AA and a non-display area NA; the display area AA includes a plurality of data lines 10 and a plurality of connection lines 20, and the non-display area NA includes a plurality of pads 30; the data line 10 extends in a first direction x, one end of the connection line 20 is coupled to the data line 10, and the other end of the connection line 20 is coupled to the pad 30. The bonding pad 30 is used for binding and connecting with a driving structure, wherein the driving structure can be a driving chip or a flexible circuit board fixed with the driving chip.
The display area AA includes a first border 40 adjacent to one side of the pad 30; the first boundary 40 is an interface between the display area AA and the non-display area AA near one side of the pad 30. The connection line 20 includes a first line segment X1; in the first direction X, the first line segment X1 extends from the first boundary 40 into the display area AA. The first line segment X is an initial line segment of the connection line 20 extending in the display area AA from the position of the first boundary 40, and the extending direction of the first line segment X1 is the same as the extending direction of the data line 10. The first direction X is a routing direction or an extending direction of the first line segment X1, which indicates that the first line segment X1 has a certain length in the first direction X. Fig. 2 illustrates only the first line segment X1 as a straight line, and in some embodiments, the first line segment X1 may also be a polygonal line formed by a plurality of line segments.
The first line segment X1 of the at least one connection line 20 has a length D in the first direction X 1 The length of the display area AA in the first direction x is D 0 Wherein D is 1 >D 0 /2. That is, the length of the first line segment X1 in the first direction X of at least some of the connection lines 20 is not less than half the length of the display area AA in the first direction X. That is, a portion of the first line segment X1 extends from the first boundary 40 in the first direction X toward the display area AA and extends to a position above the longitudinal centerline 50 of the display area AA. The longitudinal central line 50 divides the display area AA into an upper display area and a lower display area adjacent to each other in the first direction x, the upper display area and the lower display area are symmetrical with respect to the longitudinal central line 50, an area close to the first border 40 is the lower display area, and an area far from the first border 40 is the upper display area. The longitudinal centerline 50 extends along a second direction y that intersects the first direction x, and optionally, the second direction y is orthogonal to the first direction x. In the first placeIn a direction x, the longitudinal centre line 50 is at a distance D from the first boundary 40 z Wherein D is z ＝D 0 /2。
The embodiment of the utility model provides an in, be provided with connecting wire 20 in the display area AA, at least partial data line 10 is coupled through connecting wire 20 and pad 30, will originally need to set up in the partial fanout line setting of non-display area NA in the display area AA, can save the wiring space in the non-display area NA, is favorable to the narrowing of non-display area NA. And the connecting line 20 is elongated along the extending direction of the data line 10, so that at least a part of the connecting line 20 extends from the lower display area of the display area AA to the upper display area of the display area AA, and the connecting line 20 is arranged at a plurality of positions in the extending direction of the data line 10 in the display area AA, thereby avoiding the rapid change of the graphic density of the connecting line 10 along the first direction x in the display area AA, reducing the difference of the reflectivity of the upper display area and the lower display area in the display area AA to the ambient light, and improving the problem of the non-uniform information screen picture.
In some embodiments, D 1 >2D 0 /3. In some embodiments, the longest first segment X1 of the connection lines 20 substantially penetrates through the display area AA in the first direction X, in other words, the longest first segment X1 of the connection lines 20 extends to the top of the upper display area of the display area AA in the first direction X, which is equivalent to that the first segment X1 is pulled over the entire display area AA in the first direction X, so that the graphics of the first segment X1 exist at each position of the display area AA along the first direction X, which can avoid a sharp change in the density of the graphics of the connection lines 10 in the display area AA along the first direction X, reduce a difference in reflectivity of ambient light between the upper display area and the lower display area in the display area AA, and improve a problem of screen unevenness.
As shown in fig. 2, the display area AA includes a symmetry axis 60 extending along the first direction x; on one side of the axis of symmetry 60: the lengths of the plurality of first line segments X1 gradually increase from the edge of the display area AA to the symmetry axis 60 in the second direction y. As shown in fig. 2, the connection line 20 further includes a second line segment X2 extending along the second direction y, one end of the second line segment X2 is coupled to the first line segment X1, and the other end of the second line segment X2 is coupled to the data line 10. The connection lines 20 located in the display area AA extend in the display area AA from the first boundary 40, and the initial position of the connection lines 20 on the first boundary 40 is spaced from the data lines 10 to which the connection lines 20 are coupled, so that the connection lines 20 need to be firstly routed along the first direction X (for example, the first line segment X1 is set), and then routed along the second direction y (for example, the second line segment X2 is set) to be connected to the corresponding data lines 10. The embodiment of the utility model provides an in one side of symmetry axis 60, along the length grow gradually of many first line segments X1 in the direction that is close to symmetry axis 60, then when laying wire many connecting wires 20, can not intercrossing short circuit between the connecting wire 20, can simplify the wiring mode of connecting wire 20.
It should be noted that, in fig. 2, only the second line segment X2 is taken as a straight line for illustration, the routing direction of the second line segment X2 is the second direction y, and in some embodiments, the second line segment X2 may also be a broken line formed by a plurality of line segments.
Fig. 3 is a schematic view of another display panel according to an embodiment of the present invention, as shown in fig. 3, the display area AA includes a first display area AA1 and two second display areas AA2; in the second direction y, the two second display areas AA2 are respectively located at two sides of the first display area AA1; the display area AA has a symmetry axis 60 extending in the first direction x, the symmetry axis 60 being located in the first display area AA1; the data line 10 includes a plurality of middle data lines 10b and a plurality of edge data lines 10a, the middle data lines 10b are located in the first display area AA1, and the edge data lines 10a are located in the second display area AA2; at least a portion of the connection line 20 is located in the second display area AA2, and the connection line 20 is coupled to the edge data line 10 a.
The non-display area NA includes lead lines, wherein lines connected to the pads 30 within the non-display area NA are the lead lines, and the lead lines include first lead lines 31a and second lead lines 31b. The intermediate data line 10b is directly coupled to the pad 30 through the second lead 31b. The edge data line 10a is coupled to the pad 30 through the connection line 20, and actually the connection line 20 is also connected to the pad 30 through the first lead 31a located in the non-display area NA. As shown in the position circled by the dotted line in fig. 3 where the first lead 31a and the second lead 31b cross, optionally, the first lead 31a and the second lead 31b are provided at different metal layers at least at the position of crossing each other to ensure that the two are insulated from each other.
The embodiment of the utility model provides an in, the fan that will originally need to set up in non-display area NA is qualified for the next round of competitions and is introduced the display area AA, utilizes connecting wire 20 in the display area AA to realize coupling between data line 10 and the pad 30, can subtract the width that many fans were qualified for the next round of competitions and occupy on second direction y to save the wiring space in the non-display area NA, be favorable to the narrowing of non-display area NA. And still set up the middle data link 10b and couple with the pad 30 directly through the second lead 31b, can reduce the number of connecting wires 20 set up in the display area AA, simplify the wiring mode in the display area AA, can also reduce the reflection probability of the connecting wire 20 to the ambient light in the display area AA.
In some embodiments, on one side of the axis of symmetry 60: the symmetry axis 60 is pointed in the second direction y by the edge of the display area AA, and the length difference between two adjacent first line segments X1 is constant. Fig. 4 is another schematic diagram of a display panel provided by an embodiment of the present invention, as shown in fig. 4, on the right side of the symmetry axis 60, the connecting lines arranged along the direction close to the symmetry axis 60 are in sequence: the length of a first line segment X1 in the connecting line 20-1, the connecting line 20-2, the connecting line 20-3 and the connecting line 20-4 is gradually increased, the difference between the first line segment X1 in the connecting line 20-2 and the connecting line 20-1 is d, the difference between the first line segment X1 in the connecting line 20-3 and the connecting line 20-2 is d, and the difference between the first line segment X1 in the connecting line 20-4 and the connecting line 20-3 is d. In this embodiment, at least a part of the connecting lines 20 extends from the lower display area of the display area AA to the upper display area of the display area AA, so that the connecting lines 20 are arranged at a plurality of positions in the first direction x in the display area AA, thereby avoiding a sharp change in the density of the connecting lines 10 in the first direction x in the display area AA. In the direction that sets up simultaneously along being close to the symmetry axis 60, many first line sections X1's length is the equidifferent change, can further promote along the homogeneity of the figure density change of connecting wire 10 on the first direction X, can make along each regional reflectivity gradual change to ambient light on the first direction X, further improve the uneven problem of information screen picture.
In addition, in the embodiment of the present invention, the data lines 10 correspondingly connected to the connection lines 20-1, 20-2, 20-3 and 20-4 are also sequentially arranged, and the length of the connection line 20 affects the load on the data line 10, and the load on the data line 10 affects the charging and discharging speed of the data line 10, thereby affecting the brightness of the light emitting device coupled to the data line 10. When the lengths of the connection lines 20 coupled to the data lines 10 arranged in sequence are different, stripes with alternate bright and dark may appear during display, resulting in uneven display. The embodiment of the utility model provides an in, set up along the direction that is close to the symmetry axis 60, many first line section X1's length is the arithmetic change, still be favorable to the abrupt change of the difference of balanced many connecting wires 20 total length for the total length of many connecting wires 20 that arrange in proper order also roughly is the arithmetic change, makes the luminance gradual change in many data lines 10 places regions that correspond with many connecting wires 20 and couple, appears bright dark alternate stripe when can avoiding showing.
In some embodiments, to the left of axis of symmetry 60 in fig. 2: the connecting lines 20 comprise first connecting lines 1-20 and second connecting lines 2-20; the first connection lines 1 to 20 are coupled to the data line 10 at a first site W1, and the second connection lines 2 to 20 are coupled to the data line 10 at a second site W2. In the second direction y, the distance from the first line segment X1 of the first connecting line 1-20 to the symmetry axis 60 is greater than the distance from the first line segment X1 of the second connecting line 2-20 to the symmetry axis 60; in the first direction x, the first location point W1 is less distant from the first boundary 40 than the second location point W2 is distant from the first boundary 40. That is, on one side of the symmetry axis 60, the farther the first line segment X1 is from the symmetry axis 60, the smaller the length of the first line segment X1 in the first direction X, and the closer the connection line 20 where the first line segment X1 is coupled to the data line 10 is to the first boundary 40. That is, as the length of the first line segment X1 in the first direction X is longer, the connection line 20 where the first line segment X1 is coupled to the data line 10 is farther from the symmetry axis 60. At least part of the connecting lines 20 extend from the lower display area of the display area AA to the upper display area of the display area AA along the first direction x, thereby avoiding the rapid change of the graphic density of the connecting lines 10 along the first direction x in the display area AA, reducing the difference of the reflectivity of the upper display area and the lower display area to the ambient light in the display area AA, and improving the problem of uneven screen-displaying pictures. Moreover, the coupling point of the connection line 20 and the data line 10 varies with the length of the first segment X1, and no additional winding is needed when the connection line 20 is coupled with the corresponding data line 10, so that the wiring manner of the connection line 20 can be simplified.
In some embodiments, as shown in fig. 2, to the left of the axis of symmetry 60: the data lines 10 include first data lines 1-10 and second data lines 2-10. It can be seen that the first data lines 1-10 are at a larger distance from the axis of symmetry 60 than the second data lines 2-10 in the second direction y from the axis of symmetry 60. Wherein the first connection lines 1-20 are coupled to the first data lines 1-10, and the second connection lines 2-20 are coupled to the second data lines 2-10. In this embodiment, on one side of the axis of symmetry 60: the data lines 10 farther from the axis of symmetry 60 in the second direction y are coupled to the connection lines 20 shorter than the first segment X1, and the data lines 10 closer to the axis of symmetry 60 in the second direction y are coupled to the connection lines 20 longer than the first segment X1. The length difference between different connecting lines 20 can be reduced through the arrangement, so that the load difference on the data lines 10 coupled with the connecting lines 20 can be reduced, the difference of the charging and discharging speeds between different data lines 10 can also be reduced, the brightness uniformity of the light-emitting device coupled with the data lines 10 is improved, and the display effect is improved.
In addition, use the left side of symmetry axis 60 in fig. 2 as an example, the embodiment of the utility model provides a can realize that the first pad 30 that the non-display area NA counted from the left side to the right side is coupled with the first data line 10 that counts from the left side to the right side in the display area AA, and the second pad 30 that the count from the left side to the right side is coupled with the second data line 10 that counts from the left side to the right side in the display area AA, and the data line 10 is connected in order with the pad 30 one-to-one in the non-display area NA in the display area AA promptly. So set up, need not do any adjustment to driver chip's output pin position, the embodiment of the utility model provides a display panel can be applicable to most current driver chip.
In some embodiments, fig. 5 is a schematic view of another display panel provided by an embodiment of the present invention, as shown in fig. 5, the connection line 20 includes a first line segment X1 extending along the first direction X, a second line segment X2 extending along the second direction y, and a third line segment X3 extending along the first direction X, and the second line segment X2 is coupled to the data line 10 through the third line segment X3. On the left side of the axis of symmetry 60: the connection lines 20 include first connection lines 1-20 and second connection lines 2-20; in the second direction y, the distance from the first line segment X1 of the first connecting line 1-20 to the symmetry axis 60 is greater than the distance from the first line segment X1 of the second connecting line 2-20 to the symmetry axis; the data lines 10 include third data lines 3-10 and fourth data lines 4-10; in the second direction y, the distance from the third data line 3-10 to the symmetry axis 60 is greater than the distance from the fourth data line 4-10 to the symmetry axis 60; wherein the first connection lines 1-20 are coupled to the fourth data lines 4-10 and the second connection lines 2-20 are coupled to the third data lines 3-10. Set up connecting wire 20 in this embodiment including the first line segment X1, second line segment X2 and the third line segment X3 that connect gradually, connecting wire 20's shape is approximately for the font of falling U, combines the embodiment of the utility model provides an in the upper portion display area's of lengthening connecting wire 20 first line segment X to display area AA design, can see out in the display area at connecting wire 20 place, no matter in first direction X or on second direction y connecting wire 20's figure density all more even, can further improve the uneven problem of information screen picture. Moreover, the embodiment of fig. 5 can couple each connection line 20 to the data line 10 at a position close to the first boundary 40 within the display area AA, and can couple each connection line 20 to the data line 10 at substantially the same distance from the non-display area NA in the first direction x, so that each data line 10 has a substantially same charging/discharging position from the first boundary 40.
In some embodiments, fig. 6 is a schematic view of another display panel provided in the embodiments of the present invention, as shown in fig. 6, the display area AA includes a virtual line 70, and the virtual line 70 includes a first virtual line 71; at least one first virtual line 71 is disposed between two adjacent connecting lines 20, and the routing direction of the first virtual line 71 is the same as the routing direction of the connecting lines 20. In the embodiment of the present invention, the connection line 20 at least includes a first line segment X1 extending in the first direction X and a second line segment X2 extending in the second direction y, wherein the extending direction of the second line segment X2 and the extending direction of the data line 10 in the display area AA intersect with each other, so that the second line segment X2 may be overlapped with the plurality of data lines 10 in the display area AA in an insulating manner (as indicated by the position encircled by the region Z1 in fig. 6). This causes a problem that there is a serious signal crosstalk on the connection lines 20 and also a signal crosstalk between adjacent connection lines 20. The embodiment of the utility model provides an in adjacent connection walk the line 20 between set up first virtual line 71, and first virtual line 71 walk the line direction the same with connecting wire 20's the line direction of walking, can utilize first virtual line 71 to improve the problem of signal crosstalk, guarantee the stability of transmission data signal on the connecting wire 20.
In addition, the arrangement of the first virtual line 71 can further improve the uniformity of the pattern density in the display area AA, further reduce the difference of the reflectivity of the ambient light between different areas in the display area AA, and improve the problem of uneven screen-touching pictures.
Fig. 6 only illustrates that one first virtual line 71 is disposed between two adjacent connecting lines 20, and in some embodiments, two or more first virtual lines 71 are disposed between two adjacent connecting lines 20, which is not illustrated here.
In some embodiments, the first dummy lines 71 and the connection lines 20 are of the same layer of material. As shown in fig. 6, the first virtual line 71 includes a first virtual line segment 711 extending in the first direction x and a second virtual line segment 712 extending in the second direction y, and the first virtual line segment 711 and the second virtual line segment 712 are connected. The first and second imaginary lines 711, 712 are made of the same material in the same layer as the connecting line 20. In this embodiment, the first dummy lines 71 and the connection lines 20 can be simultaneously formed in the same process, thereby simplifying the process. And the first dummy line 71 and the connection line 20 are disposed at the same layer, the effect of preventing signal crosstalk between the adjacent connection lines 20 is more significant.
As shown in fig. 6, the first virtual line 71 includes a first virtual line segment 711 extending in the first direction X, and the first virtual line segment 711 is located between two adjacent first line segments X1. That is, the first virtual line segment 711 between two adjacent first line segments X1 and the first line segment X1 extend in the same direction. When the first dummy lines 71 and the connecting lines 20 are made of the same material in the same layer, the extension directions of the first dummy lines 711 and the first lines X1 are set to be the same, which is beneficial to simplifying the design of the mask, and if the dummy lines between adjacent first lines X1 are set to intersect with the extension directions of the first lines X1, the complexity of the design of the mask is increased.
In some embodiments, fig. 7 isbase:Sub>A schematic view of another display panel provided by the embodiments of the present invention, and fig. 8 isbase:Sub>A schematic cross-sectional view atbase:Sub>A position ofbase:Sub>A tangent linebase:Sub>A-base:Sub>A' in fig. 7. As shown in fig. 7, the connection line 20 further includes a first line segment X1 extending along the first direction X and a second line segment X2 extending along the second direction y. The first and second line segments X1 and X2 are electrically connected to each other. The first virtual line 71 includes a first virtual line segment 711 extending in the first direction X and a second virtual line segment 712 extending in the second direction y, the first virtual line segment 711 being located between two adjacent first line segments X1, and the second virtual line segment 712 being located between two adjacent second line segments X2.
As shown in fig. 8, the display panel includes a substrate 010, and the dummy line segment and the connection line, and the data line are located on the same side of the substrate 010. The first virtual line segment 711 and the first line segment X1 are of the same layer and material, the second virtual line segment 712 and the second line segment X2 are of the same layer and material, and the first virtual line segment 711 and the second virtual line segment 712 are located in different layers. In this embodiment, the first line segment X1 and the second line segment X2 in the connection line 20 are located on different layers, that is, the connection line 20 is made of two metal layers, and the line segments extending in different directions in the connection line 20 are located on different layers. The first line segment X1 and the second line segment X2 are connected by a via penetrating through the insulating layer at a position indicated by a region Z2 in fig. 7.
As can be seen from fig. 8, the connection line 20 and the first dummy line 71 are both located on the side of the data line 10 away from the substrate 010, wherein the second line segment X2 and the second dummy line segment 712 are located on the same layer and on the side of the first dummy line segment 711 and the first line segment X1 away from the substrate 010. A first insulating layer 011 is disposed between the data line 10 and the film layer where the first line segment X1 is located, and a second insulating layer 012 is disposed between the second line segment X2 and the film layer where the first line segment X1 is located. At least the first insulating layer 011 and the second insulating layer 012 are included between the second line segment X2 and the data line 10 in the direction e perpendicular to the plane of the substrate 010. The embodiment of the utility model provides an in, set up first line segment X1 and second line segment X2 and be located different layers, and second line segment X2 is located one side of keeping away from data line 10 of first line segment X1, can increase the distance between second line segment X2 and data line 10 on perpendicular to substrate 010 place plane direction e, can reduce the crosstalk that second line segment X2 and many data lines 10 overlap produced from this, guarantee the stability of transmission data signal on the connecting wire 20.
In addition, the first virtual line segment 711 and the first line segment X1 are arranged in the same layer and in the same extending direction, and the first virtual line segment 711 and the first line segment X1 are arranged in the same layer, so that the first virtual line segment 711 can play a good role in shielding, and can prevent signal crosstalk between two adjacent first line segments X1. The second virtual line segment 712 and the second line segment X2 are arranged in the same extending direction and on the same layer, and the second virtual line segment 712 and the second line segment X2 are on the same layer, so that the second virtual line segment 712 can play a good role in shielding, and can prevent signal crosstalk between two adjacent second line segments X2.
Fig. 7 illustrates that the first virtual line segment 7111 and the second virtual line segment 712 are not connected. In other embodiments, the first and second virtual line segments 7111 and 712 located at different metal layers are connected by vias through the insulating layer.
In some embodiments, fig. 9 is a schematic view of another display panel provided by an embodiment of the present invention, fig. 9 only illustrates a part of the display panel, and in order to clearly illustrate a relationship between the first line segment X1, the data line 10 and the first virtual line segment 711 in the display panel, fig. 9 only illustrates these line segments, and does not show structures of other circuits and the light emitting device. As shown in fig. 9, at least one data line 10 is spaced between at least two adjacent first line segments X1. Fig. 9 is a top view of the display panel, and it can be understood that the top view direction is parallel to the direction perpendicular to the plane of the substrate 010, and the first virtual line segment 711 and the data line 10 at least partially overlap in the direction perpendicular to the plane of the substrate 010. The first line segment X1 extends from the first boundary 40 toward the display area AA along the first direction X, and in order to save the space of the non-display area NA, a plurality of connection lines 20 need to be arranged on one side of the symmetry axis 60, and the connection lines 20 are all pulled from the first boundary 40 toward the display area AA.
The embodiment of the utility model provides a set up connecting wire 20's in the display area AA the piece number, the display area AA in the density of arranging of first line segment X1 and to multiple factors such as the saving condition in non-display area NA space have been considered comprehensively in the design. In addition, after the connection line 20 is disposed in the display area AA, the connection line 20 needs to be coupled to the pad 30 through the first lead 31a (see the schematic diagram in fig. 3), so that the wiring manner of the first lead 31a needs to be considered, and the pitch between the adjacent first leads 31a needs to be designed to be adapted to the pitch between the adjacent pads 30. The embodiment of the utility model provides an at least data line 10 of interval between two adjacent first line sections X1 in setting up display area AA part, make the interval between two adjacent first line sections X1 of arranging in the display area AA roughly the same with the interval between two adjacent data lines 10, so can be convenient for lay wire to the first lead wire 31a in the non-display area NA, interval between the adjacent first lead wire 31a can refer to the interval between the adjacent second lead wire 31b and design, that is to say, interval between the adjacent first lead wire 31a can refer to the interval of fanning out between the line among the prior art and design, can simplify the wiring design to first lead wire 31 a.
In addition, first virtual line segment 711 and data line 10 all adopt metal material to make, then first virtual line segment 711 and data line 10 all can cause the reflection to ambient light, the embodiment of the utility model provides an in set up first virtual line segment 711 and the at least partial overlap of data line 10, then first virtual line segment 711 can shelter from partial data line 10 to can reduce holistic reflectivity, promote display effect.
In some embodiments, fig. 10 is another schematic diagram of a display panel according to an embodiment of the present invention, as shown in fig. 10, the virtual lines 70 include first virtual lines 71 and second virtual lines 72, where the first virtual lines 71 are located between adjacent connecting lines 20, an extending direction of the first virtual lines 71 is the same as an extending direction of the connecting lines 20, and the second virtual lines 72 extend along the second direction y. Optionally, at least a part of the second virtual line 72 intersects the display area AA in the second direction y. At least one second virtual line 72 intersects at least one first line segment X1, and the second virtual line 72 is disconnected at the position of intersection with the first line segment X1, wherein the condition that the second virtual line 72 is disconnected at the position of intersection with the first line segment X1 can be seen in the schematic of the region Z3 in fig. 10. At least one second virtual line 72 crosses at least one first virtual line 71, and the second virtual line 72 is coupled to the first virtual line 71 at the crossing position. Wherein for the coupling of the second virtual line 72 with the first virtual line 71 at the crossing position, see the schematic of the zone Z4 in fig. 10. The embodiment of the utility model provides an in the second virtual line 72 that sets up can further promote whole figure density homogeneity in the display area AA, improve and put the uneven problem of screen picture.
In the embodiment of the present invention, the second virtual line 72 may be located on the same layer as the first line segment X1, or the second virtual line 72 and the first line segment X1 are located on different layers. When the second dummy line 72 and the first line segment X1 are located in the same metal layer, the second dummy line 72 is disconnected at a position crossing the first line segment X1, so that the second dummy line 72 does not affect the transmission of the signal of the first line segment X1, and the load on the connection line 20 is not increased. When the second dummy line 72 and the first line segment X1 are located at different layers, the second dummy line 72 is located at one side of the first line segment X1 close to the substrate 010 for indicating, when in manufacturing, the patterned second dummy line 72 is firstly manufactured, then an insulating layer is manufactured on the second dummy line 72, then the first line segment X1 is manufactured, because the second dummy line 72 is set to be disconnected at the position of the intersection with the first line segment X1, the disconnected position of the second dummy line 72 is equivalent to forming a groove, and then the part of the first line segment X1 manufactured subsequently is just manufactured in the groove, so that the flatness of the module after the process of the first line segment X1 can be improved.
In the embodiment of the present invention, the extending direction of the first virtual line segment 711 in the first virtual line 71 is the same as the extending direction of the first line segment X1, and as can be seen from fig. 10, the second virtual line 72 is coupled with the first virtual line segment 711 at the crossing position. The first virtual line segment 711 may be located at the same layer as the first line segment X1 or located at a different layer from the first line segment X1. That is, the second virtual line 72 may be located at the same level as the first virtual line segment 711, or may be located at a different level from the first virtual line segment 711. When the second virtual line 72 and the first virtual line segment 711 are located on the same layer, they are directly connected in contact at the crossing position. When the second dummy line 72 and the first dummy line segment 711 are located at different layers, they are connected at intersecting positions by a via hole penetrating through the insulating layer. The embodiment of the utility model provides an in set up second virtual line 72 and first virtual line 71 and couple, when putting through constant voltage signal on first virtual line 71 and second virtual line 72, for example when putting through the power signal (can be anodal power signal or negative pole power signal) that drives pixel circuit work, be favorable to reducing power signal's pressure drop, promote the homogeneity of power signal in the display area AA. When the first dummy line 71 and the second dummy line 72 are connected with the reset signal for driving the pixel circuit to operate, the voltage drop of the reset signal is reduced, and the uniformity of the reset signal in the display area AA is improved.
In some embodiments, fig. 11 is a schematic view of another display panel provided in the embodiments of the present invention, and as shown in fig. 11, the virtual line 70 includes a third virtual line 73 extending along the first direction x; at least one third virtual line 73 intersects at least one second line segment X2, and the third virtual line 73 is disconnected at the intersection with the second line segment X2; at least one third virtual line 73 crosses at least one first virtual line 71, and the third virtual line 73 is coupled to the first virtual line 71 at the crossing position. As illustrated in fig. 11, there is a portion of the third virtual line 73 that penetrates the display area AA in the first direction x. Note that, since the third dummy line 73 extends in the same direction as the data line 10, the third dummy line 73 is illustrated by a thick black line in fig. 11 for clearly distinguishing the two lines, and the thick black line does not limit the line width of the third dummy line 73 to be large.
The connecting line 20 is disposed in the display area AA, and includes a first line segment X1, at least a portion of the first line segment X1 is disposed to extend to an upper display area of the display area AA, and a portion of the first line segment X1 has a shorter length and extends only to a lower display area of the display area AA. The problem that the first line segment X1 is not uniform in the second direction y exists in the display area AA, and it can be understood by referring to fig. 6, where the first line segment X1 is not substantially existed in the display area AA at the left position and the right position in fig. 6. In order to further promote figure density uniformity in the display area AA, the embodiment of the present invention provides a third virtual line 73, the extending direction of the third virtual line 73 is the same as the extending direction of the first line segment X1, and the figure of the third virtual line 73 is increased to balance the difference of the routing density extending along the first direction X at different positions.
The third dummy line 73 may be located on the same layer as the second line segment X2, or the third dummy line 73 and the second line segment X2 may be located on different layers. When the third dummy line 73 is located at the same layer as the second line segment X2, the third dummy line 73 is set to be disconnected at a position crossing the second line segment X2, and the third dummy line 73 does not affect the transmission of the signal of the second line segment X2, and does not increase the load on the connection line 20. When the third dummy line 73 and the second line segment X2 are located at different layers, the third dummy line 73 is located at one side of the second line segment X2 close to the substrate 010 for indicating, when in manufacturing, the patterned third dummy line 73 is firstly manufactured, then an insulating layer is manufactured on the third dummy line 73, then the second line segment X2 is manufactured, because the third dummy line 73 is set to be disconnected at the position of crossing with the second line segment X2, the disconnected position of the third dummy line 73 is equivalent to forming a groove, and the part of the second line segment X2 manufactured subsequently is just manufactured in the groove, so that the flatness of the module after the second line segment X2 process can be improved.
In the embodiment of the present invention, the extending direction of the second virtual line segment 712 in the first virtual line 71 is the same as the extending direction of the second virtual line segment X2, and as can be seen from fig. 11, the third virtual line 73 is coupled with the second virtual line segment 712 at the crossing position. The second virtual line segment 712 may be located at the same layer as the second line segment X2 or at a different layer from the second line segment X2. That is, the third imaginary line 73 may be located at the same layer as the second imaginary line segment 712, or may be located at a different layer from the second imaginary line segment 712. When the third virtual line 73 and the second virtual line 712 are located on the same layer, they are directly connected in contact at the crossing position. When the third dummy line 73 and the second dummy line 712 are located on different layers, they are connected at the crossing position by a via hole formed through the insulating layer. The embodiment of the utility model provides an in set up third virtual line 73 and first virtual line 71 and couple, when putting through constant voltage signal on first virtual line 71 and third virtual line 73, for example when putting through the power signal (can be anodal power signal or negative pole power signal) that drive pixel circuit worked, be favorable to reducing power signal's pressure drop, promote the homogeneity of power signal in the display area AA. When the first dummy line 71 and the third dummy line 73 are connected with the reset signal for driving the pixel circuit to operate, the voltage drop of the reset signal is reduced, and the uniformity of the reset signal in the display area AA is improved.
In some embodiments, fig. 12 is a schematic view of another display panel provided by the embodiment of the present invention, as shown in fig. 12, the virtual line 70 includes a fourth virtual line 74 extending along the first direction x, and the fourth virtual line 74 does not intersect with the connection line 20. Wherein the fourth virtual line 74 runs through the display area AA in the first direction x. Since the fourth dummy line 74 extends in the same direction as the data line 10, the fourth dummy line 74 is illustrated by a thick black line in fig. 12 for clearly distinguishing the two lines, and the thick black line does not limit the line width of the fourth dummy line 74 to be large. As illustrated in fig. 12, the connection lines 20 are disposed substantially at the left and right sides of the display area AA, and the connection lines 20 are not disposed at the middle area of the display area AA. Therefore, the embodiment of the present invention provides a fourth virtual line 74 extending along the first direction x, and the graph of the fourth virtual line 74 is added to balance the graph density difference between the middle region and the left and right regions of the display area AA, so as to further improve the uniformity of the graph density in the display area AA, and improve the unevenness of the screen-saving picture.
The schematic virtual line 70 in fig. 12 includes a first virtual line 71 running in the same direction as the connecting lines 20, a third virtual line 73 and a fourth virtual line 74 extending in the first direction x.
In some embodiments, the first virtual line segment 711 and the second virtual line segment 712 of the first virtual line 71 are located at the same layer, and the fourth virtual line 74 is located at the same layer as the first virtual line 71.
In another embodiment, the first virtual line segment 711 and the second virtual line segment 712 of the first virtual line 71 are located in different layers, and the fourth virtual line 74 and the first virtual line segment 711 extending in the same direction are located in the same layer.
In some embodiments, fig. 13 is a schematic view of another display panel according to an embodiment of the present invention, as shown in fig. 13, the display area AA simultaneously includes a first virtual line 71, a second virtual line 72, a third virtual line 73, and a fourth virtual line 74. As indicated by region Z7 in fig. 13, the second virtual line 72 crosses the third virtual line 73 and is coupled to both at the crossing location. As indicated by region Z8 in fig. 13, second virtual line 72 and fourth virtual line 74 intersect and are coupled at the intersection location. It can be seen that in the embodiment that includes four virtual lines simultaneously, the intersecting virtual lines 70 are coupled to each other, and the virtual lines 70 form an approximately grid-shaped structure in the whole display area AA, so that the uniformity of the pattern density in the display area AA can be improved. Further, when the dummy line 70 is turned on with a constant voltage, the overall impedance can be reduced, and the in-plane constant voltage uniformity can be improved.
In the embodiment that includes four virtual lines at the same time, optionally, two metal layers are used to make the virtual line, where the virtual line extending along the first direction x is located in the same layer, the virtual line extending along the second direction y is located in another layer, such as the first virtual line segment 711, the third virtual line 73, and the fourth virtual line 74 in the first virtual line 71 extending along the first direction x are located in the same layer, and the second virtual line 72 extending along the second direction y and the second virtual line segment 712 in the first virtual line 71 are located in the same layer. Two virtual lines whose extending directions cross each other are connected at the crossing position by a via hole penetrating the insulating layer.
In some embodiments, the first line segment X1 and the second line segment X2 in the connection line 20 are located on different layers, wherein the first line segment X1 is located on the same layer as the virtual line extending along the first direction X, the second line segment X2 is located on the same layer as the virtual line extending along the second direction y, and the film layer where the second line segment X2 is located on a side of the film layer where the first line segment X1 is located, the side being away from the substrate 010. The arrangement can increase the distance from the second line segment X2 to the data line 10 in the direction perpendicular to the plane of the substrate 010, so that the signal crosstalk generated by the second line segment X2 crossing the data line 10 can be reduced.
In some embodiments, as shown in fig. 13, the non-display area NA includes a first non-display area NA1, and the plurality of pads 30 are located in the first non-display area NA1; the pad 30 includes a constant voltage signal terminal 30h, and the constant voltage signal terminal 30h is for supplying a constant voltage signal. The first non-display area NA1 includes a first constant voltage bus 80, and the dummy line 70 is coupled to the constant voltage signal terminal 30h through the first constant voltage bus 80. The embodiment of the present invention provides that the dummy line 70 is coupled to the constant voltage signal terminal 30h, and the dummy line 70 transmits a constant voltage signal, which may be, for example, a power signal or a reset signal for driving the pixel circuit to operate.
Fig. 13 illustrates that the first dummy line 71 is coupled to the first constant voltage bus line 80 after extending to the first non-display area NA1, a portion of the second dummy line 72 is coupled to the first constant voltage bus line 80 after extending to the first non-display area NA1, and the fourth dummy line 74 is coupled to the first constant voltage bus line 80 after extending to the first non-display area NA 1. The arrangement is such that the first constant voltage bus 80 is coupled to the virtual line 70 in the display area AA through a plurality of points, which can improve the uniformity of the constant voltage signal at each position and improve the brightness uniformity of the display area.
Fig. 14 is a schematic diagram of another display panel according to an embodiment of the present invention, and fig. 15 is a circuit diagram of a pixel in the display panel according to an embodiment of the present invention. As shown in fig. 14, the display panel includes a substrate 010, an array layer 020 and a device layer 030 on one side of the substrate 010; the array layer 020 includes a plurality of pixel circuits 021, and the device layer 030 includes a plurality of light emitting devices P; the light emitting device P includes a first electrode 031, a light emitting layer 032, and a second electrode 033 stacked. Only one transistor in the pixel circuit 021 is illustrated in fig. 14. As will be understood in conjunction with fig. 15, the first electrode 031 is coupled to the first power supply signal line Pvdd through the pixel circuit 021, and the second electrode 033 is coupled to the second power supply signal line Pvee.
As shown in fig. 15, the pixel circuit includes a driving transistor Tm, a gate reset transistor T1, an electrode reset transistor T2, a data writing transistor T3, a threshold compensation transistor T4, a first light emission control transistor T5, a second light emission control transistor T6, and a storage capacitor Cst. The gate reset transistor T1 is used to reset the gate of the driving transistor Tm, and the electrode reset transistor T2 is used to reset the light emitting device P. A first pole of the gate reset transistor T1 is coupled to a reset signal line Ref for providing a reset signal. A second pole of the gate reset transistor T1 is coupled to the first node N1, a gate of the driving transistor Tm is coupled to the first node N1, a first pole of the driving transistor Tm is coupled to the second node N2, and a second pole of the driving transistor Tm is coupled to the third node N3. The driving transistor Tm is connected in series between the first and second light emission controlling transistors T5 and T6. A first pole of the data writing transistor T3 is coupled to the data line 10, a second pole of the data writing transistor T3 is coupled to the second node N2, and the threshold compensating transistor T4 is connected in series between the first node N1 and the third node N3. The first plate of the storage capacitor Cst and one electrode of the first light emitting control transistor T5 are both coupled to the first power signal line Pvdd. A first electrode of the electrode reset transistor T2 is coupled to the reset signal line Ref, and a second electrode of the electrode reset transistor T2 and the first electrode of the light emitting device P are coupled to the fourth node N4. A second electrode of the light emitting device P is coupled to the second power signal line Pvee. The first power signal line Pvdd is a positive power supply line, and the second power signal line Pvee is a negative power supply line. The gate of the data writing transistor T3 and the gate of the threshold compensating transistor T4 are coupled to a first scan line Sc1, the gate of the gate resetting transistor T1 and the gate of the electrode resetting transistor T2 are coupled to a second scan line Sc2, and the gates of the first and second emission control transistors T5 and T6 are coupled to an emission control line E. In fig. 15, a pixel circuit having only 7 transistors and 1 capacitor is illustrated, and the present invention is not limited thereto.
In one embodiment, the constant voltage signal terminal 30h includes a first power source terminal to which the dummy line 70 is coupled, and the dummy line 70 is multiplexed as the first power source signal line Pvdd. The first power supply signal line Pvdd is a positive power supply line, the first constant voltage bus 80 is a positive power supply bus, and the dummy line 70 in the display area AA can supply a positive power supply signal to the pixel circuit. In some embodiments, the dummy line 70 is multiplexed into the first power supply signal line Pvdd, and there is no need to provide a conventional first power supply signal line in the display area AA, which can save the space occupied by the pixel circuits and increase the number of pixel circuits. In other embodiments, the dummy line 70 is multiplexed as the first power signal line Pvdd, and the dummy line 70 is connected in parallel with the conventional first power signal line in the display area AA, so that the voltage drop for transmitting the first power signal can be reduced, the uniformity of the power signal in the display area AA can be improved, and the brightness uniformity can be improved.
In another embodiment, the constant voltage signal terminal 30h includes a second power supply terminal to which the dummy line 70 is coupled, and the dummy line 70 is multiplexed as the second power supply signal line Pvee. The second power signal line Pvee is a negative power line, the first constant voltage bus 80 is a negative power bus, and the dummy line 70 in the display area AA can provide a negative power signal to the pixel circuit. In a conventional display panel, the cathode power bus needs to be disposed around the left and right frames and the upper frame of the display area AA, which results in the cathode power bus occupying a large space in the non-display area NA. And adopt the utility model discloses after the design, can remove the negative pole power bus that frame and last frame about the display area AA, only set up negative pole power bus in first non-display area NA1, can reduce the pressure drop of transmission negative pole power signal, promote whole negative pole power signal homogeneity in the display area AA, can also reduce the frame simultaneously, improve the screen and account for the ratio.
In another embodiment, the display panel includes a reset signal line Ref, and the pixel circuit 021 includes a reset port, which is coupled to the reset signal line Ref; as will be understood with reference to fig. 15, the first pole of the gate reset transistor T1 and the first pole of the electrode reset transistor T2 are reset ports of the pixel circuit 021. The constant voltage signal terminal 30h includes a reset signal terminal, the dummy line 70 is coupled to the reset signal terminal, the dummy line 70 is multiplexed as a reset signal line Ref, that is, the first constant voltage bus line 80 is a reset bus line, and the dummy line 70 in the display area AA can provide a reset signal to the pixel circuit. The virtual lines 70 as illustrated in fig. 13 form an approximately grid-like structure in the entire display area AA, so that the uniformity of the pattern density in the display area AA can be improved. In addition, by switching on the reset signal through the dummy line 70, the impedance on the whole reset signal line can be reduced, the uniformity of the reset signal in the plane can be improved, and the uniformity of the brightness in the display area AA can be improved.
Fig. 15 illustrates that the gate reset transistor T1 and the electrode reset transistor T2 are coupled to the same reset signal line Ref.
In some embodiments, fig. 16 is another schematic diagram of a pixel circuit provided by an embodiment of the present invention, as shown in fig. 16, a first pole of the gate reset transistor T1 is coupled to a first reset signal line Ref1, a first pole of the electrode reset transistor T2 is coupled to a second reset signal line Ref2, the first reset signal line Ref1 provides a first reset signal, the second reset signal line Ref2 provides a second reset signal, and a voltage value of the first reset signal is different from a voltage value of the second reset signal. The gate of the gate reset transistor T1 is coupled to the second scan line Sc2, and the gate of the electrode reset transistor T2 is coupled to the first scan line Sc1.
In the embodiment of fig. 16, the reset ports include a first reset port and a second reset port; a first pole of the gate reset transistor T1 is a first reset port of the pixel circuit 021, and the first reset signal line Ref1 is coupled to the first reset port. The first pole of the electrode reset transistor T2 is the second reset port of the pixel circuit 021, and the second reset signal line Ref2 is coupled to the second reset port.
In one embodiment, the dummy line 70 is set to transmit the first reset signal, i.e., the dummy line 70 is multiplexed into the first reset signal line Ref1. In another embodiment the dummy line 70 is set to transmit the second reset signal, i.e. the dummy line 70 is multiplexed to the second reset signal line Ref2.
In another embodiment, a part of the dummy lines 70 is set to be multiplexed as the first reset signal lines Ref1, and the remaining part of the dummy lines 70 is multiplexed as the second reset signal lines Ref2. This arrangement enables the voltage drop for transmitting the first reset signal to be reduced by the partial dummy line 70, while the voltage drop for transmitting the second reset signal to be reduced by the remaining partial dummy line 70. Thereby improving the uniformity of reset signals in the display area AA.
In one embodiment, the display panel includes a first reset signal line extending in a first direction x and a first second reset signal line extending in a second direction y, the first reset signal line and the first second reset signal line crossing and being coupled to each other at a crossing position. First reset signal line and first second reset signal line all transmit first reset signal, so set up and make first reset signal line and first second reset signal line intercross form latticed structure, can reduce the voltage drop of transmitting first reset signal. The embodiment of the utility model provides an in set up the multiplexing first reset signal line Ref1 that is of partial virtual line 70, can further reduce the pressure drop of the first reset signal of transmission, promote the homogeneity of the first reset signal of in-plane transmission. The embodiment of the utility model provides an in, a plurality of luminescent device P arrange the formation of image pixel row on first direction x in display area AA, and is optional, and the luminescent device P who sets up in two adjacent pixel rows is coupled same first reset signal line, can also reduce the setting number of first reset signal line when realizing that first reset signal line and first second reset signal line intercross form latticed structure to save the wiring space in the display panel.
In another embodiment, the display panel includes a second reset signal line extending in the first direction x and a second reset signal line extending in the second direction y, the second reset signal line and the second reset signal line crossing and being coupled to each other at a crossing position. The second reset signal line and the second reset signal line both transmit a second reset signal, and the arrangement enables the second reset signal line and the second reset signal line to be crossed with each other to form a grid structure, so that the voltage drop for transmitting the second reset signal can be reduced. The embodiment of the utility model provides an in set up the multiplexing second reset signal line Ref2 that is of partial virtual line 70, can further reduce the pressure drop of transmitting the second reset signal, promote the homogeneity of in-plane transmission second reset signal. The embodiment of the utility model provides an in, a plurality of luminescent device P arrange the formation of image pixel row on first direction x in display area AA, and is optional, and the luminescent device P that sets up in two adjacent pixel rows is coupled same second reset signal line, can also reduce the setting number of second reset signal line when realizing that second reset signal line and second reset signal line intercross form latticed structure to save the wiring space in the display panel.
In an embodiment, fig. 17 is a partial schematic view of another display panel provided in an embodiment of the present invention, and as shown in fig. 17, the light emitting devices P include red light emitting devices Pr, green light emitting devices Pg, and blue light emitting devices Pb; the arrangement of the light emitting devices P in fig. 17 is only schematically shown, and is not intended to limit the present invention. As can be seen from fig. 17, in the direction perpendicular to the plane of the substrate 010, the sites at which the connection lines 20-12 and the data lines 10 are coupled overlap the red light emitting devices Pr, and the sites at which the connection lines 20-11 and the data lines 10 are coupled overlap the blue light emitting devices Pb. That is, the via hole, to which the connection line is coupled with the data line 10, overlaps the red light emitting device Pr, or the via hole, to which the connection line is coupled with the data line 10, overlaps the blue light emitting device Pb. And the via hole, to which the connection line is coupled to the data line 10, does not overlap the green light emitting device Pg. In this embodiment, when designing the positions of the via connections between the connection lines 20 and the data lines 10, it is not necessary to avoid the red light emitting devices Pr and the blue light emitting devices Pb, and the wiring pattern of the connection lines 20 can be relatively simplified. Moreover, the via holes for coupling the connecting lines and the data lines 10 are not overlapped with the green light-emitting devices Pg, so that the influence of the via holes on the uniform light emission of the green light-emitting devices Pg in the peripheral direction can be avoided, and the influence on the display color cast can be reduced.
In some embodiments, as illustrated in the above-described embodiment of fig. 10, the second virtual line 72 crosses the first line segment X1 and the second virtual line 72 is broken at the crossing position, disposed in a direction perpendicular to the plane of the substrate 010, the broken position of the second virtual line 72 does not overlap the green light emitting device Pg, and the broken position of the second virtual line 72 may overlap the red light emitting device Pr or the blue light emitting device Pb. With this arrangement, the influence of the broken position of the second virtual line 72 on the display color shift can be reduced.
In addition, the overlapping condition of the broken position of the third dummy line 73 and the light emitting device P in the embodiment of fig. 12 may be set with reference to the overlapping condition of the broken position of the second dummy line 72 and the light emitting device P described above.
Based on same utility model the design, the embodiment of the utility model provides a still provide a display device, fig. 18 is the embodiment of the utility model provides a display device schematic diagram, as shown in fig. 18, display device includes the utility model discloses arbitrary embodiment provides a display panel 100. The structure of the display panel 100 is already described in the above embodiments, and is not described herein again. The embodiment of the utility model provides a display device is any equipment that has the display function such as cell-phone, panel computer, notebook computer, TV set.
The above description is only a preferred embodiment of the present invention, and should not be taken as limiting the invention, and any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; such modifications or substitutions do not depart from the scope of the invention in its corresponding aspects.

Claims (23)

1. A display panel, comprising a display region and a non-display region; the display area comprises a plurality of data lines and a plurality of connecting lines, and the non-display area comprises a plurality of bonding pads; the data line extends in a first direction, one end of the connecting line is coupled with the data line, and the other end of the connecting line is coupled with the bonding pad; the display area comprises a first boundary close to one side of the bonding pad;
the connecting line comprises a first line segment; in the first direction, the first line segment extends from the first boundary into the display area;
the length of the first line segment in the first direction in at least one connecting line is D 1 The length of the display area in the first direction is D 0 Wherein D is 1 >D 0 /2。
2. The display panel according to claim 1,
the display area includes a symmetry axis extending along the first direction;
on one side of the axis of symmetry: pointing to the symmetry axis from the edge of the display area in a second direction, wherein the lengths of the first line segments are gradually increased, and the second direction is crossed with the first direction.
3. The display panel according to claim 2,
on one side of the axis of symmetry: and pointing the edge of the display area to the symmetry axis in the second direction, wherein the length difference of two adjacent first line segments is a constant value.
4. The display panel according to claim 2,
on one side of the axis of symmetry:
the connecting lines comprise a first connecting line and a second connecting line; the coupling point of the first connecting line and the data line is a first point, and the coupling point of the second connecting line and the data line is a second point;
in the second direction, the first segment of the first connecting line is at a greater distance from the axis of symmetry than the first segment of the second connecting line; in the first direction, the first location is a distance from the first boundary that is less than a distance of the second location from the first boundary.
5. The display panel according to claim 2,
on one side of the axis of symmetry:
the connecting lines comprise a first connecting line and a second connecting line; in the second direction, the first segment of the first connecting line is at a greater distance from the axis of symmetry than the first segment of the second connecting line;
the data lines include a first data line and a second data line; in the second direction, the distance from the first data line to the symmetry axis is greater than the distance from the second data line to the symmetry axis;
the first connection line is coupled to the first data line, and the second connection line is coupled to the second data line.
6. The display panel according to claim 1,
the connecting line further comprises a second line segment extending along a second direction, and the second direction is crossed with the first direction; one end of the second line segment is coupled with the first line segment, and the other end of the second line segment is coupled with the data line.
7. The display panel according to claim 6,
the connecting line further comprises a third line segment extending along the first direction, and the second line segment is coupled with the data line through the third line segment;
the display area includes an axis of symmetry extending along the first direction; on one side of the axis of symmetry:
the connecting lines comprise a first connecting line and a second connecting line; in the second direction, the first segment of the first connecting line is at a greater distance from the axis of symmetry than the first segment of the second connecting line;
the data lines include a third data line and a fourth data line; in the second direction, the distance from the third data line to the symmetry axis is greater than the distance from the fourth data line to the symmetry axis;
the first connection line is coupled to the fourth data line, and the second connection line is coupled to the third data line.
8. The display panel according to claim 1,
the display area comprises virtual lines, wherein the virtual lines comprise a first virtual line;
at least one first virtual line is arranged between two adjacent connecting lines, and the routing direction of the first virtual line is the same as that of the connecting lines.
9. The display panel according to claim 8,
the first virtual line and the connecting line are made of the same material on the same layer.
10. The display panel according to claim 8,
the first virtual line includes a first virtual line segment extending in the first direction, the first virtual line segment being located between two adjacent first line segments.
11. The display panel according to claim 10,
the connecting line further comprises a second line segment extending along a second direction, and the second direction is crossed with the first direction;
the first virtual line includes a second virtual line segment extending in the second direction, the second virtual line segment being located between two adjacent second line segments;
the first virtual line segment and the first line segment are made of the same material at the same layer, the second virtual line segment and the second line segment are made of the same material at the same layer, and the first virtual line segment and the second virtual line segment are located at different layers.
12. The display panel according to claim 10,
at least one data line is spaced between at least two partially adjacent first line segments;
the display panel includes a substrate; in the direction perpendicular to the plane of the substrate, the first virtual line segment and the data line at least partially overlap.
13. The display panel according to claim 11,
the virtual line comprises a second virtual line extending in the second direction;
at least one of the second virtual lines crosses at least one of the first line segments, and the second virtual line is disconnected at the position of crossing with the first line segment;
at least one of the second virtual lines crosses at least one of the first virtual lines, and the second virtual line is coupled with the first virtual line at a crossing location.
14. The display panel according to claim 11,
the virtual line includes a third virtual line extending in the first direction;
at least one of the third virtual lines crosses at least one of the second line segments, and the third virtual line is disconnected at a position where it crosses the second line segment;
at least one of the third virtual lines crosses at least one of the first virtual lines, and the third virtual line is coupled to the first virtual line at the crossing location.
15. The display panel according to claim 8,
the dummy lines include a fourth dummy line extending in the first direction, the fourth dummy line not crossing the connection line.
16. The display panel according to claim 8,
the display panel comprises a constant voltage signal end, wherein the constant voltage signal end is used for providing a constant voltage signal; the dummy line is coupled to the constant voltage signal terminal.
17. The display panel according to claim 16,
the non-display area comprises a first non-display area, and a plurality of bonding pads are positioned in the first non-display area;
the first non-display area includes a first constant voltage bus line, and the dummy line is coupled to the constant voltage signal terminal through the first constant voltage bus line.
18. The display panel according to claim 16,
the display panel comprises a substrate, an array layer and a device layer, wherein the array layer and the device layer are positioned on one side of the substrate; the array layer includes a plurality of pixel circuits, and the device layer includes a plurality of light emitting devices; the light emitting device includes a first electrode, a light emitting layer, and a second electrode stacked;
the first electrode is coupled to a first power signal line through the pixel circuit, and the second electrode is coupled to a second power signal line; wherein, the first and the second end of the pipe are connected with each other,
the constant voltage signal terminal comprises a first power supply terminal, the virtual line is coupled with the first power supply terminal, and the virtual line is multiplexed as the first power supply signal line; or, the constant voltage signal terminal includes a second power supply terminal, the dummy line is coupled to the second power supply terminal, and the dummy line is multiplexed as the second power supply signal line.
19. The display panel according to claim 16,
the display panel comprises a substrate, an array layer and a device layer, wherein the array layer and the device layer are positioned on one side of the substrate; the array layer includes a plurality of pixel circuits, and the device layer includes a plurality of light emitting devices;
the display panel includes a reset signal line, the pixel circuit includes a reset port, and the reset port is coupled to the reset signal line;
the constant voltage signal terminal includes a reset signal terminal, the dummy line is coupled to the reset signal terminal, and the dummy line is multiplexed as the reset signal line.
20. The display panel according to claim 19,
the reset signal line comprises a first reset signal line and a second reset signal line, and the reset port comprises a first reset port and a second reset port; the first reset signal line is coupled to the first reset port, and the second reset signal line is coupled to the second reset port;
the pixel circuit comprises a grid electrode reset transistor, an electrode reset transistor and a driving transistor, wherein the grid electrode reset transistor is used for resetting the grid electrode of the driving transistor, and the electrode reset transistor is used for resetting the light-emitting device; the first electrode of the grid electrode reset transistor is the first reset end, and the first electrode of the electrode reset transistor is the second reset end; wherein the content of the first and second substances,
part of the dummy lines are multiplexed as the first reset signal lines, and part of the dummy lines are multiplexed as the second reset signal lines.
21. The display panel according to claim 1,
the display panel comprises a substrate and a plurality of light emitting devices positioned on one side of the substrate; the light emitting devices include a red light emitting device, a green light emitting device, and a blue light emitting device;
in a direction perpendicular to a plane of the substrate, a site at which the connection line and the data line are coupled overlaps the red light emitting device, or a site at which the connection line and the data line are coupled overlaps the blue light emitting device.
22. The display panel according to claim 1,
the display area comprises a first display area and two second display areas; in a second direction, the two second display areas are respectively positioned at two sides of the first display area, and the second direction is crossed with the first direction; the display area has an axis of symmetry extending in the first direction, the axis of symmetry being located at the first display area;
the data lines comprise a plurality of middle data lines and a plurality of edge data lines, the middle data lines are positioned in the first display area, and the edge data lines are positioned in the second display area; the non-display area includes a lead line through which the intermediate data line is coupled with the pad;
at least part of the connecting lines are positioned in the second display area, and the connecting lines are coupled with the edge data lines.
23. A display device characterized by comprising the display panel according to any one of claims 1 to 22.
CN202221608885.XU 2022-06-23 2022-06-23 Display panel and display device Active CN218039210U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202221608885.XU CN218039210U (en) 2022-06-23 2022-06-23 Display panel and display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202221608885.XU CN218039210U (en) 2022-06-23 2022-06-23 Display panel and display device

Publications (1)

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Family Applications (1)

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