CN217955856U

CN217955856U - Transient voltage suppression protection device and electronic product

Info

Publication number: CN217955856U
Application number: CN202222057301.0U
Authority: CN
Inventors: 张富生; 许成宗; 韩业星; 黄智�
Original assignee: Will Semiconductor Ltd
Current assignee: Will Semiconductor Ltd
Priority date: 2022-08-05
Filing date: 2022-08-05
Publication date: 2022-12-02
Anticipated expiration: 2032-08-05

Abstract

The embodiment of the application provides a transient voltage suppression protection device and an electronic product, and the application utilizes the characteristic of semiconductor punch-through by adopting a high-resistance substrate and connecting two base open circuit triodes in series through a common collector in parallel to form an ultra-low trigger voltage PNPN structure, thereby solving the problem that the device cannot be normally and independently applied due to the unidirectional cut-off characteristic of the triode with the high-resistance substrate. Meanwhile, the capacitance of the device can be halved by connecting the low-capacitance ultra-low trigger voltage PNPN in series to obtain smaller capacitance, and then the low-capacitance TVS is made by connecting the low-capacitance ultra-low trigger voltage PNPN in parallel, so that the special requirement for protecting the device in practical application is met.

Description

Transient voltage suppression protection device and electronic product

Technical Field

The embodiment of the application relates to the technical field of integrated circuits, in particular to a transient voltage suppression protection device and an electronic product.

Background

With the increasing of the signal transmission rate of electronic products, the process of semiconductor devices is more and more advanced, the electronic products have weaker and weaker bearing capacity to ESD (electrostatic discharge) and EOS (electrical overstress), which needs to increase the transient voltage suppression protection device (TVS) to protect the semiconductor devices in the electronic products, so higher requirements are put forward on the TVS devices, lower trigger voltage and clamping voltage, and smaller capacitors are needed, the existing TVS products have the problems of complex process, higher trigger voltage and clamping voltage, and great problems in protecting the semiconductor devices.

Disclosure of Invention

It is an object of embodiments provided by the present application to overcome the above problems or to at least partially solve or mitigate the above problems.

Another object of the embodiments provided in the present application is to solve the problems of high low-capacitance TVS trigger voltage and clamp voltage and large dynamic impedance existing in the existing product process, and to manufacture a high-performance transient voltage suppression protection device with low cost and simple process, which can be turned on at a low voltage and has the advantages of low clamp voltage, small dynamic impedance, low capacitance, etc.

In a first aspect, an embodiment of the present application provides a transient voltage suppression protection device, including a substrate, a first well, a second well, a third well, a first implantation region, a second implantation region, a third implantation region, and a fourth implantation region;

the first well, the second well, the third injection region and the third well are arranged on the substrate at intervals from left to right in sequence, the doping types of the first well, the second well, the third well and the third injection region are the same, the doping types of the substrate, the first injection region, the second injection region and the fourth injection region are the same, the first injection region is arranged in the first well different from the doping type of the first injection region, the second injection region is arranged in the second well different from the doping type of the second injection region, and the fourth injection region is arranged in the third well different from the doping type of the fourth injection region;

the first electrode of the first injection region led out through metal and the second electrode of the fourth injection region led out through metal are both used as the cathode of the device, and the third electrode of the second injection region led out through metal and the fourth electrode of the third injection region led out through metal are used as the anode of the device.

As a preferred embodiment of the present application, the first well, the second well, the third well and the third implantation region are all P-type doped, and the substrate, the first implantation region, the second implantation region and the fourth implantation region are all N-type doped.

As a preferred embodiment of the present application, the protection device further includes a fourth well, the third implantation region is disposed in the fourth well, and doping types of the fourth well are the same as those of the first well, the second well, the third well, and the third implantation region.

As a preferred embodiment of the present application, the protection device further includes a fifth implantation region and a sixth implantation region, the fifth implantation region and the sixth implantation region are disposed in the fourth well, and the doping types of the fifth implantation region and the sixth implantation region are the same as those of the fourth well.

As a preferred embodiment of the present application, the fifth implantation region and the sixth implantation region are distributed on two sides of the third implantation region.

As a preferred embodiment of the present application, the first well, the second well, the third implantation region and the third well are spaced apart from each other by a distance of 5-20um.

As a preferred embodiment of the present application, the substrate has a resistivity of 30 to 2000 Ω · cm.

Compared with the prior art, the embodiment of the application provides a transient voltage suppression protection device, and the application utilizes the characteristic of semiconductor punch-through by adopting the high-resistance substrate and connecting two base open circuit triodes in series through the shared collector in parallel to form an ultra-low trigger voltage PNPN structure, thereby solving the problem that the device cannot be normally and independently applied due to the unidirectional cut-off characteristic of the triode with the high-resistance substrate. Meanwhile, the capacitance of the device can be halved by connecting the two capacitors in series, and smaller capacitance can be obtained. And a novel unidirectional low-capacitance TVS is manufactured by a parallel low-capacitance ultra-low trigger voltage PNPN structure, so that the special requirement on a protective device in practical application is met.

In a second aspect, an embodiment of the present application provides an electronic product, including any one of the above transient voltage suppression protection devices.

Compared with the prior art, in the second aspect, the beneficial effects of the electronic product provided in the embodiment of the present application are the same as the beneficial effects of the transient voltage suppression protection device described in any technical scheme of the first aspect, and are not described herein again.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.

Fig. 1 is a cross-sectional view of a tvs protection device according to an embodiment of the present application;

fig. 2 is an equivalent circuit diagram of a transient voltage suppression protection device according to an embodiment of the disclosure;

fig. 3 is a cross-sectional view of a tvs protection device according to another embodiment of the present application;

fig. 4 is a cross-sectional view of a tvs protection device according to an embodiment of the present application.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

Various non-limiting embodiments of the present application are described in detail below with reference to the accompanying drawings.

In a first aspect, the transient voltage suppression protection device provided in the embodiments of the present application is a current control type device, which controls an output current by an input current, and has a current amplification function, and when it operates, two carriers, namely, an electron carrier and a hole carrier, participate in a conduction process.

The semiconductor triode has three electrodes, namely an emitter, a base and a collector, and is processed to generate voltage when in work, so that current of each electrode is generated, the current of the emitter is equal to the sum of the current of the base and the collector when the semiconductor triode works, wherein the current of the base is the minimum, the current of the emitter is the maximum, and a very small current is added to the base, so that a very large current can be output to the collector, and the triode has an amplification effect.

Example 1

As shown in fig. 1, an embodiment of the present application provides a transient voltage suppression protection device, which includes a substrate 01, a first well 02, a second well 03, a third well 08, a first implantation region 04, a second implantation region 05, a third implantation region 06, and a fourth implantation region 07;

the first well 02, the second well 03, the third implantation region 06 and the third well 08 are arranged on the substrate 01 at intervals from left to right in sequence, the doping types of the first well 02, the second well 03, the third well 08 and the third implantation region 06 are the same, the doping types of the substrate 01, the first implantation region 04, the second implantation region 05 and the fourth implantation region 07 are the same, the first implantation region 04 is arranged in the first well 02 with the doping type different from that of the first implantation region 04, the second implantation region 05 is arranged in the second well 03 with the doping type different from that of the second implantation region 05, and the fourth implantation region 07 is arranged in the third well 08 with the doping type different from that of the fourth implantation region 07;

the first electrode of the first injection region 04 led out through the metal 09 and the second electrode of the fourth injection region 07 led out through the metal 10 are both used as the cathode of the device, and the third electrode of the second injection region 05 led out through the metal 11 and the fourth electrode of the third injection region 06 led out through the metal 12 are used as the anode of the device.

The first well 02, the second well 03, the third well 08 and the third implantation region 06 are all doped P-type, and the substrate 01, the first implantation region 04, the second implantation region 05 and the fourth implantation region 07 are all doped N-type.

In the embodiment of the present application, the first well 02, the second well 03, the third implantation region 06 and the third well 08 are spaced apart from each other by a distance of 5-20um.

In the present embodiment, the substrate 01 has a resistivity of 30 to 2000 Ω · cm.

As shown in fig. 2, according to the transient voltage suppression protection device of the embodiment of the present application, two lateral base open transistors NPN are connected in series and then connected in parallel to a low capacitance ultra-low trigger voltage PNPN structure, a P-type doped region first well 02, a second well 03 and a third well 08 are formed by implanting on an N-type substrate 01 with a resistivity of 30-2000ohm · cm, a P-type highly doped region third implantation region 06 is formed by implanting on the substrate 01, an N-type highly doped region first implantation region 04 is formed by implanting on the P-type doped region first well 02, an N-type highly doped region second implantation region 05 is formed by implanting on the second well 03, an N-type highly doped region fourth implantation region 07 is formed by implanting on the third well 08, and a low capacitance low trigger TVS is formed by adjusting areas of the second well 03 and the third implantation region 06.

Example 2

As shown in fig. 3, in embodiment 2, based on embodiment 1, the protection device further includes a fourth well 13, the third implantation region 06 is disposed in the fourth well 13, and doping types of the fourth well 13 are the same as those of the first well 02, the second well 03, the third well 13, and the third implantation region 06. The doping type of the fourth well 13 is P-type doping, and a smaller capacitance is obtained by connecting a low-capacitance ultra-low trigger voltage PNPN structure in parallel in the embodiment of the application.

Example 3

As shown in fig. 4, in embodiment 3, based on embodiment 2, the protection device further includes a fifth implantation region 14 and a sixth implantation region 15, where the fifth implantation region 14 and the sixth implantation region 15 are disposed in the fourth well 13, and doping types of the fifth implantation region 14 and the sixth implantation region 15 are the same as those of the fourth well 13. The fifth 14 and sixth 15 implanted regions are distributed on both sides of the third implanted region 06. The doping type of the sixth implantation region 15 is P-type doping, and surge and ESD protection capabilities can be increased through a parasitic NPNPN structure.

In a third aspect, an embodiment of the present application further provides an electronic product. The electronic product comprises the unidirectional transient voltage suppression protection device provided by the application.

The electronic products may be display terminals, communication devices, engineering devices, and the like, which are not listed herein.

Compared with the prior art, the beneficial effects of the electronic product provided by the embodiment of the third aspect are the same as those of the unidirectional transient voltage suppression protection device described in any technical scheme of the first aspect, and are not described herein again.

In the foregoing description of embodiments, the particular features, structures, or characteristics may be combined in any suitable manner in any one or more embodiments or examples.

Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A transient voltage suppression protection device is characterized by comprising a substrate, a first well, a second well, a third well, a first injection region, a second injection region, a third injection region and a fourth injection region;

2. The tvs protection device of claim 1, wherein said first well, said second well, said third well and said third implanted region are P-type doped, and said substrate, said first implanted region, said second implanted region and said fourth implanted region are N-type doped.

3. The tvs protection device of claim 1, further comprising a fourth well, said third implant region being disposed in said fourth well, said fourth well being of the same doping type as said first, second, third and third implant regions.

4. The tvs protection device of claim 3, further comprising fifth and sixth implanted regions disposed in said fourth well, said fifth and sixth implanted regions being doped in the same type as said fourth well.

5. The TVS protection device of claim 4, wherein the fifth and sixth implant regions are distributed at both sides of the third implant region.

6. The tvs device of claim 1, wherein said first well, said second well, said third implanted region and said third well are spaced apart from each other by a distance of 5-20um.

7. The tvs protection device of claim 1, wherein said substrate has a resistivity of 30-2000 Ω -cm.

8. An electronic product comprising a transient voltage suppression protection device as claimed in any of claims 1 to 7.