CN217902333U - Clamping circuit insensitive to temperature change and electronic equipment - Google Patents
Clamping circuit insensitive to temperature change and electronic equipment Download PDFInfo
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- CN217902333U CN217902333U CN202221111497.0U CN202221111497U CN217902333U CN 217902333 U CN217902333 U CN 217902333U CN 202221111497 U CN202221111497 U CN 202221111497U CN 217902333 U CN217902333 U CN 217902333U
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Abstract
The application provides a clamping circuit insensitive to temperature variation and an electronic device. The clamping circuit insensitive to temperature change comprises a feedback circuit, a voltage stabilizing circuit, a temperature compensation circuit, an operational amplifier and a clamping transistor; the feedback circuit is used for outputting a feedback voltage; the voltage stabilizing circuit is used for outputting an initial reference voltage with a negative temperature coefficient; the temperature compensation circuit is used for carrying out positive temperature coefficient compensation on the initial reference voltage to obtain a target reference voltage with balanced positive and negative temperature coefficients; the operational amplifier is used for comparing the feedback voltage with a target reference voltage and outputting a control signal to the clamping transistor according to a comparison result so as to control the clamping voltage output by the clamping transistor to be within a preset voltage range. The clamping voltage output by the clamping transistor is not influenced by temperature change, so that the clamping circuit has the characteristic of insensitivity to temperature change in the true sense.
Description
[ technical field ] A method for producing a semiconductor device
The present disclosure relates to clamping circuits, and particularly to a clamping circuit insensitive to temperature variation and an electronic device.
[ background of the invention ]
In the related art, the clamp circuit generally includes an error amplifier, a clamp transistor and a feedback resistor, and the operating principle thereof is as follows: after the reference voltage and the divided voltage of the feedback resistor are respectively input into the inverting input end and the inverting input end of the error amplifier, the error amplifier can compare the reference voltage and the divided voltage and output a control signal according to a comparison result to control the discharge of the clamping transistor, so that the clamping work of the voltage is realized. In practical applications, the reference voltage is usually obtained in two ways, i.e., introduced from a bandgap reference circuit or generated by directly using a zener device such as a zener diode. For the first acquisition mode, the band gap reference circuit has a large scale, and not only needs to occupy a large area of a chip, but also needs to pass through transmission and feedback between the band gap reference circuit and the clamping circuit, so that the starting and stabilizing speed of the whole chip circuit is low. For the second acquisition mode, the reference voltage generated by using the voltage regulator device may shift with the variation of external factors such as the input bias current and the temperature of the voltage regulator device, i.e. the reference voltage is seriously affected by the temperature variation, or in other words, is too sensitive to the temperature variation.
Therefore, it is necessary to improve the structure of the clamp circuit.
[ Utility model ] A method for manufacturing a semiconductor device
The application provides a clamping circuit insensitive to temperature change and electronic equipment, and aims to solve the problem that the clamping circuit is too sensitive to temperature change in the related art.
In order to solve the above technical problem, a first aspect of the embodiments of the present application provides a clamp circuit insensitive to temperature variation, including a feedback circuit, a voltage stabilizing circuit, a temperature compensation circuit, an operational amplifier, and a clamp transistor; the voltage stabilizing circuit is connected to the non-inverting input end of the operational amplifier, the feedback circuit is connected to the inverting input end of the operational amplifier, the temperature compensating circuit is connected to the voltage stabilizing circuit and the inverting input end of the operational amplifier, and the output end of the operational amplifier is connected to the clamping transistor;
the feedback circuit is used for outputting a feedback voltage;
the voltage stabilizing circuit is used for outputting an initial reference voltage with a negative temperature coefficient;
the temperature compensation circuit is used for carrying out positive temperature coefficient compensation on the initial reference voltage to obtain a target reference voltage; wherein the positive and negative temperature coefficients of the target reference voltage are balanced;
the operational amplifier is used for comparing the feedback voltage with the target reference voltage and outputting a control signal to the clamping transistor according to a comparison result so as to control the clamping voltage output by the clamping transistor to be within a preset voltage range.
A second aspect of the embodiments of the present application provides an electronic device, including a circuit board, on which the clamping circuit insensitive to temperature variation is integrated.
As can be seen from the above description, the present application has the following advantages compared with the related art:
the feedback circuit, the voltage stabilizing circuit, the temperature compensating circuit, the operational amplifier and the clamp transistor form a clamp circuit. In practical application, the feedback circuit outputs a feedback voltage, the voltage stabilizing circuit outputs an initial reference voltage with a negative temperature coefficient, the temperature compensating circuit performs positive temperature coefficient compensation on the initial reference voltage to obtain a target reference voltage with balanced positive and negative temperature coefficients, then the operational amplifier compares the feedback voltage with the target reference voltage and outputs a control signal to the clamping transistor according to a comparison result so as to control the clamping voltage output by the clamping transistor to be within a preset voltage range. Therefore, although the initial reference voltage output by the voltage stabilizing circuit has a negative temperature coefficient, the initial reference voltage is subjected to positive temperature coefficient compensation (which is equivalent to the positive temperature coefficient compensation of the voltage stabilizing circuit) through the temperature compensation circuit, so that a target reference voltage with balanced positive and negative temperature coefficients is obtained, and thus, the clamping voltage output by the clamping transistor is not influenced by temperature change, and the clamping circuit has the characteristic of insensitivity to the temperature change in the true sense.
[ description of the drawings ]
In order to more clearly illustrate the technical solutions in the related art or the embodiments of the present application, the drawings needed to be used in the description of the related art or the embodiments of the present application will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, not all embodiments, and other drawings can be obtained by those skilled in the art without inventive efforts.
FIG. 1 is a block diagram of a conventional clamping circuit applied to a chip circuit;
FIG. 2 is a schematic diagram of a conventional clamp circuit;
FIG. 3 is a block diagram of a clamp circuit insensitive to temperature variations, provided in accordance with an embodiment of the present application;
fig. 4 is a schematic structural diagram of a clamping circuit insensitive to temperature change according to an embodiment of the present disclosure.
[ detailed description ] embodiments
In order to make the objects, technical solutions and advantages of the present application more apparent and understandable, the present application will be clearly and completely described below in conjunction with embodiments of the present application and corresponding drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. It should be understood that the embodiments of the present application described below are only used for explaining the present application and are not used for limiting the present application, that is, all other embodiments obtained by a person of ordinary skill in the art without making creative efforts based on the embodiments of the present application belong to the protection scope of the present application. In addition, the technical features involved in the respective embodiments of the present application described below may be combined with each other as long as they do not conflict with each other.
A clamping circuit (circuit) is a circuit that fixes a certain portion of a pulse signal to a specified voltage value and keeps the original waveform shape unchanged, for example, the top or bottom of a periodically changing waveform at a certain dc level. The clamp circuit has a wide application range, and can be applied to various electronic devices needing a clamping function, such as an oscilloscope or a radar display, and the clamp circuit is used for recovering a direct current component of a scanning signal so as to solve the problem of the movement of the position of an image on a screen caused by the change of the scanning speed; in a television, the top end of a synchronous pulse of a full television signal is kept at a fixed voltage through a clamping circuit so as to overcome level fluctuation caused by loss of direct current components or interference and the like, thereby realizing separation of television synchronous signals; in a chip circuit with current source input, voltage is clamped through a clamping circuit so as to protect a post-stage working circuit.
In the related art, the clamp circuit generally includes an error amplifier, a clamp transistor and a feedback resistor, and the operation principle thereof is as follows: after the reference voltage and the divided voltage of the feedback resistor are respectively input into the inverting input end and the inverting input end of the error amplifier, the error amplifier compares the reference voltage and the divided voltage, and outputs a control signal according to a comparison result to control the discharge of the clamping transistor, so that the clamping work of the voltage is realized. In practical applications, the reference voltage is usually obtained in two ways, i.e., introduced from a bandgap reference circuit or generated by directly using a zener device such as a zener diode. For the first acquisition mode, the band-gap reference circuit has a large scale, and not only occupies a large area of the chip, but also needs to be transmitted and fed back between the band-gap reference circuit and the clamping circuit, so that the starting and stabilizing speed of the whole chip circuit is slow. For the second acquisition method, the reference voltage generated by using the voltage regulator device may shift with the variation of external factors such as the input bias current of the voltage regulator device, the temperature, etc., which means that it is seriously affected by the temperature variation, or that it is too sensitive to the temperature variation. To this end, the embodiments of the present application provide a clamping circuit insensitive to temperature variation, which can be applied to various electronic devices requiring clamping action, such as oscilloscopes, televisions, radar displays, chip circuits with current source input, and the like.
Before elaborating on the clamp circuit insensitive to temperature change provided in the embodiments of the present application, the application of the conventional clamp circuit to a chip circuit is taken as an example, and the conventional clamp circuit is more intuitively understood according to the related drawings of the conventional clamp circuit.
Referring to fig. 1, fig. 1 is a block diagram of a conventional clamping circuit applied to a chip circuit; wherein, I in Is the input current, V, of a conventional clamping circuit clamp Is the clamping voltage output by the conventional clamping circuit, and the conventional clamping circuit outputs V clamp The purpose of (1) is to clamp and protect the post-stage working circuit. Specifically, referring to fig. 2, fig. 2 is a schematic structural diagram of a conventional clamp circuit; wherein R is F1 And R F2 Two feedback resistors connected in series, ER AMP is an error amplifier, CT is a clamp transistor, V K Is a reference voltage, V F Is R F1 And R F2 Partial pressure of (i.e. R) F1 And R F2 The voltage at the junction therebetween. In practical application, V K And V F Respectively as inputs to the inverting and inverting inputs of ER AMP, which will be coupled to V K And V F Comparing, and outputting control signal to CT according to the comparison result to control I in Charging/discharging the CT to realize corresponding clamping operation (namely, outputting the V of the CT all the time clamp Limited within a preset safety range), and the rear-stage working circuit is protected. As mentioned in the foregoing, V K The voltage regulator is either introduced from a band-gap reference circuit or directly generated by a voltage regulator such as a Zener tube, and V is acquired by adopting any one of the two modes K There are some inevitable disadvantages, such as large occupied chip area, slow starting and stabilizing speed, and excessive sensitivity to temperature variation, which is the reason for the clamp circuit developed and designed by the embodiments of the present application to be insensitive to temperature variation.
Referring to fig. 3, fig. 3 is a block diagram of a clamp circuit insensitive to temperature variation according to an embodiment of the present disclosure. The clamping circuit insensitive to temperature variation provided by the embodiment of the application comprises a feedback circuit 100, a voltage stabilizing circuit 200, a temperature compensation circuit 300, an operational amplifier OP AMP and a clamping transistor Q CT (ii) a Wherein the voltage stabilizing circuit 200 is connected to the non-inverting input terminal of the operational amplifier OP AMP, the feedback circuit 100 is connected to the inverting input terminal of the operational amplifier OP AMP, the temperature compensating circuit 300 is connected to the voltage stabilizing circuit 200 and the inverting input terminal of the operational amplifier OP AMP, the output terminal of the operational amplifier OP AMP is connected to the clamp transistor Q CT . Note that the clamp transistor Q is provided in addition to the clamp transistor Q CT PMOS transistors commonly used in the art may be used.
Specifically, the feedback circuit 100 is used for outputting the feedback voltage V FB . Voltage stabilizing circuit 200 is used for outputting an initial reference voltage V 'with a negative temperature coefficient' ref . Temperature compensation circuit 300 is used to reference an initial reference voltage V' ref Performing positive temperature coefficient compensation to obtain a target reference voltage V ref (ii) a Wherein the target reference voltage V ref The positive and negative temperature coefficients are balanced. An operational amplifier OP AMP for compensating the feedback voltage V FB And a target reference voltage V ref Comparing the voltage and current and outputting a control signal to the clamp transistor Q according to the comparison result CT To control the clamp transistor Q CT Clamping voltage V of output C Within a preset voltage range.
In practical applications, the feedback circuit 100 outputs the feedback voltage V to the inverting input terminal of the operational amplifier OP AMP FB Meanwhile, the voltage regulator circuit 200 outputs an initial reference voltage V 'with a negative temperature coefficient to the non-inverting input terminal of the operational amplifier OP AMP' ref However, at this time, the voltage signal received at the non-inverting input terminal of the operational amplifier OP AMP is not the initial reference voltage V' ref This is because the temperature compensation circuit 300 is responsive to the initial reference voltage V' ref Positive temperature coefficient compensation is carried out, and target reference voltage V with balanced positive and negative temperature coefficients is obtained ref I.e. the in-phase output of the operational amplifier OP AMPThe voltage signal received by the input terminal is actually the target reference voltage V ref Then the operational amplifier OP AMP will respond to the feedback voltage V FB And a target reference voltage V ref Comparing the voltage and current values, and outputting a control signal to the clamp transistor Q according to the comparison result CT So that the clamp transistor Q CT Clamping voltage V of output C Is always within the preset voltage range.
It can be seen that although the voltage stabilizing circuit 200 outputs the initial reference voltage V' ref Has a negative temperature coefficient, but in the present embodiment, the initial reference voltage V 'is compensated by the temperature compensation circuit 300' ref Positive temperature coefficient compensation is performed (which is equivalent to the positive temperature coefficient compensation is directly performed on the voltage stabilizing circuit 200), so that the target reference voltage V with balanced positive and negative temperature coefficients is obtained ref Thus, the clamp transistor Q CT Clamping voltage V of output C The clamp circuit is not influenced by temperature change, so that the clamp circuit has the characteristic of insensitivity to temperature change in the true sense.
As an embodiment, please further refer to fig. 4, in which fig. 4 is a schematic structural diagram of a clamping circuit insensitive to temperature variation according to an embodiment of the present disclosure. In this embodiment, the voltage stabilizing circuit 200 may include a first resistor R 1 A second resistor R 2 And voltage-stabilizing triode Q 1 (bipolar transistors commonly used in the art may be employed); wherein, the voltage-stabilizing triode Q 1 Is connected to the temperature compensation circuit 300, the first resistor R 1 And a second resistor R 2 In series, a first resistor R 1 And a second resistor R 2 Contact point between and voltage-stabilizing triode Q 1 Respectively connected to the non-inverting input terminal of an operational amplifier OP AMP, a voltage-stabilizing transistor Q 1 Is interconnected with the collector electrode. Here, it is necessary to explain the initial reference voltage V' ref Substantially a voltage-stabilizing triode Q 1 Base-emitter voltage V of BE (i.e., the voltage between the base and emitter).
Further, the temperature compensation circuit 300 may include a compensation transistor Q 2 (can adopt the common use in the fieldBipolar transistor) and compensation resistor R E (ii) a Wherein, the compensation triode Q 2 Is connected with a voltage-stabilizing triode Q 1 Base stage of (2), compensating triode Q 2 The collector of the operational amplifier OP AMP is connected to the inverting input terminal of the operational amplifier OP AMP, and the compensating triode Q 2 Is connected to the compensation resistor R E 。
Further, the feedback circuit 100 may include a third resistor R 3 And a fourth resistor R 4 (ii) a Wherein the third resistor R 3 And a fourth resistor R 4 In series, a third resistor R 3 And a fourth resistor R 4 The junction therebetween is connected to the inverting input terminal of the operational amplifier OP AMP. Here, it is necessary to explain that the feedback voltage V FB Is effectively the third resistor R 3 And a fourth resistor R 4 The voltage at the junction therebetween.
Under the premise of not considering the influence of temperature change, the voltage-stabilizing triode Q 1 Is connected to the collector in a diode-connected manner with a voltage-stabilizing characteristic, then when V is C *[R 1 /(R 1 +R 2 )]≥V BE Time, voltage-stabilizing triode Q 1 Will clamp the voltage at the non-inverting input of the operational amplifier OP AMP at V BE (ii) a When V is C ＜V BE *[(R 1 +R 2 )/R 1 ]Input current I of the clamping circuit in Will continue to clamp the transistor Q CT Charging (corresponding to clamping voltage V) C Charging is carried out); when V is C ≥V BE *(R 4 /R 3 ) The operational amplifier OP AMP controls the clamp transistor Q CT Generating a pull-down current I C To clamp the transistor Q CT Discharge (corresponding to clamp voltage V) C Discharge) is performed, thereby achieving the purpose of voltage clamping, so that the clamping voltage V is C Is always within the preset voltage range.
It is understood that the above description is only about the clamping process without considering the influence of temperature variation, and the important point of the present embodiment is that the clamping circuit is multiplexed with the zener transistor Q 1 I.e. voltage-stabilizing triode Q 1 In this embodiment, it is not only used forIs a voltage regulator device (see fig. 2. The voltage regulator device in the conventional clamping circuit is used for generating the reference voltage V K ) And also for temperature compensation. The present embodiment utilizes a voltage-stabilizing transistor Q 1 Base-emitter voltage V of BE So that the triode Q is stabilized 1 Base-emitter voltage V of BE Can be used as a reference voltage V in a traditional clamping circuit K The reference voltage V in the traditional clamping circuit is generated without additional circuits (such as a band gap reference circuit and the like) K This makes the present embodiment superior to the conventional clamp circuit in terms of circuit simplification, chip footprint, start-up and speed stabilization.
As mentioned above, the regulator transistor Q 1 And compensation triode Q 2 Any bipolar transistor (such as NPN transistor, etc.) commonly used in the art can be adopted, and the bipolar transistor usually has two important characteristics, which are:
characteristic I, base-emitter voltage of bipolar transistor has negative temperature characteristic, namely voltage-stabilizing triode Q 1 Base-emitter voltage V of BE Has a negative temperature coefficient;
second, when two bipolar transistors work under different current densities, the difference value of the base electrode-emitter electrode voltages of the two bipolar transistors is in direct proportion to the absolute temperature, namely, the voltage-stabilizing triode Q 1 Base-emitter voltage V of BE And compensation triode Q 2 Base-emitter voltage V of BE Difference Δ V between BE Proportional to absolute temperature, can be represented by the first formula:
ΔV BE ＝V T ln(n)；
wherein, V T Triode Q for representing voltage stabilization 1 And compensation triode Q 2 With a thermal voltage therebetween, n represents a voltage-stabilizing transistor Q 1 And compensation triode Q 2 Current density ratio therebetween. In view of this, if two quantities with opposite temperature coefficients are increased by appropriate weighting, the positive and negative temperature coefficients will reach equilibrium and will consequently exhibit a zero temperature coefficient, i.e. ifIf the balance of positive and negative temperature coefficients is to be achieved, then the voltage-stabilizing triode Q 1 Base-emitter voltage V of BE With a negative temperature coefficient, a positive temperature coefficient and a voltage stabilizing transistor Q are required 1 Compensation triode Q for positive temperature coefficient compensation 2 。
On the basis, if the clamping circuit only passes through the voltage-stabilizing triode Q 1 To generate a regulated voltage value V at the non-inverting input of an operational amplifier OP AMP BE Then clamp transistor Q CT Final output clamp voltage V C Will have negative temperature characteristics, thus adding a compensation triode Q 2 And a compensation resistor R E Can compensate positive temperature coefficient of clamping circuit, namely, can compensate voltage-stabilizing triode Q 1 Performing positive temperature coefficient compensation to make the clamping transistor Q CT Final output clamp voltage V C Is not affected by temperature change. Specifically, the clamp transistor Q CT The output clamping voltage V C Can be represented by the second formula:
wherein, V T ln (n) represents a positive temperature characteristic, V BE Representing a negative temperature characteristic, we can adjust V T ln (n) and V BE Thereby enabling the clamp transistor Q to be operated at a constant voltage CT The output clamping voltage V C The balance of positive and negative temperature coefficients can be achieved.
In the present embodiment, the first resistor R 1 A second resistor R 2 Compensating resistor R E A third resistor R 3 And a fourth resistor R 4 The clamping transistors Q are the same in size and type, and the temperature deviation and the process deviation are synchronous, and the offset amounts are mutually offset, so that the clamping transistors Q are not influenced CT Final output clamp voltage V C Causing an impact; wherein the first resistor R 1 And the third resistor R 3 Same, second resistance R 2 Resistance value of (1) andfour resistors R 4 In the same manner, and in the voltage-stabilizing triode Q 1 And compensation triode Q 2 On the premise of no work, the voltage signals input by the inverting input end and the inverting input end of the operational amplifier OP AMP can be kept in a consistent state all the time. Moreover, in other embodiments, the temperature compensation circuit 300 is not limited to include one compensation transistor Q 2 It may also include a plurality of compensating transistors Q 2 E.g. comprising n compensating transistors Q 2 At this time, the number ratio between the bipolar transistor included in the voltage stabilizing circuit 200 and the bipolar transistor included in the temperature compensating circuit 300 is 1: n; wherein n is a positive integer greater than 1, and the types and sizes of the bipolar transistors included in the voltage regulator circuit 200 and the temperature compensation circuit 300 may be the same.
It should be understood that the above embodiments are merely preferred implementations of the embodiments of the present application, and are not the only limitations on the specific configurations of the voltage stabilizing circuit 200, the temperature compensating circuit 300 and the feedback circuit 100; in this regard, a person skilled in the art can flexibly set the setting according to the actual application scenario on the basis of the embodiment of the present application.
It should be noted that, in the present disclosure, each embodiment is described in a progressive manner, and each embodiment focuses on differences from other embodiments, and portions that are the same as and similar to each other in each embodiment may be referred to.
It is further noted that, within the context of this application, relational terms such as first and second, and the like, may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrases "comprising one of 8230; \8230;" 8230; "does not exclude the presence of additional like elements in a process, method, article, or apparatus that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present disclosure. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the disclosure. Thus, the present disclosure is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (10)
1. A clamp circuit insensitive to temperature change is characterized by comprising a feedback circuit, a voltage stabilizing circuit, a temperature compensating circuit, an operational amplifier and a clamp transistor; the voltage stabilizing circuit is connected to the non-inverting input end of the operational amplifier, the feedback circuit is connected to the inverting input end of the operational amplifier, the temperature compensating circuit is connected to the voltage stabilizing circuit and the inverting input end of the operational amplifier, and the output end of the operational amplifier is connected to the clamping transistor;
the feedback circuit is used for outputting a feedback voltage;
the voltage stabilizing circuit is used for outputting an initial reference voltage with a negative temperature coefficient;
the temperature compensation circuit is used for carrying out positive temperature coefficient compensation on the initial reference voltage to obtain a target reference voltage; wherein the positive and negative temperature coefficients of the target reference voltage are balanced;
the operational amplifier is used for comparing the feedback voltage with the target reference voltage and outputting a control signal to the clamping transistor according to a comparison result so as to control the clamping voltage output by the clamping transistor to be within a preset voltage range.
2. The clamping circuit insensitive to temperature variation of claim 1, wherein the regulation circuit includes a first resistor, a second resistor and a regulation transistor; the base of the voltage-stabilizing triode is connected with the temperature compensation circuit, the first resistor is connected with the second resistor in series, a contact point between the first resistor and the second resistor and the collector of the voltage-stabilizing triode are respectively connected with the non-inverting input end of the operational amplifier, and the base of the voltage-stabilizing triode and the collector are connected with each other; the initial reference voltage is a base-emitter voltage of the voltage-stabilizing triode, and the base-emitter voltage is a voltage between a base and an emitter.
3. The clamping circuit insensitive to temperature variation of claim 2, wherein the temperature compensation circuit includes a compensation transistor and a compensation resistor; the base level of the compensation triode is connected to the base level of the voltage-stabilizing triode, the collector electrode of the compensation triode is connected to the reverse input end of the operational amplifier, and the emitter electrode of the compensation triode is connected to the compensation resistor.
4. The clamping circuit insensitive to temperature variation of claim 3, wherein the feedback circuit includes a third resistor and a fourth resistor; the third resistor is connected with the fourth resistor in series, and a joint point between the third resistor and the fourth resistor is connected with an inverting input end of the operational amplifier; wherein the feedback voltage is a voltage at a junction between the third resistor and the fourth resistor.
5. The clamping circuit insensitive to temperature variation of claim 4, wherein the difference between the base-emitter voltage of the regulation transistor and the base-emitter voltage of the compensation transistor is represented by a first formula as follows:
ΔV BE ＝V T ln(n)；
wherein, Δ V BE Express the stabilityA difference, V, between a base-emitter voltage of the voltage transistor and a base-emitter voltage of the compensation transistor T Represents the thermal voltage between the regulator transistor and the compensation transistor, and n represents the ratio of the current density between the regulator transistor and the compensation transistor.
6. The clamping circuit insensitive to temperature variation of claim 5, wherein the clamping voltage is represented by a second equation:
wherein, V C Represents the clamping voltage, V BE Representing the base-emitter voltage, R, of said voltage-stabilizing transistor E Represents the compensation resistance, R 3 Represents the third resistance, R 4 Representing the fourth resistance.
7. The clamping circuit insensitive to temperature variation according to claim 4, wherein the first resistor, the second resistor, the compensation resistor, the third resistor and the fourth resistor are all the same in size and type, and the first resistor has the same resistance as the third resistor and the second resistor has the same resistance as the fourth resistor.
8. The temperature change insensitive clamping circuit according to claim 4, wherein the regulation transistor and the compensation transistor are NPN transistors.
9. The clamp circuit insensitive to temperature variation of any of claims 1-8, wherein the clamp transistor is a PMOS transistor.
10. An electronic device comprising a circuit board on which the clamping circuit insensitive to temperature variations as claimed in any one of claims 1 to 9 is integrated.
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| CN202221111497.0U CN217902333U (en) | 2022-05-10 | 2022-05-10 | Clamping circuit insensitive to temperature change and electronic equipment |
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| CN202221111497.0U CN217902333U (en) | 2022-05-10 | 2022-05-10 | Clamping circuit insensitive to temperature change and electronic equipment |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116088631A (en) * | 2023-04-11 | 2023-05-09 | 长鑫存储技术有限公司 | Power supply circuit and memory |
| CN117439593A (en) * | 2023-12-21 | 2024-01-23 | 晶艺半导体有限公司 | Clamping circuit, analog optocoupler circuit and isolation driving circuit |
-
2022
- 2022-05-10 CN CN202221111497.0U patent/CN217902333U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116088631A (en) * | 2023-04-11 | 2023-05-09 | 长鑫存储技术有限公司 | Power supply circuit and memory |
| CN117439593A (en) * | 2023-12-21 | 2024-01-23 | 晶艺半导体有限公司 | Clamping circuit, analog optocoupler circuit and isolation driving circuit |
| CN117439593B (en) * | 2023-12-21 | 2024-03-01 | 晶艺半导体有限公司 | Clamping circuit, analog optocoupler circuit and isolation driving circuit |
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