CN217902293U - Power supply sequential control circuit with rapid discharge function - Google Patents

Power supply sequential control circuit with rapid discharge function Download PDF

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Publication number
CN217902293U
CN217902293U CN202222049905.0U CN202222049905U CN217902293U CN 217902293 U CN217902293 U CN 217902293U CN 202222049905 U CN202222049905 U CN 202222049905U CN 217902293 U CN217902293 U CN 217902293U
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power supply
power
vcc
control circuit
resistance
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蔡舒宏
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Nanjing Xinning Optoelectronic Technology Co ltd
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Nanjing Xinning Optoelectronic Technology Co ltd
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Abstract

The utility model provides a power supply sequential control circuit with function of releasing fast. The power supply timing control circuit with the rapid bleeding function comprises: the power supply timing control circuit comprises a power supply timing control chip U1, a power supply conversion chip U2, a switch SW1 and a quick release module U3; the power supply time sequence control chip U1 comprises a power supply positive electrode interface VCC, a pin EN, a first power supply negative electrode interface GND, flag1 and Flag2; flag1 is connected with switch SW1, one of switch SW1 serves and is connected with switch output VCC _ OUT, power positive pole interface VCC is connected with resistance R1, one of resistance R1 serves and is connected with input power VCC _ IN. The utility model provides a power supply sequential control circuit with function of releasing fast has the function of releasing fast and energy-conservation to save the cost, reduced the advantage of complexity.

Description

Power supply sequential control circuit with rapid discharge function
Technical Field
The utility model belongs to the technical field of power supply time sequence control circuit, especially, relate to a power supply time sequence control circuit with function of releasing fast.
Background
Following a specific power-on sequence and a power-off sequence is one of the principles that an electric product needs to ensure, so that the product can normally and reliably operate. Based on the power supply time sequence control chip, such as LM3880 of TI (TEXAS INSTRUMENTENTS), threshold voltage can be set through an external voltage dividing resistor and used for tracking the change of an input power supply, and according to the change, flag1 and flag2 are output and used for controlling the on or off of the power supply conversion chip. According to the type selection, the flag1 outputs an enable signal before the flag2 to drive the output voltage of the power conversion chip of the lower hanging power supply when the power is on, and the flag1 lags behind the flag2 to turn off the enable signal when the power is off so as to turn off the power conversion chip of the lower hanging power supply;
the electronic device is usually powered by a voltage VCC _ IN provided by an externally connected power adapter, and then VDD is generated by a power conversion chip and provided for a small system. However, for timing requirements where VDD is powered down before VCC _ IN, it is difficult for the power supply to be VCC _ IN. IN the prior art, a power supply conversion chip is added after a power supply time sequence control chip except for a VDD power supply conversion chip required for hanging down, voltage such as VCC _ IN is output to VCC _ OUT, and the power supply conversion chip is controlled to be turned on or turned off through the output of the power supply time sequence control chip. In addition, the time delay between the EN effective/ineffective state and the output of the flag1/flag2 and between the flag1 and the flag2 of the power supply time sequence control chip is limited, and especially when the VDD needs a capacitor with a large capacitance value for filtering and stabilizing, the power failure is very slow, and the power supply time sequence control chip is difficult to meet the requirements.
Therefore, it is necessary to provide a new power timing control circuit with a fast bleeding function to solve the above technical problems.
SUMMERY OF THE UTILITY MODEL
The utility model provides a technical problem provide a power supply sequential control circuit with function of bleeding fast with energy-conserving to save the cost, reduced the complexity.
In order to solve the technical problem, the utility model provides a power supply sequential control circuit with function of releasing fast includes: the power supply timing control circuit comprises a power supply timing control chip U1, a power supply conversion chip U2, a switch SW1 and a quick release module U3;
the power supply time sequence control chip U1 comprises a power supply positive electrode interface VCC, a pin EN, a first power supply negative electrode interface GND, flag1 and Flag2;
flag1 is connected with switch SW1, one of switch SW1 serves and is connected with switch output VCC _ OUT, power positive pole interface VCC is connected with resistance R1, one of resistance R1 serves and is connected with input power VCC _ IN, be connected with resistance R2 on resistance R1's the other end, one of resistance R2 serves and is connected with first power negative input port GND.
As a further aspect of the utility model, first power negative pole interface GND is connected with resistance R2, pin EN is connected with resistance R1 and resistance R2.
As a further aspect of the present invention, input power VCC _ IN is connected to switch SW1, flag1 is connected to third resistor R3, resistor R3's one end is connected to input power VCC _ IN.
As a further proposal of the utility model, the power conversion chip U2 is including output voltage port VDD _ EN, output voltage port VDD _ EN and Flag2 are connected through the wire, be connected with voltage port VDD on the power conversion chip U2.
As a further scheme of the utility model, fast bleed module U3 is including interface VDD, second power negative pole interface GND and enable end DG _ ENb, enable end DG _ ENb's one end and wire are connected, be connected with resistance R4 on the wire, resistance R4's one end and input power source VCC _ IN are connected.
As a further aspect of the utility model, interface VDD is connected with voltage port VDD, be connected with second power negative pole interface GND on the second power negative pole interface GND.
Compared with the prior art, the utility model provides a power supply sequential control circuit with function of releasing fast has following beneficial effect:
1. compared with the scheme that 2 power supply conversion chips are hung below a power supply time sequence control chip, the utility model replaces one power supply chip with SW1 to achieve the same purpose, but saves the design cost and reduces the design complexity;
2. the utility model discloses have the function of releasing fast, solve under the condition that has the capacitive load, fall the problem that the electricity is slow, power sequential control chip can't satisfy the demand, and the function of releasing fast only starts when falling the electricity, does not start during normal power supply, does not produce extra consumption.
Drawings
In order to facilitate understanding for those skilled in the art, the present invention will be further described with reference to the accompanying drawings.
Fig. 1 is a circuit block diagram of the present invention;
fig. 2 is a timing diagram of power-up of the present invention;
fig. 3 is the utility model discloses a fall the electric time chart.
Detailed Description
Please refer to fig. 1, fig. 2 and fig. 3 in combination, wherein fig. 1 is a circuit block diagram of the present invention; fig. 2 is a timing diagram of power-up of the present invention; fig. 3 is the utility model discloses a fall the electric time chart. The power supply timing control circuit with the quick discharge function comprises: the power supply timing control circuit comprises a power supply timing control chip U1, a power supply conversion chip U2, a switch SW1 and a quick release module U3;
the power supply time sequence control chip U1 comprises a power supply positive electrode interface VCC, a pin EN, a first power supply negative electrode interface GND, flag1 and Flag2;
flag1 is connected with switch SW1, one of switch SW1 serves and is connected with switch output VCC _ OUT, power positive pole interface VCC is connected with resistance R1, one of resistance R1 serves and is connected with input power VCC _ IN, be connected with resistance R2 on resistance R1's the other end, one of resistance R2 serves and is connected with first power negative input port GND.
First power negative pole interface GND is connected with resistance R2, pin EN is connected with resistance R1 and resistance R2.
The input power supply VCC _ IN is connected with the switch SW1, the Flag1 is connected with the third resistor R3, and one end of the resistor R3 is connected with the input power supply VCC _ IN.
The power conversion chip U2 comprises an output voltage port VDD _ EN, the output voltage port VDD _ EN is connected with Flag2 through a lead, and the power conversion chip U2 is connected with a voltage port VDD.
The fast bleeder module U3 comprises an interface VDD, a second power supply negative electrode interface GND and an enabling end DG _ ENb, one end of the enabling end DG _ ENb is connected with a wire, a resistor R4 is connected onto the wire, and one end of the resistor R4 is connected with an input power supply VCC _ IN.
The interface VDD is connected with a voltage port VDD, and a second power supply negative input port GND is connected to the second power supply negative electrode interface GND.
The utility model provides a power time sequence control circuit with function of releasing fast's theory of operation as follows:
the first step is as follows: after the power adapter inputs a power through VCC _ IN, the power timing control chip U1 determines whether the chip works according to the voltage of an enable pin EN, namely when the power-on reaches a threshold voltage, a flag1 effective signal is output firstly, a switch SW1 is turned on, VCC _ IN outputs VCC _ OUT through the switch, a flag2 always outputs an invalid signal at this stage, the power conversion chip U2 is not enabled and not output, but is an enable signal for a fast release module U3, a release path is opened, a voltage port VDD rapidly discharges to a second power negative input port GND through U3, after a delay time is set after the flag1 outputs the effective signal, the flag2 effective signal is output by the power conversion chip U2 and enables the power conversion chip U2 to output a VDD voltage, the flag2 effective signal is a non-enable signal for the fast release module U3, the fast release module U3 does not work, namely, the voltage port VDD and the release path are IN a disconnected state.
When the voltage of an EN pin of a power supply time sequence control chip U1 is lower than a threshold voltage after power failure, firstly outputting a flag2 invalid signal to close an output voltage VDD of a power supply conversion chip U2, but the flag2 invalid signal is an enabling signal for a fast release module U3, starting a fast release path, quickly releasing the voltage to GND through a voltage port VDD by the voltage port VDD through the module, delaying a certain time after the flag2 outputs the invalid signal, outputting a flag1 invalid signal, closing a switch SW1, disconnecting VCC _ OUT from VCC _ IN, and starting power failure of VCC _ OUT;
in conclusion, the function that VCC _ OUT is prior to VDD during power-on and VDD is prior to VCC _ OUT during power-down is quickly powered down is realized;
the second step is as follows: the power adapter is adopted to provide 5V input voltage, the VCC _ IN port is connected, the power supply time sequence control chip U1 uses LM3880 of TI, the power supply conversion module U2 uses MP3429GL-Z test board of MPS, the output end, namely the voltage port VDD is 12V, 22uF electrolytic capacitor is arranged on GND, the setting or material selection can be specifically carried out according to the actual condition of the system,
the power-on time sequence is shown IN fig. 2, after VCC _ IN reaches the EN pin threshold level of U1, U1 starts to work, a flag1 effective signal is output firstly after about 10ms, SW1 is driven to be opened, VCC _ OUT is output, flag2 is an invalid signal all the time at this stage, but the bleeding module U3 is driven to be opened, VDD discharges to a negative input port GND of a second power supply through the module, the flag1 delays for 10ms after being effective, the flag2 effective signal is output, VDD is enabled to be output by U2, the bleeding module U3 is turned off by flag2 at this moment, namely, the bleeding path of VDD is cut off, and VDD can normally output voltage for a small system.
The power-down sequence is shown IN fig. 3, after VCC _ IN is reduced to the EN pin threshold level of U1, U1 stops working, after about 10ms, a flag2 invalid signal is output first, the output of a U2 power supply is closed, a release module U3 is enabled, VDD starts to be powered down and rapidly releases electric quantity to a second power supply negative input port GND through the release module U3, after the flag2 outputs the invalid signal, delay is about 10ms, SW1 is closed, namely, the connection between VCC _ IN and VCC _ OUT is disconnected, VCC _ OUT discharges gradually, and therefore VDD lags VCC _ OUT is powered down.
It should be noted that the device structure and the accompanying drawings of the present invention mainly describe the principle of the present invention, and in the technology of the design principle, the settings of the power supply system and the control system are not completely described, and on the premise that the skilled person understands the principle of the present invention, the details of the power mechanism, the power supply system and the control system can be clearly known, the control mode of the application file is automatically controlled by the controller, and the control circuit of the controller can be realized by simple programming of the skilled person in the art;
although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and alterations can be made herein without departing from the principles and spirit of the invention, and it is intended that in other related fields of technology, the scope of the invention be limited only by the claims and their equivalents, all of which are intended to be covered by the scope of this invention.

Claims (6)

1. A power supply timing control circuit with a fast bleeding function, comprising:
the power supply timing control circuit comprises a power supply timing control chip U1, a power supply conversion chip U2, a switch SW1 and a quick release module U3;
the power supply time sequence control chip U1 comprises a power supply positive electrode interface VCC, a pin EN, a first power supply negative electrode interface GND, flag1 and Flag2;
flag1 is connected with switch SW1, one of switch SW1 serves and is connected with switch output VCC _ OUT, power positive pole interface VCC is connected with resistance R1, one of resistance R1 serves and is connected with input power VCC _ IN, be connected with resistance R2 on resistance R1's the other end, one of resistance R2 serves and is connected with first power negative input port GND.
2. The power timing control circuit with a fast bleeding function of claim 1, wherein: first power negative pole interface GND is connected with resistance R2, pin EN is connected with resistance R1 and resistance R2.
3. The power timing control circuit with a fast bleed-off function of claim 1, wherein: the input power supply VCC _ IN is connected with the switch SW1, the Flag1 is connected with the third resistor R3, and one end of the resistor R3 is connected with the input power supply VCC _ IN.
4. The power timing control circuit with a fast bleeding function of claim 1, wherein: the power conversion chip U2 comprises an output voltage port VDD _ EN, the output voltage port VDD _ EN is connected with Flag2 through a lead, and the power conversion chip U2 is connected with a voltage port VDD.
5. The power timing control circuit with a fast bleeding function of claim 4, wherein: the fast bleeder module U3 comprises an interface VDD, a second power supply negative electrode interface GND and an enabling end DG _ ENb, one end of the enabling end DG _ ENb is connected with a wire, a resistor R4 is connected onto the wire, and one end of the resistor R4 is connected with an input power supply VCC _ IN.
6. The power timing control circuit with a fast bleeding function of claim 5, wherein: the interface VDD is connected with a voltage port VDD, and a second power supply negative input port GND is connected to the second power supply negative electrode interface GND.
CN202222049905.0U 2022-08-04 2022-08-04 Power supply sequential control circuit with rapid discharge function Active CN217902293U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202222049905.0U CN217902293U (en) 2022-08-04 2022-08-04 Power supply sequential control circuit with rapid discharge function

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202222049905.0U CN217902293U (en) 2022-08-04 2022-08-04 Power supply sequential control circuit with rapid discharge function

Publications (1)

Publication Number Publication Date
CN217902293U true CN217902293U (en) 2022-11-25

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202222049905.0U Active CN217902293U (en) 2022-08-04 2022-08-04 Power supply sequential control circuit with rapid discharge function

Country Status (1)

Country Link
CN (1) CN217902293U (en)

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