CN217718457U

CN217718457U - Multi-type sensor information acquisition general circuit based on FPGA

Info

Publication number: CN217718457U
Application number: CN202122949230.0U
Authority: CN
Inventors: 刘恒立; 李鹏琦; 韩文斌; 李鹏飞
Original assignee: Luoyang Institute of Electro Optical Equipment AVIC
Current assignee: Luoyang Institute of Electro Optical Equipment AVIC
Priority date: 2021-11-29
Filing date: 2021-11-29
Publication date: 2022-11-01
Anticipated expiration: 2031-11-29

Abstract

The invention provides a multi-type sensor information acquisition universal circuit based on an FPGA (field programmable gate array). A serial communication unit is communicated with an FPGA processing unit through a data interface, the FPGA processing unit is connected with a CPU (central processing unit) or a DSP (digital signal processor) through a bus, and data transmission is carried out between the FPGA processing unit and a sensor signal processing unit to obtain data information of a sensor. The present invention incorporates the interfacing, conditioning and acquisition circuitry of many common types of sensors. The FPGA has strong concurrent processing capability, high integration level and strong flexibility, and can complete complex functions and tasks of time sequence and combinational logic. The multi-channel sensor information can be processed in parallel through FPGA design, and resource consumption caused by acquisition of the sensor information by application layer software is effectively reduced. The method is beneficial to improving the data processing efficiency of the application layer software to the control system, reducing the execution interval of the control instruction and improving the control effect.

Description

Multi-type sensor information acquisition general circuit based on FPGA

Technical Field

The invention relates to the field of circuits, in particular to a sensor information acquisition circuit.

Background

The photoelectric detection equipment is a complex body relating to the technologies in the fields of light, electricity and the like, and a temperature compensation focusing circuit contained in the photoelectric detection equipment is an important cross function circuit relating to optical parameter adjustment, optical mechanical structure motion control and servo motor drive. The multi-type sensor information acquisition is an important functional component, can acquire sensor data in time, reduces data delay, fuses the data of the multiple sensors for subsequent application layer software, provides latest input data of control instructions, and has important value for improving the control accuracy of the optical machine of the temperature compensation focusing part.

The temperature compensation focusing circuit is an important component of a photoelectric detection device product assembly, and various sensors of different types and different interfaces need to be matched according to different overall scheme designs. A plurality of sensors are involved in the working process of a certain type of current product, and the sensors comprise a temperature sensor, a humidity sensor, a pressure/differential pressure sensor, a linear displacement sensor, a proximity switch, an incremental encoder, a multi-ring coded disc and the like. In a DSP + CPLD processing unit architecture, the CPLD is limited by the limited resources of the CPLD, the CPLD only provides partial simple interface functions, in the design process of a sensor acquisition circuit, richer sensor acquisition interfaces are difficult to realize, and the sensor information acquisition task is mainly completed by the DSP, so that the repeated work of acquiring sensor data by the DSP consumes a large amount of time and computing resources, but the acquisition rate and the acquisition efficiency are still low. The DSP + CPLD processing unit architecture cannot meet the requirements of the current system information processing function.

Disclosure of Invention

In order to overcome the defects of the prior art, the invention provides the multi-type sensor information acquisition general circuit based on the FPGA, so that the timeliness and effectiveness of sensor data acquisition are ensured, the control accuracy of a control system is favorably improved, and the multi-type sensor information acquisition general circuit has a wide application prospect.

The technical scheme adopted by the invention for solving the technical problems is as follows:

the utility model provides a polymorphic type sensor information acquisition universal circuit based on FPGA, includes power conversion unit, FPGA processing unit, sensor signal processing unit and serial communication unit, and the serial communication unit communicates with FPGA processing unit through data interface, and FPGA processing unit passes through bus connection CPU or DSP, carries out data transmission between FPGA processing unit and the sensor signal processing unit, obtains the data information of sensor.

The input of the power supply conversion unit adopts +28V power supply input, the output is +/-15V, +5V, +3.3V, +2.5V, +1.8V, +1.2V, and various power supply conversions are completed on the board card circuit.

The FPGA processing unit adopts a domestic 4V series FPGA chip.

The sensor signal processing unit comprises an analog sensor signal processing unit and a digital sensor signal processing unit, wherein a temperature sensor, a pressure sensor and an LVDT linear displacement sensor provide analog quantity signals for the analog sensor signal processing unit, and a proximity switch, an ABZ incremental motor encoder, an SSI interface code disc and a serial communication interface sensor provide data information of the sensor for the digital sensor signal processing unit; in the analog sensor signal processing unit, a signal output by a sensor is subjected to isolation, attenuation, amplification and filtering by a signal conditioning circuit to be used as the input of an analog/digital converter, and then the signal subjected to analog-to-digital conversion is transmitted to an FPGA; the digital sensor signal processing unit adopts different circuits for preprocessing according to different types of digital sensors, uses an optical coupling isolation circuit to isolate a proximity switch signal, and converts the proximity switch signal into an FPGA (field programmable gate array) through level after optical coupling isolation; using a differential driving circuit and a differential receiving circuit to receive and transmit differential signals of an SSI interface code disc and an ABZ incremental motor encoder, and converting the SSI interface code disc signals into an FPGA (field programmable gate array) through a transceiver and then through level conversion; a bus driving circuit is used for carrying out level conversion on a +5V/0V signal interface of the sensor and a +3.3V/0VI/O interface of the FPGA, the bus driving circuit is used as a level conversion circuit and is a common level conversion circuit between a plurality of sensors and the FPGA, and then the FPGA reads data information of the sensors according to timing sequence requirements and communication protocols of the sensors and related circuits.

The serial communication unit is communicated with a serial communication interface sensor or a system master control through the serial communication unit, the serial communication unit comprises a serial communication controller, a differential receiver and a differential driver, the serial communication controller is connected with the FPGA for communication, the serial communication controller is respectively connected with the differential receiver and the differential driver, the serial communication controller is connected with an external communication object through the differential driver, the external communication object feeds back received signals to the serial communication controller through the differential receiver, the serial communication controller is communicated with the FPGA, and the serial communication controller is matched with the FPGA to complete a serial communication function.

In the analog sensor signal processing unit, signals acquired by the LVDT linear displacement sensor enter the LVDT signal adjusting circuit for adjustment, then enter the analog/digital converter for analog-to-digital conversion, and the converted signals are driven by the bus driver and are subjected to data transmission through the I/O and the FPGA.

The invention has the beneficial effect of providing the multi-type sensor information acquisition general circuit based on the FPGA, which comprises interfaces, conditioning and acquisition circuits of various sensors in common use. The FPGA has strong concurrent processing capability, high integration level and strong flexibility, and can complete complex functions and tasks of time sequence and combinational logic. The multi-channel sensor information can be processed in parallel through FPGA design, and resource consumption caused by acquisition of the sensor information by application layer software is effectively reduced. The method is beneficial to improving the data processing efficiency of the application layer software to the control system, reducing the execution interval of the control instruction and improving the control effect.

Drawings

FIG. 1 is a block diagram of a general circuit architecture for multi-type sensor information acquisition based on FPGA according to the present invention.

FIG. 2 is a block diagram of a serial communications hardware unit architecture according to the present invention.

Fig. 3 is a block diagram of the hardware unit architecture of the LVDT linear displacement sensor according to the present invention.

Detailed Description

The invention is further illustrated with reference to the following figures and examples.

In order to make the technical scheme and advantages of the circuit more clear, the general acquisition circuit is described in detail below with reference to fig. 1, fig. 2, and fig. 3.

The universal acquisition circuit consists of a power supply conversion unit, an FPGA processing unit, a sensor signal processing unit and a serial communication unit. The modular composition can guarantee that the acquisition circuit has good expansibility, and can be correspondingly cut and further enriched according to specific technical requirements.

The utility model provides a polymorphic type sensor information acquisition universal circuit based on FPGA, contains the processing and the acquisition circuit of multiple sensor of multiple different grade type and different interface, can realize the data acquisition to multiple sensor, includes temperature sensor, humidity transducer, pressure \ differential sensor, linear displacement sensor, proximity switch, incremental encoder, many rings of code discs etc.. The temperature sensor comprises a digital temperature sensor and an analog temperature sensor, and the communication interface of the digital temperature sensor comprises an ABX interface, an SSI interface, a single bus interface, a 422 interface and the like. Therefore, the universal acquisition circuit can realize the data acquisition function of various sensors commonly used.

The examples are as follows:

a multi-type sensor information acquisition general circuit based on FPGA is disclosed, the hardware architecture of the multi-type sensor general acquisition circuit based on FPGA is shown in figure 1, and the multi-type sensor general acquisition general circuit comprises a power supply conversion unit, an FPGA processing unit, a sensor signal processing unit and a serial communication unit, wherein the serial communication unit is communicated with the FPGA processing unit through I/O, the FPGA processing unit is connected with a CPU or a DSP through a bus, data transmission is carried out between the FPGA processing unit and the sensor signal processing unit to obtain data information of a sensor, and the power supply conversion unit provides required voltage for the FPGA processing unit, the sensor signal processing unit and the serial communication unit.

The input of the power supply conversion unit is +28V, the output is +/-15V, +5V, +3.3V, +2.5V, +1.8V, +1.2V, and various power supply outputs are completed on the board card circuit, so that the situation that the board card cannot normally work due to power supply voltage drop in the process of wire transmission of a low-voltage circuit can be effectively avoided, the anti-interference performance of a product is facilitated, and the reliability is improved.

The FPGA processing unit adopts a domestic 4V series FGPA chip for data processing and analysis, has strong parallel processing capability and rich interface resources, has the characteristics of high speed and high precision, and can meet the functional requirements of information acquisition of various sensors.

The sensor signal processing unit comprises an analog sensor signal processing unit and a digital sensor signal processing unit, wherein the humidity sensor, the pressure sensor and the LVDT linear displacement sensor provide analog quantity signals for the analog sensor signal processing unit, and the proximity switch, the ABZ incremental motor encoder, the SSI interface code disc and the serial communication interface sensor provide data information of the sensors for the digital sensor signal processing unit; in the analog sensor signal processing unit, a signal output by a sensor is isolated, attenuated, amplified and filtered by a signal conditioning circuit to enable the signal to be suitable for the input of an analog/digital converter (A/D), and then the converted signal is transmitted to an FPGA; digital signal transmission of the digital quantity signal conditioning and converting circuit; in the digital sensor signal processing unit, aiming at different types of digital sensors, the digital sensor signal processing unit comprises an optical coupling isolation circuit, a differential sending drive circuit, a differential receiving circuit and a bus drive circuit, and data information of the sensors is read by an FPGA according to time sequence requirements and communication protocols of the sensors and related circuits.

And the serial communication unit is communicated with the serial communication interface sensor or the system master control through the serial communication unit.

The serial communication hardware unit is configured as shown in fig. 2, the serial communication unit comprises a serial communication controller, a differential receiver and a differential driver, the serial communication controller is connected with the FPGA for communication, the serial communication controller is connected with the differential receiver and the differential driver, the serial communication controller is connected with an external communication object through the differential driver, the external communication object feeds back a received signal to the serial communication controller through the differential receiver, and the serial communication controller is communicated with the FPGA; the serial communication controller is matched with the FPGA to complete a serial communication function, the baud rate, the data bit length, the stop bit length and the check type software can be adjusted, and at most 4 paths of communication interfaces can be supported. In the part, the FPGA cooperates with a CPU to execute the initialization execution of a serial communication control chip according to the time sequence requirement of a serial communication controller, configures an external clock frequency, a baud rate generator and serial characteristics (data bit number, odd, even or even no generation and detection of parity check bits and stop bit number), interrupts system control by complete priority and has modem control function; storing data received by the serial communication data in an appointed address register so that the CPU can read the data according to receiving interruption; and the data which needs to be sent by the CPU is transmitted to the serial communication controller according to the time sequence requirement, thereby effectively avoiding the CPU from executing repeated time sequence instructions and effectively simplifying the complexity of the program of the CPU for completing the communication task.

A hardware unit block diagram of the LVDT linear displacement sensor is configured as shown in fig. 3, in the analog sensor signal processing unit, a signal acquired by the LVDT linear displacement sensor enters the LVDT signal conditioning circuit for conditioning, then enters the analog/digital converter for analog-to-digital conversion, and the converted signal is driven by the bus driver and is subjected to data transmission by the I/O and the FPGA; the LVDT linear displacement sensor is taken as a representative of an analog sensor processing circuit for explanation, according to the requirements of the sensor, the processing circuit changes the collectable signals of the analog sensor into voltage signals, the voltage signals are collected through an A/D (analog/digital conversion) circuit, and the collection precision of the sensor signals is ensured through the high-precision A/D equipment with adjustable collection range and the high-precision reference voltage source.

The FPGA control A/D conversion process comprises the following steps: the FPGA is used for controlling the A/D conversion, the digital acquisition of the analog sensor signals is realized, the control time sequence requirement of an A/D conversion chip can be met by utilizing the characteristic of high time precision of the FPGA, the consumption of more time resources and calculation resources for directly controlling the A/D through application layer software is avoided, and the random access of the application layer software to the analog sensor data is ensured.

The flow of the FPGA controlling the digital temperature sensor 18B20 is as follows: in the digital sensor processing unit, the digital sensors are divided into two types, namely, a non-transmitting type sensor (differential signals and single-end signals need to be further distinguished), such as an ABZ interface incremental encoder and a proximity switch; and a transceiver type sensor, such as an 18B20 single-bus digital temperature sensor, an SSI interface code disc, and the like. The 18B20 single bus digital temperature sensor signal acquisition is described herein as an example. The 18B20 digital temperature sensor is a single bus device, provides 12-bit temperature measurement resolution, and the microcontroller communicates with the device through a single bus interface. The device avoids the characteristic that the analog temperature sensor is easily interfered, but the acquisition time sequence is more complex and the accuracy of the acquisition time sequence is higher. And each sensor occupies a 3.3V or 5V bidirectional IO port. The characteristics of abundant acquisition interfaces and accurate execution time sequence of the FPGA can be utilized, and the FPGA circuit is used for acquiring the multi-path sensor in real time.

Claims

1. The utility model provides a polymorphic type sensor information acquisition universal circuit based on FPGA, includes power conversion unit, FPGA processing unit, sensor signal processing unit and serial communication unit, its characterized in that:

according to the multi-type sensor information acquisition general circuit based on the FPGA processing unit, the serial communication unit is communicated with the FPGA processing unit through the data interface, the FPGA processing unit is connected with the CPU or the DSP through the bus, and data transmission is carried out between the FPGA processing unit and the sensor signal processing unit to obtain data information of the sensor.

2. The FPGA-based multi-type sensor information acquisition generic circuit of claim 1, wherein:

3. The FPGA-based multi-type sensor information acquisition generic circuit of claim 1, wherein:

the FPGA processing unit adopts a domestic 4V series FGPA chip.

4. The FPGA-based multi-type sensor information acquisition generic circuit of claim 1, wherein:

the sensor signal processing unit comprises an analog sensor signal processing unit and a digital sensor signal processing unit, wherein the temperature sensor, the pressure sensor and the LVDT linear displacement sensor provide analog quantity signals for the analog sensor signal processing unit, and the proximity switch, the ABZ incremental motor encoder, the SSI interface code disc and the serial communication interface sensor provide data information of the sensors for the digital sensor signal processing unit; in the analog sensor signal processing unit, a signal output by a sensor is subjected to isolation, attenuation, amplification and filtering by a signal conditioning circuit to be used as the input of an analog/digital converter, and then the signal subjected to analog-to-digital conversion is transmitted to an FPGA; the digital sensor signal processing unit adopts different circuits for preprocessing according to different types of digital sensors, uses an optical coupling isolation circuit to isolate a proximity switch signal, and converts the proximity switch signal into an FPGA (field programmable gate array) through level after optical coupling isolation; using a differential driving circuit and a differential receiving circuit to receive and transmit differential signals of an SSI interface code disc and an ABZ incremental motor encoder, and converting the SSI interface code disc signals into FPGA (field programmable gate array) signals through a transceiver and then through level conversion; the bus driving circuit is used for carrying out level conversion on a +5V/0V signal interface of the sensor and a +3.3V/0V I/O interface of the FPGA, the bus driving circuit is used as a level conversion circuit and is a common level conversion circuit between a plurality of sensors and the FPGA, and then the FPGA reads data information of the sensors according to timing sequence requirements and communication protocols of the sensors and related circuits.

5. The FPGA-based multi-type sensor information acquisition generic circuit of claim 1, wherein:

the serial communication unit is communicated with a serial communication interface sensor or a system main control through a serial communication unit, the serial communication unit comprises a serial communication controller, a differential receiver and a differential driver, the serial communication controller is connected with the FPGA for communication, the serial communication controller is respectively connected with the differential receiver and the differential driver, the serial communication controller is connected with an external communication object through the differential driver, the external communication object feeds back received signals to the serial communication controller through the differential receiver, the serial communication controller is communicated with the FPGA, and the serial communication controller is matched with the FPGA to complete a serial communication function.

6. The FPGA-based multi-type sensor information acquisition generic circuit of claim 4, wherein:

in the analog sensor signal processing unit, signals collected by the LVDT linear displacement sensor enter the LVDT signal regulating circuit for regulation, then enter the analog/digital converter for analog-to-digital conversion, and the converted signals are driven by the bus driver and are subjected to data transmission by the I/O and the FPGA.