CN217691140U - Flip-chip gallium nitride power device capable of improving heat dissipation performance - Google Patents

Abstract

The utility model relates to a flip-chip gallium nitride power device for improving heat dissipation performance, which comprises a chip, a PCB and a substrate, wherein the chip is fixed on the PCB through a solder ball, and the substrate is fixed on the PCB; the chip and the substrate are electrically connected through at least one solder ball; a heat dissipation layer is arranged on the substrate of the chip and is connected with the source electrode of the chip through a metal column. The utility model discloses can realize dispelling the heat fast effectively.

Description

Flip-chip gallium nitride power device capable of improving heat dissipation performance

Technical Field

The utility model belongs to the technical field of the electron device technique and specifically relates to indicate a flip-chip gallium nitride power device who promotes heat dispersion.

Background

With the continuous development of electronic technology, the heating power consumption of a high-power device is larger and larger, the heat flux density is increased along with the reduction of the size of a chip, and the requirement on heat dissipation is higher. The device can normally work within a safe working temperature range, and when the junction temperature exceeds the safe working temperature, the thermal failure of the chip can be caused; on the other hand, due to the difference of the expansion coefficients of the materials in the device, the excessive junction temperature can cause the increase of thermal stress in the chip, and further cause mechanical damages such as the bending of the welding materials in the chip, the falling of the bonding wires and the like. The higher the working temperature of the device is, the shorter the life cycle of the device is, and the heat dissipation design of the device has a crucial influence on the reliability of the product.

As shown in fig. 1, the conventional flip-chip gan power device includes a chip 1, a PCB 2 and a substrate 3, wherein the chip 1 is fixed on the PCB 2 through an epoxy encapsulation layer 6, the PCB 2 and the substrate 3 are connected through solder balls 4, and the chip 1 and the substrate 3 are bonded through a bonding wire 5. When the traditional flip-chip gallium nitride power device works, the internal temperature of the chip 1 is conducted upwards and outwards through the epoxy packaging layer 6 and downwards and outwards through the solder balls 4, the substrate 3 and the PCB board 2.

The traditional flip-chip gallium nitride power device has the following defects: the thermal conductivity of the epoxy packaging layer 6, the solder balls 4 and the PCB 2 is low, the thermal conductivity of the substrate 3 is high, but the heat of the chip 1 cannot be efficiently diffused out because the substrate 3 is enveloped in the PCB 2, so that the overall thermal conductivity of the device is low, and the heat dissipation effect is poor.

SUMMERY OF THE UTILITY MODEL

Not enough to prior art, the utility model discloses a promote flip-chip gallium nitride power device of heat dispersion.

The utility model discloses the technical scheme who adopts as follows:

a flip-chip gallium nitride power device capable of improving heat dissipation performance comprises a chip, a PCB and a substrate, wherein the chip is fixed on the PCB through solder balls, and the substrate is fixed on the PCB; the chip and the substrate are electrically connected through at least one solder ball; a heat dissipation layer is arranged on the substrate of the chip and is connected with the source electrode of the chip through a metal column; and the epoxy packaging layer is used for packaging the chip, the PCB and the substrate.

The method is further technically characterized in that: the metal column is vertically arranged between the heat dissipation layer and the substrate.

The method is further technically characterized in that: the length of the heat dissipation layer is the same as that of the PCB, and the width of the heat dissipation layer is the same as that of the PCB.

The method is further technically characterized in that: the heat dissipation layer is a back copper layer, and the back copper layer is connected with the chip through a bonding agent.

The method is further technically characterized in that: the heat dissipation layer is composed of a first DBC copper layer, a DBC ceramic layer and a second DBC copper layer, and the second DBC copper layer is connected with the chip through a bonding agent.

The method is further technically characterized in that: and the two sides of the DBC ceramic layer are respectively covered with the first DBC copper layer and the second DBC copper layer.

The method is further technically characterized in that: the binder is conductive silver adhesive.

The method is further technically characterized in that: the surfaces of the solder balls are respectively welded with the chip and the substrate.

The method is further technically characterized in that: and at least one channel is formed along the length direction of the PCB and used for mounting the substrate.

The method is further technically characterized in that: the substrate diameter of the chip is 150mm or 200mm.

Compared with the prior art, the technical scheme of the utility model have following advantage:

the utility model discloses electrical connection between well chip and the base plate adopts the flip-chip mode, and the bottom of device is the silicon substrate layer, upwards through adhesive and back of the body copper or DBC copper lug connection, and back of the body copper or DBC copper pass through metal column and chip source electrode promptly S utmost point and form electrical connection, and the last molding is sealed or the embedment is glued in the liquid to protection chip, PCB board and base plate.

On the basis of not changing the whole frame of the chip, the heat inside the chip is uniformly and rapidly diffused along the surface of the back copper or DBC copper, and on the other hand, the heat is rapidly led out along the vertical direction of the back copper or DBC copper, so that the heat dissipation performance of the device is improved, and the maximization of the application performance of the chip and the system is realized.

Drawings

In order to make the content of the present invention more clearly understood, the present invention will be described in further detail with reference to the following embodiments of the present invention, in conjunction with the accompanying drawings.

Fig. 1 is a prior art flip-chip gallium nitride power device.

Fig. 2 is a schematic diagram of a flip-chip gallium nitride power device of example 1.

Fig. 3 is a schematic diagram of a flip-chip gallium nitride power device of example 2.

The specification reference numbers indicate: 1. a chip; 2. a PCB board; 3. a substrate; 4. a solder ball; 5. bonding wires; 6. an epoxy encapsulation layer; 7. a back copper layer; 8. a binder; 9. a metal post; 10. a first DBC copper layer; 11. a DBC ceramic layer; 12. a second DBC copper layer.

Detailed Description

The present invention is further described with reference to the following drawings and specific embodiments so that those skilled in the art can better understand the present invention and can implement the present invention, but the embodiments are not to be construed as limiting the present invention.

The foregoing and other features, aspects and utilities of the present invention will be apparent from the following detailed description of the embodiments, which is to be read in connection with the accompanying drawings. Directional terms as referred to in the following examples, for example: up, down, left, right, front or rear, etc., are simply directions with reference to the drawings. Therefore, the directional terminology used is for the purpose of description and is not intended to be limiting, and moreover, like reference numerals will be used to refer to like elements throughout.

Example 1:

as shown in fig. 2, a flip-chip gan power device with improved heat dissipation performance includes a chip 1, a PCB 2 and a substrate 3, wherein the chip 1 is fixed on the PCB 2 by solder balls 4, and the substrate 3 is fixed on the PCB 2. The chip 1 and the substrate 3 are electrically connected by at least one solder ball 4. A heat dissipation layer is arranged on the substrate of the chip 1, and the heat dissipation layer is connected with the source electrode of the chip 1 through a metal column 9. The epoxy encapsulation layer 6 encapsulates the chip 1, the PCB 2 and the substrate 3.

In this embodiment, the heat sink layer is a back copper layer 7, and the back copper layer 7 is connected to the chip 1 by an adhesive 8. Preferably, the adhesive 8 is a conductive silver paste for protecting the chip 1.

In this embodiment, the metal studs 9 are vertically disposed between the heat sink layer and the substrate 3.

In this embodiment, the length of the heat dissipation layer is the same as the length of the PCB 2, and the width of the heat dissipation layer is the same as the width of the PCB 2.

In the present embodiment, the surfaces of the solder balls 4 are soldered to the chip 1 and the substrate 3, respectively.

In the present embodiment, at least one channel is opened in the longitudinal direction of the PCB board 2, and the channel is used for mounting the substrate 3. Specifically, the size and shape of the channel is opened according to the size of the substrate 3.

In the present embodiment, the substrate diameter of the chip 1 is 150mm or 200mm.

The working principle of the embodiment is as follows:

on the basis of not changing the whole frame of the chip 1, the internal heat of the chip 1 is uniformly and rapidly diffused along the surface of the back copper layer 7, and on the other hand, the heat is rapidly led out along the vertical direction of the back copper layer 7.

Example 2:

as shown in fig. 3, the differences from example 1 are as follows:

in this embodiment, the heat sink layers are a first DBC copper layer 10, a DBC ceramic layer 11 and a second DBC copper layer 12, the second DBC copper layer 12 being connected to the chip 1 by means of a bonding agent 8. Specifically, both sides of the DBC ceramic layer 11 are covered with a first DBC copper layer 10 and a second DBC copper layer 12, respectively, and the DBC ceramic layer 11 serves as an insulating layer.

The working principle of the embodiment is as follows:

the internal heat of the chip 1 is uniformly and rapidly diffused along the surfaces of the second DBC copper layer 12 and the first DBC copper layer 10 without changing the overall frame of the chip 1, and on the other hand, the heat is rapidly conducted in the vertical direction of the second DBC copper layer 12 and the first DBC copper layer 10.

In addition, the preparation process of the flip-chip gallium nitride power device for improving the heat dissipation performance in the embodiment 1 and the embodiment 2 is as follows:

1. production of silicon substrates, which are generally prepared using silicon substrates having a diameter of 150mm or 200 mm;

2. the production of the gallium nitride epitaxial wafer needs a special preparation process, and generally comprises an aluminum nitride nucleating layer, a gallium nitride buffer layer, a gallium nitride channel layer, an aluminum gallium nitride barrier layer and a p-type gallium nitride gate layer;

3. the process of gan device generally includes 10 photo-masking steps. The processes define a channel of the device, the voltage resistance of the device, the size of the device, a peripheral protection ring of the device and the like;

4. the post metal interconnection process comprises the steps of defining the metal width of a gate electrode, a source electrode and a drain electrode of the device, interconnecting the metal lines, connecting the metal lines with the outside and the like. Usually, the metal and the metal are protected and insulated by a medium such as oxide or nitride;

5. wafer level testing, which generally includes testing and screening of the produced gan devices before actual dicing and packaging, marks the failed chips and does not package them. The test usually has a plurality of indexes, and simultaneously, high and low temperature tests are required to be included;

6. wire-bonding or Flip-chip packaging processes, the packaging process is preceded by determining the package type and size, including but not limited TO surface mount packages (DFNs), direct-on-package (TO), flip-chip (Flip-chip), and the like. Taking the DFN package as an example, to implement the package, a lead frame design is first required. The lead frame may be commonly used for some specific different sizes and types of chips. The packaging process comprises wafer front side film pasting (blue-tape), back side lapping (grinding), wafer laser and diamond knife cutting (die-saw), chip fixing on a frame (die-attach), chip routing (wire-bonding), chip flip-chip (Molding) and the like;

7. the final test is usually the last step of providing the chips to customers after the chips are ready, and the chips are finally screened to remove the chips damaged in the packaging process.

8. The chips are shipped, e.g., as roll-loads.

In the description of the embodiments of the present invention, it should be further noted that unless explicitly stated or limited otherwise, the terms "disposed" and "connected" should be interpreted broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present invention can be understood in specific cases to those skilled in the art.

It should be understood that the above examples are only for clarity of illustration and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious changes and modifications can be made without departing from the scope of the invention.

Claims (10)

1. The utility model provides a promote flip-chip gallium nitride power device of heat dispersion which characterized in that: the PCB comprises a chip (1), a PCB (printed circuit board) (2) and a substrate (3), wherein the chip (1) is fixed on the PCB (2) through a solder ball (4), and the substrate (3) is fixed on the PCB (2); the chip (1) and the substrate (3) are electrically connected through at least one solder ball (4); a heat dissipation layer is arranged on the substrate of the chip (1), and the heat dissipation layer is connected with the source electrode of the chip (1) through a metal column (9); and the chip (1), the PCB (2) and the substrate (3) are packaged by an epoxy packaging layer (6).

2. The flip-chip gan power device with enhanced heat dissipation of claim 1, wherein: the metal column (9) is vertically arranged between the heat dissipation layer and the substrate (3).

3. The flip-chip gan power device with enhanced heat dissipation of claim 1, wherein: the length of the heat dissipation layer is the same as that of the PCB (2), and the width of the heat dissipation layer is the same as that of the PCB (2).

4. The flip-chip gan power device with enhanced heat dissipation of claim 1, wherein: the heat dissipation layer is a back copper layer (7), and the back copper layer (7) is connected with the chip (1) through a bonding agent (8).

5. The flip-chip gan power device with enhanced heat dissipation of claim 1, wherein: the heat dissipation layer is a first DBC copper layer (10), a DBC ceramic layer (11) and a second DBC copper layer (12), and the second DBC copper layer (12) is connected with the chip (1) through a bonding agent (8).

6. The flip-chip gan power device with enhanced heat dissipation of claim 5, wherein: the two sides of the DBC ceramic layer (11) are respectively covered with the first DBC copper layer (10) and the second DBC copper layer (12).

7. The flip-chip gan power device with enhanced heat dissipation performance of claim 4 or 5, wherein: the binder (8) is conductive silver adhesive.

8. The flip-chip gan power device with enhanced heat dissipation of claim 1, wherein: the surfaces of the solder balls (4) are respectively welded with the chip (1) and the substrate (3).

9. The flip-chip gan power device with enhanced heat dissipation of claim 1, wherein: and at least one channel is arranged along the length direction of the PCB (2) and used for mounting the substrate (3).

10. The flip-chip gan power device with enhanced heat dissipation of claim 1, wherein: the substrate diameter of the chip (1) is 150mm or 200mm.

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