CN217563852U - Modular singlechip development system - Google Patents

Abstract

The application discloses modular singlechip development system. The modular singlechip development system comprises a singlechip core board and a plurality of function development base boards. The method comprises the following steps that a plurality of function development substrates are sequentially spliced by a male curved pin and a female curved pin socket from a core board of the single chip microcomputer; the core board is provided with a single chip microcomputer chip, a pin row, a key and a crystal oscillator; the male and female bent pin socket comprises a male plug and a female plug which are correspondingly arranged; when public plug with when female plug connects, the stiffening plate inserts to female plug with between the singlechip core plate, just the stiffening plate corresponds the cover singlechip core plate with gap between the function development base plate. The stiffening plate can increase joint strength, realizes that building blocks pull formula concatenation constitutes the singlechip for the singlechip function can be selected at will.

Description

Modular singlechip development system

Technical Field

The utility model relates to an electron device technical field especially relates to a modular singlechip development system.

Background

The existing single chip microcomputer has various forms, but has the following defects: the small-sized core board 20 has a single function; the multifunctional and multi-module core board 20 is often complex in appearance and easy to look at and feel daunting; the size and the function of the substrate are fixed and cannot be expanded; in the development and debugging process, waveforms on pins of the single chip microcomputer need to be monitored sometimes, extra test pins not only occupy the space of a PCB, but also a large number of idle probes easily cause short circuit and damage.

Based on the above-mentioned defects, it is difficult to design a multifunctional one-chip microcomputer core board 20 to make the one-chip microcomputer function be freely selectable.

SUMMERY OF THE UTILITY MODEL

An object of the utility model is to provide a modular singlechip development system contains the singlechip nuclear core plate of a compatible DIP (dual in-line package) contact pin size and the function development base plate of a series of spelling graphic formulas through the design, can replace standard module, realizes that building blocks pull formula concatenation and constitute the singlechip, has solved present singlechip nuclear core plate 20 and is difficult to the stable connection and makes the technical problem that the singlechip function can be selected at will.

In order to achieve the above object, one embodiment of the present invention provides a modular single chip microcomputer development system, which includes a single chip microcomputer core board and a plurality of function development substrates; the singlechip core board and the function development substrate are mutually connected by a male curved pin and a female curved pin socket; the singlechip core board is provided with a core board, a singlechip chip, a pin row, a key and a crystal oscillator; the pin row is electrically connected with the singlechip core board; the male curved pin and female curved pin socket comprises a male plug and a female plug which are correspondingly arranged; the female plug is arranged on the singlechip core board, and a first distance is arranged between the female plug and the singlechip core board; the male plug is arranged on the function development substrate, a reinforcing plate is arranged between the male plug and the function development substrate, and the thickness of the reinforcing plate is equal to a first distance; when public plug with when female plug connects, the stiffening plate inserts to female plug with between the nuclear core plate of singlechip, just the stiffening plate corresponds to cover the nuclear core plate of singlechip with gap between the function development base plate.

Further, the length of the reinforcing plate is greater than that of the male plug; and two ends of the reinforcing plate are welded on the function development substrate through welding pads respectively.

Furthermore, a clamping convex plate is arranged at the position, where the female plug is arranged, of the singlechip core board, a clamping groove is arranged at the position, where the male plug is arranged, of the function development substrate, and the clamping convex plate is matched with the clamping groove in shape; when the male plug and the female plug are connected, the reinforcing plate correspondingly covers the joint convex plate and a gap between the joint grooves.

Furthermore, each connecting edge of the singlechip core board and the function development substrate is provided with one to two male and female bent pin socket rows.

Further, singlechip nuclear core plate with function development base plate adopts two lines of formula concatenations, singlechip nuclear core plate is one, function development base plate is three, one singlechip nuclear core plate and three the concatenation of function development base plate is the rectangle.

Further, singlechip nuclear core plate with two line formula concatenations of function development base plate adoption three rows, singlechip nuclear core plate is one, function development base plate is five, one singlechip nuclear core plate and five the concatenation of function development base plate is the rectangle, just singlechip nuclear core plate is located a corner of rectangle.

Further, the pin row comprises a plurality of pins arranged on a straight line and a base fixedly connected with the pins; the singlechip core board is provided with a plurality of through holes which are in one-to-one correspondence with the plurality of pins, the plurality of pins are correspondingly arranged in the plurality of through holes, and the top ends of the plurality of pins protrude out of the upper surface of the singlechip core board; the base sets up the lower surface of singlechip nuclear core plate.

Further, one side of pin row still is equipped with the stitch row for debugging, the stitch row for debugging sets up the upper surface of singlechip core plate, just the first end of stitch row for debugging with protrusion in the top electric connection of a plurality of stitches of the upper surface of singlechip core plate.

Further, the second end of stitch row is used in debugging passes through dupont line and analysis appearance or oscilloscope electric connection.

Furthermore, a display is also arranged on the singlechip core board.

The utility model has the advantages that the modular singlechip development system is provided, a plurality of function development substrates are sequentially spliced by adopting male and female bent pin socket boards from a singlechip core board; the core board is provided with a single chip microcomputer chip, a pin row, a key and a crystal oscillator; the male and female bent pin socket comprises a male plug and a female plug which are correspondingly arranged; when public plug with when female plug connects, the stiffening plate inserts to female plug with between the singlechip core plate, just the stiffening plate corresponds the cover singlechip core plate with gap between the function development base plate. The stiffening plate can increase joint strength, realizes that building blocks pull formula concatenation constitutes the singlechip for the singlechip function can be selected at will.

Drawings

The technical solution and other advantages of the present application will be presented in the following detailed description of specific embodiments of the present application with reference to the accompanying drawings.

Fig. 1 is a schematic structural diagram of a modular single-chip microcomputer development system provided in an embodiment of the present application.

Fig. 2 is a schematic diagram of a partially enlarged structure of a modular singlechip development system according to an embodiment of the application.

Fig. 3 is a schematic cross-sectional structural diagram of a modular single-chip microcomputer development system provided in the embodiment of the present application.

Fig. 4 is a top view of a core board of a single chip microcomputer provided in the embodiment of the present application.

Fig. 5 is a top view of a modular single-chip microcomputer development system provided in an embodiment of the present application.

Fig. 6 is a top view of another modular single-chip microcomputer development system provided in the embodiment of the present application.

Fig. 7 is a schematic structural diagram of a core board of a single chip microcomputer provided in the embodiment of the present application.

Fig. 8 is a schematic structural diagram of a core board according to an embodiment of the present application.

Fig. 9 is a schematic structural diagram of a core board provided in the embodiment of the present application as a standard version.

Fig. 10 is a schematic structural diagram of a core board as a debugging plate according to an embodiment of the present application.

Fig. 11 is a power circuit diagram according to an embodiment of the present application.

Fig. 12 is a core board debug circuit according to an embodiment of the present application.

Fig. 13 is a peripheral circuit commonly used in a single chip microcomputer according to an embodiment of the present application.

Fig. 14 is a circuit of a single chip microcomputer HT32F50230 provided in the embodiment of the present application.

Fig. 15 is an external pin interface definition of a core board of a single chip microcomputer provided in the embodiment of the present application.

Fig. 16 is a front layout view of a circuit board according to an embodiment of the present application.

Fig. 17 is a reverse layout diagram of a circuit board according to an embodiment of the present application.

Fig. 18 is a top view of the wiring of the core board of the single chip microcomputer provided in the embodiment of the present application.

Fig. 19 is a wiring plan view of a function development substrate according to an embodiment of the present application.

Fig. 20 is a wiring plan view of another function development substrate provided in an embodiment of the present application.

Fig. 21 is a wiring top view splicing structure diagram of a modular single-chip microcomputer development system according to an embodiment of the present application.

FIG. 22 shows an exemplary UART switch and level compatible circuit according to the present invention.

Fig. 23 is an overall interface of the single chip microcomputer development platform provided in the embodiment of the present application.

Fig. 24 is a display bar interface of the single chip microcomputer development platform provided in the embodiment of the present application.

Fig. 25 is a flowchart of curriculum contents in the development platform according to the embodiment of the present application.

The components in the figure are identified as follows:

a singlechip core board 20 and a function development bottom board 22; reinforcing plate 23, core plate 1, standard version 1a, debugging version 1b, singlechip chip 101, pin row 102, button 103, crystal oscillator 104, public female looper row 200, reinforcement edge 213, pad 214, female plug 215, public plug 216, stitch 11, base 21, stitch row 12 for debugging, dupont line 24, display 25.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

In the description of the present application, it is to be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," and the like are used in the orientations and positional relationships indicated in the drawings for convenience in describing the present application and for simplicity in description, and are not intended to indicate or imply that the referenced devices or elements must have a particular orientation, be constructed in a particular orientation, and be operated in a particular manner, and are not to be construed as limiting the present application. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first" and "second" may explicitly or implicitly include one or more of the described features. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.

In the description of the present application, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; may be mechanically connected, may be electrically connected or may be in communication with each other; they may be directly connected or indirectly connected through intervening media, or may be connected through the use of two elements or the interaction of two elements. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.

In this application, unless expressly stated or limited otherwise, the recitation of a first feature "on" or "under" a second feature may include the recitation of the first and second features being in direct contact, and may also include the recitation of the first and second features not being in direct contact, but being in contact with another feature between them. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly under and obliquely below the second feature, or simply meaning that the first feature is at a lesser elevation than the second feature.

The following disclosure provides many different embodiments or examples for implementing different features of the application. In order to simplify the disclosure of the present application, specific example components and arrangements are described below. Of course, they are merely examples and are not intended to limit the present application. Moreover, the present application may repeat reference numerals and/or letters in the various examples, such repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. In addition, examples of various specific processes and materials are provided herein, but one of ordinary skill in the art may recognize applications of other processes and/or use of other materials.

Specifically, referring to fig. 1 to 6, the embodiment of the present application provides a modular single chip microcomputer development system, which includes a single chip microcomputer core board 20 and a plurality of function development base boards 22; the singlechip core board 20 and the function development bottom board 22 are connected with each other by a male and female bent pin socket 200; the singlechip core board 20 is provided with a core board 1, a singlechip chip 101, a pin row 102, a key 103 and a crystal oscillator 104; the singlechip chip 101, the pin row 102, the keys 103 and the crystal oscillator 104 are all arranged on the core board 1; the pin jack 102 is electrically connected with the singlechip core board 20; the male-female curved pin row 200 comprises a male plug 216 and a female plug 215 which are correspondingly arranged; the female plug 215 is arranged on the singlechip core board 20, and a first distance is arranged between the female plug 215 and the singlechip core board 20; the male plug 216 is arranged on the function development bottom plate 22, a reinforcing plate 23 is arranged between the male plug 216 and the function development bottom plate 22, and the thickness of the reinforcing plate 23 is equal to a first distance; when the male plug 216 and the female plug 215 are connected, the reinforcing edge 213 of the reinforcing plate 23 is inserted between the female plug 215 and the mcu core board 20, and the reinforcing plate 23 correspondingly covers a gap (between the reference numerals 211 and 212) between the mcu core board 20 and the function development board 22. The reinforcing plate 23 can increase the connection strength, the building blocks can be spliced in a dragging mode to form a single chip microcomputer, and each function development bottom plate 22 has different functions, so that the functions of the single chip microcomputer can be selected at will.

In other embodiments, the male plug 216 may be disposed on the mcu core board 20, and the female plug 215 may be disposed on the function development board 22.

In this embodiment, the length of the stiffening plate 23 is greater than the length of the male plug 216; both ends of the reinforcing plate 23 are welded to the function development base plate 22 via bonding pads 214, respectively. Reinforcing plate 23, singlechip core plate 20 and a plurality of function development bottom plate 22 all are the etching copper-clad plate, guarantee cheap cost and sufficient machining precision, and singlechip core plate 20 and a plurality of function development bottom plate 22 adopt thickness 1.6mm, and reinforcing plate 23 can adopt the fine PCB board of FR4 epoxy glass of thickness 0.8 mm.

Referring to fig. 2 to 4, the core board 20 of the single chip microcomputer is provided with a clamping convex board at a position where the female plug 215 is provided, the function development bottom board 22 is provided with a clamping groove at a position where the male plug 216 is provided, and the clamping convex board is adapted to the clamping groove in shape; when the male plug 216 is connected with the female plug 215, the reinforcing plate 23 correspondingly covers the gap between the clamping convex plate and the clamping groove. The clamping convex plate and the clamping groove form a jigsaw type PCB outer contour, the position of the convex edge 211 at the right side of the substrate corresponds to the concave edge 212 at the left side of the substrate, a guiding effect during module plugging and unplugging can be achieved, the extending interface contact pin is prevented from being damaged by external force, and the overall strength of the spliced development circuit board and the flatness of the spliced circuit board are enhanced.

In this embodiment, referring to fig. 4, each connecting edge of the core board 20 and the function development board 22 of the single chip microcomputer is provided with at least two male and female bent pin socket rows 200, preferably one to two male and female bent pin socket rows 200. The male and female curved pin socket 200 is a DIP (dual in-line package) pin, which facilitates plugging and unplugging.

In this embodiment, referring to fig. 5, the one-chip microcomputer core board 20 and the function development bottom board 22 are spliced in two rows and two columns, the one-chip microcomputer core board 20 is shown as a bottom board 0 in fig. 4 and 5; three function development bottom plates 22 are provided, and the three function development bottom plates 22 are represented by a bottom plate 1, a bottom plate 4 and a bottom plate 5 in fig. 4 and 5; the one singlechip core board 20 and the three function development bottom boards 22 are spliced to form a rectangle.

In another embodiment, referring to fig. 6, the one-chip microcomputer core board 20 and the function development backplane 22 are spliced in two rows and three columns, the one-chip microcomputer core board 20 is shown as a backplane 0 in fig. 4 and 6; the number of the function development bottom plates 22 is five, and the five function development bottom plates 22 are represented by a bottom plate 1, a bottom plate 2, a bottom plate 3, a bottom plate 4 and a bottom plate 5 in fig. 4 and 6; one singlechip core board 20 and five function development bottom plate 22 splices and is the rectangle, just singlechip core board 20 is located a corner of rectangle.

The structure of the core board 20 of the single chip microcomputer is shown in fig. 7 and 8, and the core board 1 on the core board 20 of the single chip microcomputer has two types, namely a standard version 1a and a debugging version 1b, as shown in fig. 9 and 10.

In this embodiment, as shown in fig. 9, the pin header 102 includes a plurality of pins 11 arranged in a straight line and a base 21 fixedly connected to the plurality of pins 11; the singlechip core board 20 is provided with a plurality of through holes which are in one-to-one correspondence with the plurality of pins 11, the plurality of pins 11 are correspondingly arranged in the plurality of through holes, and the top ends of the plurality of pins 11 protrude out of the upper surface of the singlechip core board 20; the base 21 is arranged on the lower surface of the singlechip core board 20.

In the present embodiment, as shown in fig. 7 and 10, the debugging plate 1b is characterized in that a test pin row 12 is additionally soldered in parallel. Stitch row 12 for debugging is still equipped with one side of pin row 102, stitch row 12 for debugging sets up the upper surface of singlechip core board 20, just the first end of stitch row 12 for debugging with the protrusion in the top electric connection of a plurality of stitches of the upper surface of singlechip core board 20.

If a logic analyzer (analyzer for short) or an oscilloscope or other equipment needs to be connected to monitor the waveform on the pin of the single chip microcomputer, as shown in fig. 7, the debugging version 1b can be used, and the pin row 12 for debugging in horizontal attachment welding is used to connect the dupont line 24 of the analyzer or the oscilloscope. At this time, the pins 11 of the core board 1 can still be connected with the singlechip core board 20 through the base 21, and because the base 21 increases the height of the core board 1, the dupont line 24 can be horizontally inserted, and the dupont line 24 does not interfere with other parts of the circuit board, so that the space is fully utilized.

Use standard version 1a at ordinary times can still be equipped with the display on singlechip core board 20, one side of display is equipped with the contact pin welding point, the display is preferred OLED display, can follow terminal observation program running state such as OLED display.

The PCB of the core board 20 of the standard version 1a and the debug version 1b is completely the same as the PCB of the normal version, and can be used interchangeably. The singlechip core board 20 is also the singlechip minimum system, and can work by connecting with a 5V power supply of a USB. The core board 20 of the single chip microcomputer comprises a clock crystal oscillator, a power supply, a burning interface, a reset circuit, an LED indicator light and a key which are used as the most basic input/output I/O debugging circuit, all IO ports of the single chip microcomputer are LED out through pins of a standard DIP socket, and the core board 20 of the single chip microcomputer with the DIP32 size is manufactured by taking an HT50F220 single chip microcomputer as an example.

As shown in fig. 11, fig. 11 is a circuit diagram of a power supply, which may be a USB1: micro USB socket provides 5V power VCC, through VR1: the 3.3V LDO outputs a VDD power supply in a voltage stabilizing manner, then a VDDA analog power supply with low ripples is output by the magnetic bead L1 and the capacitors C3, C4, C5 and C6, and the power supply filter capacitor C2, and the VDD and the VDDA are supplied to the single chip microcomputer for power supply. In the figure, R0 is a voltage selection jumper, because some single-chip microcomputers (such as HT50F220 series) support a wide voltage supply of 2.7 to 5.5V, if the peripheral circuit of the core board 20 is 5V, the R0 jumper may be installed, and VR1 is configured: 3.3V LDO chip. The 5V VCC power supply may also be connected through the extension pins at the bottom of the core board 20, and provide power through the functional substrate of the core board 20.

As shown in fig. 12, fig. 12 is a core board debug circuit, which includes D1: LED TEST program GPIO output, TEST: a key test program GPIO input, a power indicator light D2, a serial debugging interface P1 and a pin interface 4 connected with a STINK debugging tool

As shown in fig. 13, fig. 13 is a peripheral circuit commonly used by a single chip microcomputer, and includes a reset key REST, a power-on reset circuit composed of a resistor R6 and a capacitor C9, an external high-speed crystal oscillator circuit composed of a crystal oscillator Y1, a capacitor C7 and a capacitor C8, and a pull-up resistor provided by the resistor R7 for selecting the required pull-up resistor.

As shown in fig. 14, U1 is a circuit of a single chip microcomputer HT32F50230, and the single chip microcomputers having the same pin positions and capable of being replaced include HT32F50230, HT32F50241 and the like. C10: the filter capacitor of the LDO is arranged in the kernel of the singlechip chip 101, and the capacitor is very close to the singlechip on the circuit board. The lead is short and does not extend to an external pin, so that the purity of the nuclear power supply in the single chip microcomputer is guaranteed.

As shown in fig. 15, fig. 15 is defined by an external pin interface of the core board 20 of the single chip microcomputer, and all functional pins of the single chip microcomputer are led out.

In the figure, P2 and P3 are 16Pin pins with 2.54 pitches, and are arranged on the left side and the right side of the core board 20 according to the standard Pin pitch of the DIP32, through repeated optimization, the interface sequence simplifies the wiring complexity of the PCB, reduces the number of via holes, and has clear interface function distinction and easy searching of corresponding pins. Pins 1 to 7 of the P2 are pins for debugging the singlechip and multiplexing functions, and are not usually used as GPIO. Pins 11 to 16 of P2 are power supply pins and grounding pins. The GPIO to which 7,8,9 of P2 is connected is more specific, as PA14 can only be an IO of digital quantity. 1-15 of P3 are continuous standard GPIO pins. Pin 1 of P2 is power VDD, pin 16 of P3 is grounded, accord with the habit of digital logic chip power, ground pin position.

In the figure, R8 and R9: the short circuit resistance corresponds to PB14 and PB 13/crystal oscillator multiplexing pins of the single chip microcomputer, an external crystal oscillator is used on a default board, the two short circuit resistances are not installed, and a lead leading to an external pin is cut off to reduce interference. When the internal crystal oscillator of the singlechip is used, the PB14 and the PB13 can be led out to an external pin as an I/O port by welding the two resistors with short circuits.

As shown in fig. 16 and 17, a circuit board layout diagram (simply referred to as core PCB) of the core board 20 is shown, taking HT50F220 series as an example.

As shown in fig. 16, a layout diagram of the front surface of the circuit board is shown. The corresponding position of the port pin is printed with the function definition of the corresponding singlechip pin. Except for the common GPIO and power supply, the special functional pins are concentrated at the lower right corner of the figure 16, are printed in reverse color, are convenient to distinguish and are friendly to beginners.

As shown in fig. 17, which is a layout diagram of the reverse side of the circuit board, the short-circuit resistance at the lower left corner is a selection resistance of 3.3V and 5V. If the resistor is empty, the core board 20 is 3.3V, otherwise 5V, which is convenient for use as an identification basis.

The core board PCB converts the singlechip of the SMD chip into a DIP pin module, which not only meets the space size requirement embedded in the product, but also is convenient for updating the singlechip program in the industrial field and the field (the program is burned in a laboratory, and the singlechip core board 20 can be directly plugged and replaced after the program arrives at the field).

In contrast to the core board that needs to be embedded in a target product and is designed to be compact, the function development board 22PCB has a large amount of space, and can arrange more function module circuits at different intervals according to functions, thereby facilitating learning and understanding. The design uses a jigsaw-type function development backplane 22, and standardized function replacement modules. The interfaces of the substrate jigsaw and the modules are compatible, and the permutation and combination of the substrate jigsaw and the modules can meet a great number of application scenes.

The function of each substrate is as follows:

referring to fig. 6, 18 and 21, the base board 0 is a basic function core board 20, which can be used independently as a "pocket laboratory", and includes core board sockets P1 and P2, a power supply 12V dc, an oled display interface JP2, 8-bit LED water lamps D1 to D8, keys SW1 and SW2, a BUZZER1, an NTC temperature measuring circuit NTC, an RS485 interface circuit JP3, an upward "jigsaw" expansion interface, a rightward "jigsaw" expansion interface, upward expansion interfaces P4 and P5 are a parallel bus and a 5V power supply, and a rightward expansion interface P6 and P7 are a serial UART interface and a 12V and 5V power supply. All the functional circuits can be opened through jumpers, such as LED _ EN, NTC _ EN and the like (labels with circles in the figure), and if the jumpers are disconnected, the occupation of an I/O port of the single chip microcomputer is released.

Scheme a of the backplane 1, and a parallel port bus function expansion board, such as a display function expansion board. As shown in fig. 19, there are 4-bit LED nixie tubes, TFT LCD display module sockets, LCD1602, LCD12864 module sockets, wherein the 4-bit LED nixie tubes are fixedly soldered on the substrate, enabled by the jumper "4 digital _led", and if the jumper is removed, one of the other 3 kinds of LCD modules can be inserted, and the pins P14, P15 extended downward from the substrate can be connected with the sockets P4, P5 extended upward from the bottom plate 0. The right-hand extension pins P18, P19 can be plugged into the right-hand base module. More I/O ports available from backplane 0 are switched into the expansion substrate circuitry on the right.

Scheme B of backplane 1, a parallel port bus function expansion board, such as an SPI interface expansion board. As shown in fig. 20, the card reader circuit, the Flash memory circuit, etc. are assembled on a circuit board with 12pin plug, such a module can be connected to the backplane 1 through 12pin slots P16 and P17, a TF card slot can be fixedly assembled on the substrate, and a certain SPI module can be selectively enabled to occupy I/O through a jumper P3. In addition, the expansion board can be used to cooperate with an OLED display using I2C, and the position of the expansion board is on the bottom board 0.

The bottom plate 2 and the bottom plate 4 are UART serial port expansion plates, each of which is provided with two 10pin serial port module slots, and a module circuit board with UART can be inserted in a replaceable manner.

The bottom plate 3 and the bottom plate 5 are I2C bus expansion plates and single bus communication expansion plates, and are respectively provided with two 10pin module slots which can be replaced and inserted with module circuit boards with corresponding interfaces.

As shown in fig. 22, the circuit is a serial multiplexing and level compatible circuit. Because the I/O port of the single chip, especially the resources of the UART function are very tight, however, many functional modules such as the carbon dioxide sensor module, the fingerprint code module and other communication interfaces are UARTs, and when a plurality (more than 2) of UART interface modules are used at the same time, the extended function of the development substrate needs to be used.

Fig. 22 shows a UART switching and level compatible circuit, in which left side pins P26 and P27 are connected to an expansion port of a higher level substrate, such as a backplane 0, and a slot selection port SelectAB thereof is connected to an I/O port of a single chip microcomputer, when SelectAB is at a high level, Q5 is turned on, and a base of Q10 is pulled low, so that a TX0B signal of a B module of a P25 slot is shielded, a TX0a module of a P24 slot varies with TX0, when a TX0 output of the single chip microcomputer is high, a transistor Q9 is turned off, and a TX0a signal is pulled to VCCa by a pull-up resistor; when the output of the TX0 of the singlechip is low, the triode meets the saturation conduction condition, the TX0a signal is pulled low, and the low level at the moment is the saturation conduction voltage drop value of the triode.

When SelectAB is at low level, Q5 and Q9 are cut off, so the a module TX0a signal of the P24 slot is shielded, the B module TX0B of the P25 slot changes with TX0, when the TX0 output of the single chip microcomputer is high, the triode Q10 is disabled, and the TX0B signal is pulled to VCCb by a pull-up resistor; when the output of the TX0 of the singlechip is low, the triode meets the saturation conduction condition, the TX0b signal is pulled low, and the low level at the moment is the saturation conduction voltage drop value of the triode.

The output ends RX0a and RX0b of the two slots form a diode AND gate through two high-speed Schottky diodes D11 and D12, and share a R61 pull-up resistor to a high level VDD of a serial port of the single chip microcomputer.

VCCa, VCCb are connected to the high level voltages they need on the module boards, as shown for module a at P24 at 5V. The module b corresponding to P25 is connected at 3.3V. The UART shared switching circuit simultaneously has a level compatible function, and can be automatically matched with the corresponding required level voltage when a functional module circuit board is replaced. The adoption of discrete components is more economical and reliable than the adoption of analog switches or relays to switch serial communication.

The building block dragging type singlechip development platform software which is developed in a matched mode corresponds to the actual core board 20, a combination scheme of peripheral circuit boards is provided according to a functional module selected by a user, a circuit diagram is generated, a simulated physical diagram is generated, a compiled singlechip code and a Keil engineering file are automatically generated according to a selected hardware module, and the building block dragging type singlechip development platform software is convenient for the user to learn and improve.

The singlechip can support a plurality of functional modules, the arrangement and combination modes of the functional modules are more varied, the collocation of partial modules is set according to a teaching plan, and the main program of the corresponding scene is completed.

The single chip microcomputer development platform interface is shown in fig. 23 and fig. 24, a user can select and drag a required module from a right menu, and a logic view (current), a physical view (a development substrate, a core board and an effect view after corresponding to functional module assembly) and a circuit diagram are switched and displayed in a middle area, and codes can be directly checked, and the right side of the interface is the learning progress of the current user.

As shown in fig. 24, for the expanded content of the module selection menu, the development platform may "associate" the relevant experiment and enter a course according to the module selected by the user, as shown in fig. 25, the specific operation flow is as follows:

1. the base plates in different combination forms can be provided according to the needs of users, the independent core plate can be used at first, then the number of the base plates is added one by one until the connection experiment of multiple modules and multiple single-chip microcomputers can be carried out.

2. The base plate board function after the concatenation is clear, and the structure is more firm, and electrical connection is reliable, reduces to use mixed and disorderly dupont line connection. Compared with a core board which is spliced in a laminated manner, the base board which is spliced in a plane can better expose each circuit element, is convenient to explain and is also convenient to measure electric signals at any position.

3. After the software and hardware development is completed, the core board can be directly used in a target product without redesigning a circuit part of a singlechip.

4. The core board is small in size and provided with DIP pins, so that the core board can be directly replaced by a module conveniently to update programs, and the core board is suitable for field and engineering application.

5. The dynamic generation of the physical view corresponding to the core board substrate and the module by matching with the software of the singlechip development platform, the dynamic generation of the development data engineering file, the presetting of the experiment with the parameterized simulation animation, the reduction of the learning threshold and the improvement of the learning effect.

The utility model has the advantages that the modular singlechip development system is provided, a plurality of function development substrates are sequentially spliced by adopting male and female bent pin socket boards from a singlechip core board; the core board is provided with a single chip microcomputer chip, a pin row, a key and a crystal oscillator; the male and female bent pin socket comprises a male plug and a female plug which are correspondingly arranged; when public plug with when female plug connects, the stiffening plate inserts to female plug with between the nuclear core plate of singlechip, just the stiffening plate corresponds to cover the nuclear core plate of singlechip with gap between the function development base plate. The stiffening plate can increase joint strength, realizes that building blocks pull formula concatenation constitutes the singlechip for the singlechip function can be selected at will.

In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.

The above embodiments of the present application are described in detail, and specific examples are applied in the present application to explain the principles and implementations of the present application, and the description of the above embodiments is only used to help understand the technical solutions and core ideas of the present application; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications or substitutions do not depart from the spirit and scope of the present disclosure as defined by the appended claims.

Claims (10)

1. A modular singlechip development system is characterized by comprising a singlechip core board and a plurality of function development base boards; the singlechip core board and the function development substrate are mutually connected by a male curved pin and a female curved pin socket;

the singlechip core board is provided with a core board, a singlechip chip, a pin row, a key and a crystal oscillator; the pin row is electrically connected with the singlechip core board;

the male curved pin and female curved pin socket comprises a male plug and a female plug which are correspondingly arranged; the female plug is arranged on the singlechip core board, and a first distance is arranged between the female plug and the singlechip core board; the male plug is arranged on the function development substrate, a reinforcing plate is arranged between the male plug and the function development substrate, and the thickness of the reinforcing plate is equal to a first distance;

when public plug with when female plug connects, the stiffening plate inserts to female plug with between the singlechip core plate, just the stiffening plate corresponds the cover singlechip core plate with gap between the function development base plate.

2. The modular one-chip development system according to claim 1, wherein the length of the stiffening plate is greater than the length of the male plug; and two ends of the reinforcing plate are welded on the function development substrate through welding pads respectively.

3. The modular single-chip microcomputer development system according to claim 1, wherein a clamping convex plate is arranged at a position where the female plug is arranged on the single-chip microcomputer core plate, a clamping groove is arranged at a position where the male plug is arranged on the function development substrate, and the clamping convex plate is matched with the clamping groove in shape; when the male plug and the female plug are connected, the reinforcing plate correspondingly covers the joint convex plate and a gap between the joint grooves.

4. The modular singlechip development system of claim 1, wherein one to two male and female bent pin rows are arranged on each connecting edge of the singlechip core board and the function development substrate.

5. The modular singlechip development system as claimed in claim 1, wherein the singlechip core board and the function development substrate are spliced in two rows and two columns, the number of the singlechip core board is one, the number of the function development substrate is three, and the one singlechip core board and the three function development substrates are spliced to form a rectangle.

6. The modular singlechip development system of claim 1, wherein the singlechip core board is spliced with the function development boards in three rows and two columns, the number of the singlechip core boards is one, the number of the function development boards is five, the splicing of the singlechip core board and the five function development boards is rectangular, and the singlechip core board is positioned at one corner of the rectangle.

7. The modular single chip development system according to claim 1, wherein the pin bank comprises a plurality of pins arranged in a straight line and a base fixedly connected with the plurality of pins; the singlechip core board is provided with a plurality of through holes which are in one-to-one correspondence with the plurality of pins, the plurality of pins are correspondingly arranged in the plurality of through holes, and the top ends of the plurality of pins protrude out of the upper surface of the singlechip core board; the base sets up the lower surface of singlechip core plate.

8. The modular singlechip development system of claim 7, wherein a pin row for debugging is further arranged on one side of the pin row, the pin row for debugging is arranged on the upper surface of the singlechip core board, and the first end of the pin row for debugging is electrically connected with the top ends of a plurality of pins protruding out of the upper surface of the singlechip core board.

9. The modular single-chip microcomputer development system according to claim 8, wherein the second end of the pin row for debugging is electrically connected with an analyzer or an oscilloscope through a dupont line.

10. The modular singlechip development system of claim 1, wherein a display is further provided on the singlechip core board.

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