CN217333336U

CN217333336U - PLC device based on domestic multi-core processor

Info

Publication number: CN217333336U
Application number: CN202221338879.7U
Authority: CN
Inventors: 何晓蓉; 武占侠; 石明丰; 郭君; 周明珠
Original assignee: China Gridcom Co Ltd; Shenzhen Zhixin Microelectronics Technology Co Ltd
Current assignee: China Gridcom Co Ltd; Shenzhen Zhixin Microelectronics Technology Co Ltd
Priority date: 2022-05-31
Filing date: 2022-05-31
Publication date: 2022-08-30
Anticipated expiration: 2032-05-31

Abstract

The utility model discloses a PLC device based on homemade multicore processor uses with the cooperation of peripheral auxiliary assembly, and peripheral auxiliary assembly embeds there is APP software. The PLC device based on the domestic multi-core processor comprises: the system comprises a shell, a central processing service unit, a communication service unit and an I/O service unit. The central processing service unit is arranged in the shell and comprises a main control CPU. The communication service unit is arranged in the shell and is in communication connection with the central processing service unit. And the I/O service unit is arranged in the shell and is respectively connected with the central processing service unit and the communication service unit in a communication way. The master control CPU of the central processing service unit is an SCM701 chip, a Cortex-A7 architecture and a 4-core processor are adopted, and the dominant frequency is 1.2 GHz. Therefore, the utility model discloses a PLC device based on homemade multicore processor, simple structure is reasonable, provides safe hardware platform and important data protection, satisfies data transmission safety demand.

Description

PLC device based on domestic multi-core processor

Technical Field

The utility model relates to a PLC technical field especially relates to a PLC device based on homemade multicore processor.

Background

A Programmable Logic Controller (PLC) is a core device for industrial control field data acquisition and control. The method is widely applied to the automatic control and information acquisition links in industrial production. Most of the traditional PLCs adopt a time-sharing task operating system, a CPU is divided into a plurality of time slices, and each task occupies the CPU in turn. The operating system also has a priority strategy, and the process priority occupation which meets the requirement of high response speed can be met. However, the time slice is a basic execution unit, and the task switching of the operating system also requires overhead, so the response speed is limited to millisecond level. The current PLC is applied to the problem of larger scale, data and calculated amount are improved by magnitude, higher response speed is needed in the field of higher precision, and the time-sharing system of the single-core PLC is difficult to meet the requirement.

In the multi-core PLC, a core-division operating system is adopted for realizing, a specific task is allocated to a specific core for execution, and each core adopts a time-sharing strategy; for tasks that require a fast response, a dedicated core may typically be used for communication. A large amount of computation and data flow can be given to a plurality of IO cores to be completed in parallel with the computation cores. In order to realize coordination of multiple cores, a multi-core PLC system often has one main core to complete control and coordination. Through the multi-core task distribution, the load of a single core is reduced, the computing capacity and the response speed of the whole system are greatly improved, and the multi-core task distribution method is a scheme for breaking through the performance bottleneck of the single-core PLC.

With the vigorous development of industrial internet construction in China, industrial chains such as industrial control chips, hardware, software and the like supported by an industrial internet platform are mainly mastered abroad. The safety of the PLC related to the industrial internet is great tendency to promote the localization of the PLC, the research and development of PLC products mainly need various chips such as main control, communication, storage and the like, particularly a domestic main control MCU chip, the chips are explored and applied in the PLC, but mainly face the industrial control fields such as military industry, aerospace and the like, the application of the civil field is not popularized, and the large-scale popularization and application are not formed. The industrial control chip is safe to the industrial control system, and the localization is the trend. Therefore, the development of the PLC device based on the domestic multi-core processor is of great significance.

The information disclosed in this background section is only for enhancement of understanding of the general background of the invention and should not be taken as an acknowledgement or any form of suggestion that this information constitutes prior art already known to a person skilled in the art.

SUMMERY OF THE UTILITY MODEL

An object of the utility model is to provide a PLC device based on homemade multicore processor, simple structure is reasonable, provides safe hardware platform and important data protection, satisfies data transmission safety demand.

In order to achieve the above object, the utility model provides a PLC device based on domestic multicore processor uses with the cooperation of peripheral auxiliary assembly, and peripheral auxiliary assembly embeds there is APP software. The PLC device based on the domestic multi-core processor comprises: the system comprises a shell, a central processing service unit, a communication service unit and an I/O service unit. The central processing service unit is arranged in the shell and comprises a main control CPU. The communication service unit is arranged in the shell and is in communication connection with the central processing service unit. And the I/O service unit is arranged in the shell and is respectively connected with the central processing service unit and the communication service unit in a communication way. The master control CPU of the central processing service unit is an SCM701 chip, a Cortex-A7 architecture and a 4-core processor are adopted, and the dominant frequency is 1.2 GHz.

In one or more embodiments, the central processing service unit further includes a power supply, a first RAM and a first Flash, and the first RAM and the first Flash are integrated on the periphery of the main control CPU.

In one or more embodiments, the central processing service is configured to interpret and execute programming, read verticals from the communication service or the I/O service, maintain operating states, run scan cycles of the ladder logic, and write output values to the communication service or the I/O service.

In one or more embodiments, the communication service unit includes a plurality of ports, a second Flash, a second RAM, and a CPU, and is configured to read a code related to a communication protocol from the central processing service unit, and read time-sensitive interactive data from the central processing service unit, and ensure that the interactive data is in a real-time communication queue.

In one or more embodiments, the I/O service unit includes relays, registers, and logic devices, and the I/O service unit converts signals between low voltage, low current control logic and high voltage, high current process control.

In one or more embodiments, the process of the central processing service unit running one scan cycle includes internal processing, communication services, input processing, program execution, and output processing.

Compared with the prior art, according to the utility model discloses a PLC device based on homemade multicore processor, simple structure is reasonable, provides safe hardware platform and important data protection, satisfies data transmission safety demand.

Drawings

Fig. 1 is an architecture diagram of a PLC device based on a domestic multi-core processor according to an embodiment of the present invention.

Fig. 2 is a schematic view of a service flow of a PLC device based on a domestic multi-core processor according to an embodiment of the present invention.

Fig. 3 is a schematic diagram of a scanning operation process of a PLC apparatus based on a domestic multi-core processor according to an embodiment of the present invention.

Description of the main reference numerals:

1-a central processing service unit, 2-a communication service unit, 3-an I/O service unit, 4-a main control CPU, 5-a first Flash, 6-a first RAM, 7-a power supply, 8-a port, 9-a second Flash, 10-a second RAM, 11-a CPU, 12-a relay, 13-a register and 14-a logic device.

Detailed Description

The following detailed description of the present invention is provided in conjunction with the accompanying drawings, but it should be understood that the scope of the present invention is not limited by the following detailed description.

Throughout the specification and claims, unless explicitly stated otherwise, the word "comprise", or variations such as "comprises" or "comprising", will be understood to imply the inclusion of a stated element or component but not the exclusion of any other element or component.

Fig. 1 is an architecture diagram of a PLC device based on a domestic multi-core processor according to an embodiment of the present invention. As shown in fig. 1, according to the utility model discloses a PLC device based on domestic multicore processor of embodiment uses with the cooperation of peripheral auxiliary assembly, and peripheral auxiliary assembly embeds there is APP software. The PLC device based on the domestic multi-core processor comprises: a housing, a central processing service unit 1, a communication service unit 2, and an I/O service unit 3. The central processing service unit 1 is built in the housing, and the central processing service unit 1 includes a main control CPU 4. The communication service unit 2 is built in the housing, and the communication service unit 2 is connected with the central processing service unit 1 in a communication manner. And the I/O service unit 3 is arranged in the shell, and the I/O service unit 3 is respectively connected with the central processing service unit 1 and the communication service unit 2 in a communication way. The master control CPU4 of the central processing service unit 1 is an SCM701 chip, and adopts a Cortex-a7 architecture, a 4-core processor, and the dominant frequency is 1.2 GHz.

In one or more embodiments, the central processing service unit 1 further includes a power supply 7, a first RAM6, and a first Flash5, and the first RAM6 and the first Flash5 are integrated in the periphery of the main control CPU 4.

In one or more embodiments, the central processing service unit 1 is configured to interpret and execute a programming program, read verticals from the communication service unit 2 or the I/O service unit 3, maintain an operational state, run a scan cycle of the ladder logic, and write output values to the communication service unit 2 or the I/O service unit 3.

In one or more embodiments, the communication service unit 2 includes a plurality of ports 8, a second Flash9, a second RAM10 and a CPU11, and the communication service unit 2 is configured to read the communication protocol related codes from the central processing service unit 1 and read the time-sensitive interaction data from the central processing service unit 1, and ensure that the interaction data is in a real-time communication queue.

In one or more embodiments, the I/O service unit 3 includes a relay 12, a register 13, and a logic device 14, and the I/O service unit 3 converts signals between low voltage, low current control logic and high voltage, high current process control.

In one or more embodiments, the process in which the central processing service unit 1 runs one scan cycle includes internal processing, communication service, input processing, program execution, and output processing.

In practical application, the utility model discloses a PLC device based on homemade multicore processor includes power 7, digital input, high-speed pulse input, analog input, ethernet, RS485, RS232, CAN, digital output, high-speed pulse output, SD card etc.. The hardware is designed based on an SCM701 main control chip with independent intellectual property, the chip adopts a Cortex-A7 architecture, a 4-core processor, a main frequency of 1.2GHz, and peripheral integrated external interfaces of 2GB DDR3 SDRAM and 4GB FLASH memory, two-way Ethernet and the like. The core board has 1 ESAM (embedded Secure Access module) embedded security control module for data security protection. The device has compact structural design, adopts a press type wiring terminal and avoids screw wiring; the device is provided with 16 paths of input and 16 paths of output, comprises 4 paths of high-speed input and 4 paths of high-speed output, and can realize 4-axis pulse output and 4-axis encoder counting; the host expansion interface can expand 8 local modules to the maximum, so that IO or analog quantity expansion is realized, and the expansion of a backboard bus is supported.

As shown in fig. 1, the modular PLC virtualizes each hardware resource into each service unit, including a central processing service unit 1, a communication service unit 2, and an I/O service unit 3, by using an integrated circuit.

The central processing service unit 1 is the core of the PLC, which enables coordination between the service units. If the other service units do not store their own configuration, the central processing service unit 1 will configure them at power up.

The central processing service unit 1 interprets and executes the programming program, reads values from the communication service unit 2 or the I/O service unit 3, maintains the operation state, runs logical "scan" cycles of a ladder, etc., and writes output values to the communication service unit 2 or the I/O service unit 3.

The communication service unit 2 reads a communication protocol-related code from the central processor service unit. They read time-sensitive interactive data from the central processing unit service unit to ensure that the interactive data is in a real-time communication queue. Because the control system protocol and the delay requirement required by some scenarios are high, the communication service unit 2 may have a strong processing capability, and therefore the communication service unit 2 may need the calculation power as in the design of the central processor service unit.

The I/O service unit 3 converts signals between low voltage, low current control logic and high voltage, high current process control. The I/O service unit 3 contains an analog-to-digital converter (ADC) and the logic device 14 supports configuration services for lighting and DIDO. The registers 13 include an input-output process image area (PII/PIQ), a bit memory (M), a timer (T) and a counter (C), a block stack and an interrupt stack, and a temporary memory (local data stack).

The utility model discloses a PLC device based on homemade multicore processor uses with the cooperation of peripheral auxiliary assembly, and peripheral auxiliary assembly embeds there is APP software, and software realizes software and hardware decoupling zero and software APP ization based on independently controllable "pivot" operating system, Docker container and independently arrange the technique. The PLC operation system and the peripheral software development platform form a complete development operation software, and the software architecture is divided into three layers: an application development layer, a communication layer and a controller device layer. As shown in fig. 2:

the application development layer comprises a PLC program editing system and a compiler, a configuration file editor required by the system, a visual interface programming component and the like. The editor is mainly responsible for compiling, compiling grammar, simulating and other functions of the target program conforming to IEC 61131-3. The compiler is mainly responsible for compiling and generating a target file for an ST source file compiled by the editor. And the configuration file editor is configured for a certain PLC according to the actual engineering port 8 and the like.

After the application development layer compiles and compiles the PLC program without errors, the target software can be downloaded to the controller through the communication layer interface, and the controller is debugged through the communication layer.

And the equipment layer is provided with an operation system, and can automatically operate the PLC target file codes compiled by the application development layer. And real-time debugging of the application development layer on the control layer device object program is also supported. Meanwhile, a real-time operation kernel of the system is provided with a register 13 data area in a memory for storing data acquired by the module for program interactive use. The operation system is the core of the whole PLC and is used for completing the operations of system configuration, input data processing, program cyclic calling, data output control and the like. The kernel of the running system is implemented by adopting C or C + + high-level language programming in consideration of the portability and the running efficiency of the program.

PLC software design:

1. the LD programming language is supported, the user-defined variable can be used, and the program logic is clear; the ladder diagram supports the instruction of inserting the graphic block, and the program is edited to intelligently prompt in real time, so that the programming efficiency is improved;

2. forming a custom process library by packaging a process instruction through the FB/FC function, thereby realizing program multiplexing; the packaging library is reused in a program invisible mode, and an autonomous process is protected;

3. an online debugging interface is patterned, so that the motion debugging of a programming-free servo axis can be realized;

4. the motion control instruction based on PLCopen can realize the maximum 8-axis motion control, support EtherCAT bus and pulse mode, and meet the requirements of different control modes;

5. the host supports RS485, CAN, Ethernet and EtherCAT interfaces, and CAN realize multi-level network communication; the Ethernet interface supports ModbusTCP protocol and socket communication, and meets different communication requirements.

Fig. 3 is a schematic diagram of a scanning operation process of a PLC apparatus based on a domestic multi-core processor according to an embodiment of the present invention. As shown in fig. 3, the scanning process of the PLC includes five stages of internal processing, communication service, input processing, program execution, and output processing, and the time required for the five stages to scan once is referred to as a scanning cycle. The internal processing is to check internal hardware such as a CPU, reset a watchdog timer, and perform other operations. The communication service is used for realizing communication with other external intelligent devices (such as programmers and computers). The input sampling is to sample the states of all input terminals in sequence and store the sampled states into the corresponding registers 13. Wherein, the program execution is to scan and execute the user program, and store the result in the corresponding register 13. The output refresh is to transfer the state related to the output in the register 13 to the output latch, and the output drives the external load.

After the application program is downloaded to the PLC equipment, the PLC operation system analyzes the application program to generate a corresponding machine code, then performs circular scanning, and circularly executes three processes of input sampling, program execution and output refreshing, thereby realizing the logic control function of the system.

The PLC has two operational states, when in the RUN state: and running a PLC program, and refreshing input and output in real time. In the STOP state (the state can be set by the host computer), the PLC program is stopped. And stopping refreshing input and output in real time. At this point, reading, timer time modification and program copying, configuration modification, PLC program editing, etc. may be performed.

The utility model discloses a PLC device based on homemade multicore processor adopts multicore processor, has the advantage that control logic is simple, high dominant frequency, strong expansibility, low-power consumption. On the basis of the advantage of the number of axes of the small PLC, the device still has a faster scanning period and lower delay jitter performance. In addition, the system also has the capability of expanding IO to the medium PLC, namely the maximum point number can be expanded to 256 points; the capability of expanding to the motion controller, namely the capability of partial Motion Controller (MC) is provided for the number of axes, scanning period and delay jitter; the system has a compatible interface and a bus protocol which are expanded to modules such as IO (input/output) of mainstream manufacturers at home and abroad.

The utility model discloses a PLC device based on homemade multicore processor adopts homemade main control chip SCM701, can provide safe hardware platform and important data protection, satisfies data transmission safety demand. The method supports various functions of access authority control, communication line protection, data file storage and the like by utilizing a built-in algorithm, thereby ensuring the safety of data storage, transmission and interaction.

In a word, the utility model discloses a PLC device based on homemade multicore processor, simple structure is reasonable, provides safe hardware platform and important data protection, satisfies data transmission safety demand.

The foregoing descriptions of specific exemplary embodiments of the present invention have been presented for purposes of illustration and description. It is not intended to limit the invention to the precise form disclosed, and obviously many modifications and variations are possible in light of the above teaching. The exemplary embodiments were chosen and described in order to explain certain principles of the invention and its practical application to enable one skilled in the art to make and use various exemplary embodiments of the invention and various alternatives and modifications as are suited to the particular use contemplated. It is intended that the scope of the invention be defined by the claims and their equivalents.

Claims

1. The utility model provides a PLC device based on homemade multicore processor uses with the cooperation of peripheral auxiliary assembly, peripheral auxiliary assembly embeds there is APP software, its characterized in that, PLC device based on homemade multicore processor includes:

a housing;

the central processing service unit is arranged in the shell and comprises a main control CPU;

the communication service unit is arranged in the shell and is in communication connection with the central processing service unit; and

the I/O service unit is arranged in the shell and is respectively in communication connection with the central processing service unit and the communication service unit;

the master control CPU of the central processing service unit is an SCM701 chip, a Cortex-A7 architecture and a 4-core processor are adopted, and the dominant frequency is 1.2 GHz.

2. The home-made multi-core processor-based PLC apparatus according to claim 1, wherein the central processing service unit further includes a power supply, a first RAM, and a first Flash, and the first RAM and the first Flash are integrated in a periphery of the main control CPU.

3. The PLC device according to claim 2, wherein the central processing service unit is configured to interpret and execute a programming program, read a vertical from the communication service unit or the I/O service unit, maintain an operation state, run a scan cycle of a ladder logic, and write an output value to the communication service unit or the I/O service unit.

4. The PLC device according to claim 1, wherein the communication service unit includes a plurality of ports, a second Flash, a second RAM, and a CPU, and is configured to read a code related to a communication protocol from the central processing service unit, and read time-sensitive interactive data from the central processing service unit, and ensure that the interactive data is in a real-time communication queue.

5. The homemade multicore processor-based PLC device of claim 1, wherein the I/O service unit comprises relays, registers and logic devices, and the I/O service unit converts signals between low voltage, low current control logic and high voltage, high current process control.

6. A domestic multi-core processor-based PLC apparatus according to claim 3, wherein the process in which said central processing service unit runs one scanning cycle includes internal processing, communication service, input processing, program execution, and output processing.