CN217280751U

CN217280751U - Novel multi-surface heat dissipation power semiconductor module

Info

Publication number: CN217280751U
Application number: CN202123314987.9U
Authority: CN
Inventors: 常东来; 张正义; 赵善麒
Original assignee: Macmic Science & Technology Holding Co ltd
Current assignee: Macmic Science & Technology Holding Co ltd
Priority date: 2021-11-30
Filing date: 2021-12-27
Publication date: 2022-08-23
Anticipated expiration: 2031-12-27
Also published as: CN114361123A

Abstract

The utility model relates to a power module technical field, concretely relates to novel multiaspect heat dissipation power semiconductor module, including middle transition layer and respectively by the first copper-clad insulation base plate and the second copper-clad insulation base plate that set up in middle transition layer both sides, the first terminal surface of middle transition layer is equipped with first surface circuit, the second terminal surface of middle transition layer is equipped with second surface circuit, the inside of middle transition layer is equipped with middle transition circuit, first copper-clad insulation base plate is last to be equipped with first substrate circuit and first surface circuit electricity is connected, the second copper-clad insulation base plate is last to be equipped with second substrate circuit and second surface circuit electricity and is connected, still be equipped with refrigerant input port and refrigerant delivery outlet on the middle transition layer. The utility model provides a multiaspect heat dissipation power semiconductor module adopts the multiaspect and buries the mode of refrigerant and dispels the heat, has promoted heat dispersion greatly to get rid of the wire bonding, can promote power semiconductor module's reliability, and reduce parasitic inductance and switching loss.

Description

Novel multi-surface heat dissipation power semiconductor module

Technical Field

The utility model relates to a power module technical field, concretely relates to novel multiaspect heat dissipation power semiconductor module.

Background

With the development of the technology, the requirements for power density and heat dissipation performance of the power module are increased year by year, and the higher the power of the power device is, the larger the heat generated by the semiconductor chip is, and if the heat generated by the chip is not dissipated in time, the performance and reliability of the power module are seriously affected.

In the face of high power requirements, the following problems exist with current power modules: 1. the existing power module adopts a single-face design, namely a semiconductor chip is arranged on one face of a copper-clad insulating substrate, and heat dissipation is carried out on the other face of the copper-clad insulating substrate. 2. The existing power semiconductors are bonded by metal wires, so that the connection is unstable, and the long-term reliability of a power module is influenced; and the parasitic inductance cannot be reduced, the switching loss is influenced, and the improvement of the switching frequency is limited.

SUMMERY OF THE UTILITY MODEL

The utility model discloses a solve among the prior art technical problem that power module adopts the single face design can't satisfy the heat dissipation demand under the high power, provided a novel multiaspect heat dissipation power semiconductor module, adopt two-sided and inside refrigerant radiating mode, promote the radiating effect greatly, can satisfy the high power demand.

The technical scheme of the utility model:

a novel multi-faceted heat dissipating power semiconductor module, comprising:

the first end face of the middle transition layer is provided with a first surface circuit, the second end face of the middle transition layer is provided with a second surface circuit, and the middle transition layer is internally provided with a middle transition circuit which is electrically connected with the first surface circuit and the second surface circuit;

the first copper-clad insulating substrate is arranged on one side of the intermediate transition layer, and a first substrate circuit is arranged on the first copper-clad insulating substrate and is electrically connected with the first surface circuit;

the second copper-clad insulating substrate is arranged on the other side of the middle transition layer, a second substrate circuit is arranged on the second copper-clad insulating substrate and electrically connected with the second surface circuit, a refrigerant input port and a refrigerant output port are further arranged on the middle transition layer, and cooling is performed through a refrigerant.

Further, the first substrate circuit is arranged on one surface of the first copper-clad insulating substrate facing the first surface circuit, and the first substrate circuit and the first surface circuit are electrically connected by welding; the second substrate circuit is arranged on one surface, facing the second surface circuit, of the second copper-clad insulating substrate, and the second substrate circuit and the second surface circuit are electrically connected through welding.

Furthermore, the first surface circuit comprises a plurality of first electric connection bumps, the first substrate circuit comprises a first chip and a second chip, and the first surface circuit is directly welded with the first chip and the second chip through the plurality of first electric connection bumps.

Furthermore, the second surface circuit comprises a plurality of second electrical connection bumps, the second substrate circuit comprises a third chip and a fourth chip, and the second surface circuit is directly welded with the third chip and the fourth chip through the plurality of second electrical connection bumps.

Further, the first chip and the third chip are diodes, and the second chip and the fourth chip are IGBTs.

Further, the first surface circuit includes a first electrical connection bump a, a first electrical connection bump b, a first electrical connection bump c, a first electrical connection bump d, a first electrical connection bump e, and a first electrical connection bump f, an anode of the first chip is soldered to the first electrical connection bump a, a cathode of the first chip is electrically connected to a collector of the second chip, an emitter of the second chip is soldered to the first electrical connection bump b and the first electrical connection bump c, respectively, and a gate of the second chip is soldered to the first electrical connection bump d; still be equipped with first power terminal, second power terminal, first emitter signal terminal and first gate signal terminal on the intermediate transition layer, first electric connection bump a and first electric connection bump b pass through intermediate transition circuit with the second power terminal electricity is connected, first electric connection bump c pass through intermediate transition circuit with first emitter signal terminal electricity is connected, first electric connection bump d pass through intermediate transition circuit with first gate signal terminal electricity is connected, first electric connection bump e and first electric connection bump f pass through intermediate transition circuit with first power terminal electricity is connected, just first electric connection bump e and first electric connection bump f with the negative pole of first chip and the collecting electrode of second chip are connected electrically.

Further, the second surface circuit includes a second electrical connection bump a, a second electrical connection bump b, a second electrical connection bump c, a second electrical connection bump d, a second electrical connection bump e, and a second electrical connection bump f, an anode of the third chip is soldered to the second electrical connection bump a, a cathode of the third chip is electrically connected to a collector of the fourth chip, an emitter of the fourth chip is soldered to the second electrical connection bump b and the second electrical connection bump c, respectively, and a gate of the fourth chip is soldered to the second electrical connection bump d; the middle transition layer is further provided with a third power terminal, a second emitter signal terminal and a second gate signal terminal, the second electric connection salient point a and the second electric connection salient point b are electrically connected with the third power terminal through the middle transition circuit, the second electric connection salient point c is electrically connected with the second emitter signal terminal through the middle transition circuit, the second electric connection salient point d is electrically connected with the second gate signal terminal through the middle transition circuit, the second electric connection salient point e and the second electric connection salient point f are electrically connected with the second power terminal through the middle transition circuit, and the second electric connection salient point e and the second electric connection salient point f are electrically connected with the cathode of the third chip and the collector of the fourth chip.

Furthermore, the whole middle transition layer is square, and the refrigerant input port and the refrigerant output port are respectively arranged at two opposite corners of the middle transition layer.

Furthermore, a serpentine refrigerant channel is arranged in the intermediate transition layer, and two ends of the refrigerant channel are respectively communicated with the refrigerant input port and the refrigerant output port.

Furthermore, the multi-surface heat dissipation power semiconductor module further comprises a plastic package shell, and the middle transition layer, the first copper-clad insulating substrate and the second copper-clad insulating substrate are wrapped and protected by the plastic package shell.

After the technical scheme is adopted, the utility model provides a pair of novel multiaspect heat dissipation power semiconductor module compares with prior art, has following beneficial effect:

1. the utility model discloses a transition layer in the middle of setting up, the both sides at transition layer in the middle set up first copper-clad insulation substrate and second copper-clad insulation substrate respectively, and set up the refrigerant passageway in transition layer in the middle, dispel the heat through the refrigerant, so, compare with prior art, the both sides of having utilized transition layer in the middle dispel the heat, greatly increased heat radiating area, and cool off through the refrigerant, holistic radiating effect has further been promoted, make power semiconductor module can dispel the heat fast, can satisfy the demand of high power, promote power semiconductor module's reliability simultaneously.

2. The utility model discloses with each chip direct with each electricity on the middle transition layer connect the bump welding, compare with prior art, got rid of the metal bonding silk, adopt the direct and electricity of chip face to connect the mode of bump welding for it is more stable to connect, has promoted power semiconductor module's long-term reliability, adopts welded mode moreover, can reduce parasitic inductance, reduce switching loss, is favorable to switching frequency's improvement.

3. The utility model discloses with each chip direct with middle transition layer on each electricity connect the bump welding for each chip face is direct to be connected the bump contact with the electricity, has increased heat dissipation area of contact, is the heat dissipation of contact conduction formula moreover, further promotes holistic radiating effect.

Drawings

Fig. 1 is a side view of a power semiconductor module (not including a plastic housing) of the present embodiment;

FIG. 2 is an enlarged partial schematic view of FIG. 1;

FIG. 3 is a schematic structural diagram of an intermediate transition layer according to the present embodiment;

FIG. 4 is a schematic view of the connection between the intermediate transition layer and the first copper clad insulating substrate according to the present embodiment;

fig. 5 is a schematic structural diagram of the first surface circuit and the first substrate circuit of the present embodiment;

FIG. 6 is a schematic view showing the connection between the intermediate transition layer and the second copper clad insulating substrate according to the present embodiment;

FIG. 7 is a schematic structural diagram of a second substrate circuit and a second surface circuit of the present embodiment;

fig. 8 is a schematic circuit diagram of the power semiconductor module of the present embodiment;

fig. 9 is a front view of the power semiconductor module (including the plastic package housing) of the present embodiment;

fig. 10 is a schematic view of the overall structure of the power semiconductor module (including the plastic package housing) according to this embodiment.

Wherein,

the structure comprises an intermediate transition layer 1, a first surface circuit 11, a first electric connection bump a111, a first electric connection bump b112, a first electric connection bump c113, a first electric connection bump d114, a first electric connection bump e115 and a first electric connection bump f 116; a second surface circuit 12, a second electrical connection bump a121, a second electrical connection bump b122, a second electrical connection bump c123, a second electrical connection bump d124, a second electrical connection bump e125, a second electrical connection bump f 126; a refrigerant inlet 131, a refrigerant outlet 132; a first power terminal 141, a second power terminal 142, a third power terminal 143; a first emitter signal terminal 151, a first gate signal terminal 152, a second emitter signal terminal 153, a second gate signal terminal 154;

a first copper clad insulating substrate 2, a first substrate circuit 21, a first chip 211, a second chip 212, an emitter a2121, a gate a 2122;

a second copper-clad insulating substrate 3, a second substrate circuit 31, a third chip 311, a fourth chip 312, an emitter b3121, and a gate b 3122;

and (4) plastic-packaging the shell.

Detailed Description

The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses. Based on the embodiments of the present invention, all other embodiments obtained by a person skilled in the art without making creative efforts belong to the protection scope of the present invention.

It is noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of example embodiments according to the present application. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, and it should be understood that when the terms "comprises" and/or "comprising" are used in this specification, they specify the presence of stated features, steps, operations, devices, components, and/or combinations thereof, unless the context clearly indicates otherwise.

It should be noted that the terms "first", "second", and the like are used to define the components, and are only used for convenience of distinguishing the corresponding components, and if not stated otherwise, the terms have no special meaning, and therefore, the scope of the present invention should not be construed as being limited.

As shown in fig. 1-3, the present embodiment provides a novel multi-surface heat dissipation power semiconductor module, which includes an intermediate transition layer 1, a first copper-clad insulating substrate 2 and a second copper-clad insulating substrate 3, wherein a first end surface of the intermediate transition layer 1 is provided with a first surface circuit 11, a second end surface of the intermediate transition layer 1 is provided with a second surface circuit 12, and an intermediate transition circuit electrically connected to the first surface circuit 11 and the second surface circuit 12 is disposed inside the intermediate transition layer 1; furthermore, the first copper-clad insulating substrate 2 is arranged on one side close to the first surface circuit 11 of the intermediate transition layer 1, the first copper-clad insulating substrate 2 is provided with a first substrate circuit 21 which is electrically connected with the first surface circuit 11, the second copper-clad insulating substrate 3 is arranged on the other side of the intermediate transition layer 1, and the second copper-clad insulating substrate 3 is provided with a second substrate circuit 31 which is electrically connected with the second surface circuit 12; furthermore, a refrigerant input port 131 and a refrigerant output port 132 are further arranged on the intermediate transition layer 1, a refrigerant channel is arranged in the intermediate transition layer 1, and two ends of the refrigerant channel are respectively communicated with the refrigerant input port 131 and the refrigerant output port 132, so that cooling is performed through refrigerants such as water, heat is taken away in time, and preferably, the refrigerant channel is arranged to be in a winding shape to improve the heat dissipation effect.

Like this, transition layer 1 in the middle of the embodiment is through setting up, it covers copper insulating substrate 2 and second to cover copper insulating substrate 3 to set up first copper insulating substrate 2 and second respectively in the both sides of transition layer 1 in the middle of, and set up the refrigerant passageway in transition layer 1 in the middle of, dispel the heat through the refrigerant, thus, compared with the prior art, the both sides of transition layer 1 in the middle of having utilized dispel the heat, greatly increased heat radiating area, and cool off through the refrigerant, holistic heat radiating area and radiating effect have further been promoted, make power semiconductor module can dispel the heat fast, can satisfy the demand of high power, promote power semiconductor module's reliability simultaneously. In addition, this embodiment is provided with the intermediate transition circuit in the intermediate transition layer 1, and the intermediate transition circuit is electrically connected with the first surface circuit 11 and the second surface circuit 12, and the first surface circuit 11 and the second surface circuit 12 are electrically connected with each substrate circuit, so as to complete the circuit connection of the whole power semiconductor module, and thus the space of the intermediate transition layer 1 is fully utilized, so that the whole structure is more compact, and the whole appearance is more concise and beautiful.

In order to further improve the heat dissipation performance of the power semiconductor module, the first surface circuit 11 and the first substrate circuit 21, and the second surface circuit 12 and the second substrate circuit 31 are electrically connected by soldering in this embodiment. Specifically, as shown in fig. 4 to 7, the first substrate circuit 21 is provided on the first copper clad insulating substrate 2 on the side facing the first surface circuit 11, and the first substrate circuit 21 and the first surface circuit 11 are electrically connected by soldering; the second substrate circuit 31 is provided on the second copper-clad insulating substrate 3 on the side facing the second surface circuit 12, and the second substrate circuit 31 and the second surface circuit 12 are electrically connected by soldering.

More specifically, the first surface circuit 11 includes a plurality of first electrical connection bumps, the first substrate circuit 21 is soldered with the first chip 211 and the second chip 212, and the first surface circuit 11 is directly soldered with the first chip 211 and the second chip 212 through the plurality of first electrical connection bumps; the second surface circuit 12 comprises a plurality of second electrical connection bumps, the second substrate circuit 31 is welded with the third chip 311 and the fourth chip 312, and the second surface circuit 12 is directly welded with the third chip 311 and the fourth chip 312 through the plurality of second electrical connection bumps; the welding mode can be selected but not limited to friction welding, ultrasonic welding and the like, the first chip and the third chip can be selected but not limited to a FRED diode, and the second chip and the fourth chip can be selected but not limited to an IGBT.

In this way, in the present embodiment, the first chip 211, the second chip 212, the third chip 311, and the fourth chip 312 are directly soldered to the electrical connection bumps on the intermediate transition layer 1, and compared with the prior art, on the one hand, the metal bonding wires are removed, and a mode of soldering the chip surface directly to the electrical connection bumps is adopted, so that the connection is more stable, the long-term reliability of the power semiconductor module is improved, and the soldering mode is adopted, so that the parasitic inductance can be reduced, the switching loss can be reduced, and the switching frequency can be improved; on the other hand, because the chip surface directly contacts with the electric connection salient point, the heat dissipation contact area is increased, and each chip is the conduction type heat dissipation directly contacting with the intermediate transition layer 1, the whole heat dissipation effect can be further improved.

The electrical connection between the electrical connection bumps and the chips will be described in detail with reference to fig. 4-8, in which fig. 5a shows a schematic diagram of the first electrical connection bumps on the first surface circuit 11, and fig. 5b shows a schematic diagram of the chips on the first substrate circuit 21; fig. 7a of fig. 7 shows a schematic diagram of each chip on the second substrate circuit 31, and fig. 7b shows a schematic diagram of each second electrical connection bump on the second surface circuit 12.

First, as shown in fig. 4 to 5, the first surface circuit 11 includes a first electrical connection bump a111, a first electrical connection bump b112, a first electrical connection bump c113, a first electrical connection bump d114, a first electrical connection bump e115, and a first electrical connection bump f116, the first electrical connection bump a111 is correspondingly disposed at a position where the first electrical connection bump a111 can be soldered to the first chip 211, and the first electrical connection bump b112, the first electrical connection bump c113, and the first electrical connection bump d114 are correspondingly disposed at a position where the second chip 212 can be soldered. Further, the anode of the first chip 211 is soldered to the first electrical connection bump a111, the cathode of the first chip 211 is electrically connected to the collector of the second chip 212 through the first substrate circuit, two faces of the emitter a2121 of the second chip 212 are soldered to the first electrical connection bump b112, one of the two faces is further soldered to the first electrical connection bump c113, the first electrical connection bump c113 is smaller for extraction, and the gate a2122 of the second chip 212 is soldered to the first electrical connection bump d 114. Further, the intermediate transition layer 1 is further provided with a first power terminal 141, a second power terminal 142, a first emitter signal terminal 151 and a first gate signal terminal 152, the first electrical connection bump a111 and the first electrical connection bump b112 are electrically connected to the second power terminal 142 through an intermediate transition circuit, the first electrical connection bump c113 is electrically connected to the first emitter signal terminal 151 through an intermediate transition circuit, and the first electrical connection bump d114 is electrically connected to the first gate signal terminal 152 through an intermediate transition circuit. Further, the first electrical connection bump e115 and the first electrical connection bump f116 are electrically connected to the first power terminal 141 through an intermediate transition circuit, and the first electrical connection bump e115 and the first electrical connection bump f116 are soldered to the cathode of the first chip 211 and the soldering portion led out of the collector of the second chip 212. This enables the circuit connection of the upper half-bridge in the power semiconductor module shown in fig. 8.

Similarly, as shown in fig. 6 to 7, the second surface circuit 12 includes a second electrical connection bump a121, a second electrical connection bump b122, a second electrical connection bump c123, a second electrical connection bump d124, a second electrical connection bump e125 and a second electrical connection bump f126, the second electrical connection bump a121 is correspondingly disposed at a position where it can be soldered to the third chip 311, and the second electrical connection bump b122, the second electrical connection bump c123 and the second electrical connection bump d124 are correspondingly disposed at a position where it can be soldered to the fourth chip 312. Further, the anode of the third chip 311 is soldered to the second electrical connection bump a121, the cathode of the third chip 311 is electrically connected to the collector of the fourth chip 312 through the second substrate circuit, two faces of the emitter b3121 of the fourth chip 312 are soldered to the second electrical connection bump b122, one of the faces is further soldered to the second electrical connection bump c123, and the gate b3122 of the fourth chip 312 is soldered to the second electrical connection bump d 124; the intermediate transition layer 1 is further provided with a third power terminal 143, a second emitter signal terminal 153 and a second gate signal terminal 154, the second electrical connection bump a121 and the second electrical connection bump b122 are electrically connected to the third power terminal 143 through an intermediate transition circuit, the second electrical connection bump c123 is electrically connected to the second emitter signal terminal 153 through an intermediate transition circuit, the second electrical connection bump d124 is electrically connected to the second gate signal terminal 154 through an intermediate transition circuit, the second electrical connection bump e125 and the second electrical connection bump f126 are electrically connected to the second power terminal 142 through an intermediate transition circuit, and the second electrical connection bump e125 and the second electrical connection bump f126 are soldered to a soldering portion led out from the cathode of the third chip 311 and the collector of the fourth chip. This achieves the circuit connection of the lower half-bridge in the power semiconductor module shown in fig. 8.

Preferably, as shown in fig. 3, the intermediate transition layer 1 of the present embodiment is square, and the refrigerant inlet 131 and the refrigerant outlet 132 are respectively disposed at two opposite corners of the intermediate transition layer 1, that is, the refrigerant inlet 131 and the refrigerant outlet 132 are respectively disposed at the upper right and lower left of the intermediate transition layer 1, so as to facilitate the arrangement of the refrigerant channel and increase the cooling area of the refrigerant.

Further, as shown in fig. 9 to 10, the power semiconductor module of the present embodiment further includes a plastic package case 4, and the intermediate transition layer 1, the first copper-clad insulating substrate 2, the second copper-clad insulating substrate 3, and the circuits are wrapped by the plastic package case 4, so that various protections such as dust prevention and corrosion prevention are performed, and the stability is enhanced.

Therefore, the novel multi-surface heat dissipation power semiconductor module provided by the embodiment adopts a multi-surface heat dissipation mode and a refrigerant embedding mode to dissipate heat, so that the heat dissipation performance is greatly improved, the metal wire bonding is eliminated, the reliability of the power semiconductor module can be improved, the parasitic inductance and the switching loss are reduced, and the switching frequency is conveniently improved.

The above, only be the concrete implementation of the preferred embodiment of the present invention, but the protection scope of the present invention is not limited thereto, and any person skilled in the art is in the technical scope of the present invention, according to the technical solution of the present invention and the utility model, the concept of which is equivalent to replace or change, should be covered within the protection scope of the present invention.

Claims

1. A novel multi-surface heat dissipation power semiconductor module is characterized by comprising:

the circuit comprises a middle transition layer (1), wherein a first end face of the middle transition layer (1) is provided with a first surface circuit (11), a second end face of the middle transition layer (1) is provided with a second surface circuit (12), and a middle transition circuit electrically connected with the first surface circuit (11) and the second surface circuit (12) is arranged in the middle transition layer (1);

the first copper-clad insulating substrate (2), the first copper-clad insulating substrate (2) is arranged on one side of the intermediate transition layer (1), and a first substrate circuit (21) is arranged on the first copper-clad insulating substrate (2) and is electrically connected with the first surface circuit (11);

the second copper-clad insulating substrate (3), the second copper-clad insulating substrate (3) is configured on the other side of the middle transition layer (1), a second substrate circuit (31) is arranged on the second copper-clad insulating substrate (3) and electrically connected with the second surface circuit (12), a refrigerant input port (131) and a refrigerant output port (132) are further arranged on the middle transition layer (1), and cooling is carried out through a refrigerant.

2. The multi-surface heat dissipation power semiconductor module according to claim 1, wherein the first substrate circuit (21) is provided on the first copper clad insulating substrate (2) on a surface facing the first surface circuit (11), and the first substrate circuit (21) and the first surface circuit (11) are electrically connected by soldering; the second substrate circuit (31) is provided on the second copper-clad insulating substrate (3) on a surface facing the second surface circuit (12), and the second substrate circuit (31) and the second surface circuit (12) are electrically connected by soldering.

3. The multi-surface heat dissipation power semiconductor module of claim 2, wherein the first surface circuit (11) includes a plurality of first electrical connection bumps, the first substrate circuit (21) includes a first chip (211) and a second chip (212), and the first surface circuit (11) is directly soldered to the first chip (211) and the second chip (212) through the plurality of first electrical connection bumps.

4. The multi-surface heat dissipation power semiconductor module of claim 3, wherein the second surface circuit (12) includes a plurality of second electrical connection bumps, the second substrate circuit (31) includes a third chip (311) and a fourth chip (312), and the second surface circuit (12) is directly soldered to the third chip (311) and the fourth chip (312) through the plurality of second electrical connection bumps.

5. The multiple surface heat dissipation power semiconductor module of claim 4, wherein the first chip (211) and the third chip (311) are diodes, and the second chip (212) and the fourth chip (312) are IGBTs.

6. The multi-surface heat dissipation power semiconductor module according to claim 5, wherein the first surface circuit (11) comprises a first electrical connection bump a (111), a first electrical connection bump b (112), a first electrical connection bump c (113), a first electrical connection bump d (114), a first electrical connection bump e (115), and a first electrical connection bump f (116), wherein the anode of the first chip (211) is soldered to the first electrical connection bump a (111), the cathode of the first chip (211) is electrically connected to the collector of the second chip (212), the emitter of the second chip (212) is soldered to the first electrical connection bump b (112) and the first electrical connection bump c (113), respectively, and the gate of the second chip (212) is soldered to the first electrical connection bump d (114); the intermediate transition layer (1) is further provided with a first power terminal (141), a second power terminal (142), a first emitter signal terminal (151) and a first gate signal terminal (152), the first electrical connection bump a (111) and the first electrical connection bump b (112) are electrically connected with the second power terminal (142) through the intermediate transition circuit, the first electrical connection bump c (113) is electrically connected with the first emitter signal terminal (151) through the intermediate transition circuit, the first electrical connection bump d (114) is electrically connected with the first gate signal terminal (152) through the intermediate transition circuit, the first electrical connection bump e (115) and the first electrical connection bump f (116) are electrically connected with the first power terminal (141) through the intermediate transition circuit, and the first electrical connection bump e (115) and the first electrical connection bump f (116) are electrically connected with the cathode of the first chip (211) and the second chip (152) 212) Is electrically connected.

7. The multi-surface heat dissipation power semiconductor module according to claim 6, wherein the second surface circuit (12) comprises a second electrical connection bump a (121), a second electrical connection bump b (122), a second electrical connection bump c (123), a second electrical connection bump d (124), a second electrical connection bump e (125) and a second electrical connection bump f (126), the anode of the third chip (311) is soldered to the second electrical connection bump a (121), the cathode of the third chip (311) is electrically connected to the collector of the fourth chip (312), the emitter of the fourth chip (312) is soldered to the second electrical connection bump b (122) and the second electrical connection bump c (123), respectively, and the gate of the fourth chip (312) is soldered to the second electrical connection bump d (124); the middle transition layer (1) is further provided with a third power terminal (143), a second emitter signal terminal (153) and a second gate signal terminal (154), the second electrical connection bump a (121) and the second electrical connection bump b (122) are electrically connected with the third power terminal (143) through the middle transition circuit, the second electrical connection bump c (123) is electrically connected with the second emitter signal terminal (153) through the middle transition circuit, the second electrical connection bump d (124) is electrically connected with the second gate signal terminal (154) through the middle transition circuit, the second electrical connection bump e (125) and the second electrical connection bump f (126) are electrically connected with the second power terminal (142) through the middle transition circuit, and the second electrical connection bump e (125) and the second electrical connection bump f (126) are electrically connected with a cathode of the third chip (311) and a collector of the fourth chip (312).

8. The multi-surface heat dissipation power semiconductor module according to claim 1, wherein the intermediate transition layer (1) is square in shape as a whole, and the coolant inlet (131) and the coolant outlet (132) are respectively disposed at two opposite corners of the intermediate transition layer (1).

9. The multi-surface heat dissipation power semiconductor module according to claim 1, wherein a serpentine refrigerant channel is provided in the intermediate transition layer (1), and both ends of the refrigerant channel are respectively communicated with the refrigerant inlet (131) and the refrigerant outlet (132).

10. The multifaceted heat dissipation power semiconductor module according to claim 1, further comprising a plastic package housing (4), wherein the intermediate transition layer (1), the first copper clad insulating substrate (2) and the second copper clad insulating substrate (3) are wrapped and protected by the plastic package housing (4).