CN217240793U - Multi-channel video data processing device - Google Patents
Multi-channel video data processing device Download PDFInfo
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- CN217240793U CN217240793U CN202220968281.XU CN202220968281U CN217240793U CN 217240793 U CN217240793 U CN 217240793U CN 202220968281 U CN202220968281 U CN 202220968281U CN 217240793 U CN217240793 U CN 217240793U
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Abstract
The utility model discloses a multipath video data processing device, which comprises a video receiving end, a video processing end and a video output end, wherein the video receiving end is used for receiving multipath video data; the video processing end is respectively electrically connected with the video receiving end and the video output end and is used for collecting the multi-path video data received by the video receiving end, processing the multi-path video data and transmitting the processed multi-path video data to the video output end; the video output end is electrically connected with the video processing end and used for receiving the multi-channel video data transmitted by the video processing end and sending the received multi-channel video data to an external display for displaying. The utility model provides a multipath video data processing device, which has simple design and small time delay; the anti-interference capability is strong, and the real-time performance is good.
Description
Technical Field
The utility model relates to a video processing technology field especially discloses a multichannel video data processing apparatus.
Background
In a scene that multiple paths of videos are input simultaneously, the multiple paths of videos need to be received and processed, multiple display devices are often needed in the prior art for displaying multiple paths of signals, and if multiple paths of signals are played on one display device simultaneously, the multiple paths of videos need to be processed simultaneously, so that the problem of poor real-time performance exists in the process of displaying the multiple paths of videos.
Therefore, the above-mentioned drawbacks of the conventional multi-channel video processing are problems to be solved.
SUMMERY OF THE UTILITY MODEL
The utility model provides a multichannel video data processing apparatus aims at solving the technical problem of the above-mentioned defect that exists when current multichannel video processing.
The utility model relates to a multi-path video data processing device, which comprises a video receiving end, a video processing end and a video output end, wherein,
the video receiving end is used for receiving multi-channel video data;
the video processing terminal is respectively electrically connected with the video receiving terminal and the video output terminal and is used for collecting the multi-path video data received by the video receiving terminal, processing the multi-path video data and transmitting the processed multi-path video data to the video output terminal;
the video output end is electrically connected with the video processing end and used for receiving the multi-channel video data transmitted by the video processing end and sending the received multi-channel video data to an external display for displaying.
Further, the video receiving end comprises a serial channel circuit and a video decoding circuit,
the serial channel circuit is electrically connected with the video processing end and is used for converting serial data in the received multi-channel video into parallel data;
the video decoding circuit is electrically connected with the serial channel circuit and is used for decoding the parallel data converted by the serial channel circuit.
Further, the serial channel circuit comprises a video input interface and a video processing module,
the video input interface is used for accessing the multi-channel video serial data;
the video processing module is electrically connected with the video input interface and is used for converting the multi-channel video serial data accessed by the video input interface into parallel data.
Further, the video input interface adopts an HDMI interface.
Furthermore, the video processing module adopts an FPGA chip, and the model of the FPGA chip is JFM7K 325T.
Further, the video decoding circuit comprises a video decoding chip, and the model of the video decoding chip is IT6801 FN.
Furthermore, the video processing end comprises a data buffer used for buffering the parallel data decoded by the video decoding circuit.
Further, the video output terminal comprises a video coding circuit and a video output circuit,
the video coding circuit is electrically connected with the data buffer and is used for coding the parallel data buffered by the data buffer;
the video output circuit is electrically connected with the video coding circuit and is used for transmitting the parallel data coded by the video coding circuit to an external display in a serial mode for displaying.
Further, the video coding circuit comprises a video coding chip, and the model of the video coding chip is A912.
Further, the video output circuit includes a serial transmission module.
The utility model discloses the beneficial effect who gains does:
the utility model provides a multipath video data processing device, which adopts a frequency receiving end, a video processing end and a video output end to receive multipath video data through the video receiving end; the video processing end collects the multi-channel video data received by the video receiving end, processes the multi-channel video data and transmits the processed multi-channel video data to the video output end; the video output end receives the multi-channel video data transmitted by the video processing end and sends the received multi-channel video data to an external display for displaying. The utility model provides a multipath video data processing device which has simple design and small time delay; the anti-interference capability is strong, and the real-time performance is good.
Drawings
Fig. 1 is a functional block diagram of an embodiment of a multi-channel video data processing apparatus provided by the present invention;
FIG. 2 is a functional block diagram of an embodiment of the video receiving end shown in FIG. 1;
FIG. 3 is a functional block diagram of one embodiment of the serial channel circuit shown in FIG. 2;
FIG. 4 is a functional block diagram of an embodiment of the video processing terminal shown in FIG. 1;
fig. 5 is a functional block diagram of an embodiment of the video output terminal shown in fig. 1.
The reference numbers illustrate:
10. a video receiving end; 20. a video processing terminal; 30. a video output terminal; 11. a serial channel circuit; 12. a video decoding circuit; 111. a video input interface; 112. a video processing module; 21. a data buffer; 31. a video encoding circuit; 32. and a video output circuit.
Detailed Description
In order to better understand the technical solution, the technical solution will be described in detail with reference to the drawings and the specific embodiments.
As shown in fig. 1 and fig. 2, a first embodiment of the present invention provides a multi-channel video data processing apparatus, which includes a video receiving end 10, a video processing end 20, and a video output end 30, wherein the video receiving end 10 is configured to receive multi-channel video data; the video processing terminal 20 is electrically connected to the video receiving terminal 10 and the video output terminal 30, and is configured to collect multiple paths of video data received by the video receiving terminal 10, process the multiple paths of video data, and transmit the processed multiple paths of video data to the video output terminal 30; the video output terminal 30 is electrically connected to the video processing terminal 20, and is configured to receive multiple paths of video data transmitted from the video processing terminal 20, and send the received multiple paths of video data to an external display for displaying.
Further, please refer to fig. 2, fig. 2 is a functional block diagram of an embodiment of the video receiving end shown in fig. 1, in this embodiment, the video receiving end 10 includes a serial channel circuit 11 and a video decoding circuit 12, where the serial channel circuit 11 is electrically connected to the video processing end 20 for converting serial data in multiple received videos into parallel data; the video decoding circuit 12 is electrically connected to the serial channel circuit 11, and decodes the parallel data converted by the serial channel circuit 11. Specifically, the video decoding circuit 12 includes a video decoding chip, and the model number adopted by the video decoding chip is IT6801 FN. The multi-channel video data processing device provided by the embodiment converts serial data in a received multi-channel video into parallel data through the serial channel circuit 11, and then decodes the parallel data converted by the serial channel circuit 11 through the video decoding circuit 12, so that the circuit design is simple, and the time delay is small; the anti-interference capability is strong, and the real-time performance is good.
Preferably, referring to fig. 3, fig. 3 is a functional block diagram of an embodiment of the serial channel circuit shown in fig. 2, in this embodiment, the serial channel circuit 11 includes a video input interface 111 and a video processing module 112, where the video input interface 111 is used for accessing multiple channels of video serial data; the video processing module 112 is electrically connected to the video input interface 111, and is configured to convert the multiple channels of video serial data accessed by the video input interface 111 into parallel data. Specifically, the video input interface 111 employs an HDMI interface. The video processing module 112 adopts an FPGA chip, and the model number of the FPGA chip is JFM7K 325T. The multi-channel video data processing device provided by the embodiment accesses the multi-channel video serial data through the video input interface 111, and then converts the multi-channel video serial data accessed by the video input interface 111 into parallel data through the video processing module 112, so that the circuit design is simple, and the time delay is small; the anti-interference capability is strong, and the real-time performance is good.
Further, referring to fig. 4, fig. 4 is a functional block diagram of an embodiment of the video processing terminal shown in fig. 1, in this embodiment, the video processing terminal 20 includes a data buffer 21, and the data buffer 21 is used for buffering parallel data decoded by the video decoding circuit 12. The multi-channel video data processing device provided by the embodiment buffers the parallel data decoded by the video decoding circuit 12 through the data buffer 21, and has simple circuit design and small time delay; the anti-interference capability is strong, and the real-time performance is good.
Preferably, please refer to fig. 5, fig. 5 is a functional block diagram of an embodiment of the video output terminal shown in fig. 1, in this embodiment, the video output terminal 30 includes a video encoding circuit 31 and a video output circuit 32, wherein the video encoding circuit 31 is electrically connected to the data buffer 21 and is configured to encode the parallel data buffered by the data buffer 21; the video output circuit 32 is electrically connected to the video encoding circuit 31, and is configured to transmit the parallel data encoded by the video encoding circuit 31 to an external display in a serial manner for display. Specifically, the video encoding circuit 31 includes a video encoding chip, and the model of the video encoding chip is a 912. The video output circuit 32 includes a serial transmission module. In the multi-channel video data processing apparatus provided in this embodiment, the video encoding circuit 31 encodes the parallel data buffered by the data buffer 21, and the video output circuit 32 sends the parallel data encoded by the video encoding circuit 31 to the external display in a serial manner for display, so that the circuit design is simple and the delay is small; the anti-interference capability is strong, and the real-time performance is good.
As shown in fig. 1 to fig. 5, the multi-channel video data processing apparatus provided in this embodiment operates according to the following principle:
the HDMI interfaces access a plurality of paths of video serial data, and the FPGA chip JFM7K325T converts the plurality of paths of video serial data accessed by the HDMI interfaces into parallel data. The video decoding chip IT6801FN decodes the parallel data converted by the FPGA chip JFM7K 325T. The data buffer 21 buffers the parallel data decoded by the video decoding chip IT6801 FN. The video coding chip a912 codes the parallel data buffered by the data buffer 21; the serial transmission module transmits the parallel data coded by the video coding chip A912 to an external display in a serial mode for displaying.
Compared with the prior art, the multi-channel video data processing device provided by the embodiment adopts a frequency receiving end, a video processing end and a video output end, and receives multi-channel video data through the video receiving end; the video processing end collects the multi-channel video data received by the video receiving end, processes the multi-channel video data and transmits the processed multi-channel video data to the video output end; the video output end receives the multi-channel video data transmitted by the video processing end and sends the received multi-channel video data to an external display for displaying. The multi-channel video data processing device provided by the embodiment has the advantages of simple design and small time delay; the anti-interference capability is strong, and the real-time performance is good.
While the preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. It is therefore intended that the appended claims be interpreted as including the preferred embodiment and all such alterations and modifications as fall within the scope of the invention. It will be apparent to those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (10)
1. A multi-channel video data processing apparatus, comprising a video receiving terminal (10), a video processing terminal (20) and a video output terminal (30), wherein,
the video receiving end (10) is used for receiving multi-channel video data;
the video processing terminal (20) is electrically connected with the video receiving terminal (10) and the video output terminal (30) respectively, and is used for collecting multiple paths of video data received by the video receiving terminal (10), processing the multiple paths of video data, and transmitting the processed multiple paths of video data to the video output terminal (30);
the video output end (30) is electrically connected with the video processing end (20) and is used for receiving the multi-channel video data transmitted by the video processing end (20) and sending the received multi-channel video data to an external display for displaying.
2. The multi-channel video data processing apparatus according to claim 1, wherein said video receiving terminal (10) includes a serial channel circuit (11) and a video decoding circuit (12),
the serial channel circuit (11) is electrically connected with the video processing terminal (20) and is used for converting serial data in the received multipath video into parallel data;
the video decoding circuit (12) is electrically connected with the serial channel circuit (11) and is used for decoding the parallel data converted by the serial channel circuit (11).
3. The multi-channel video data processing apparatus according to claim 2, wherein said serial channel circuit (11) comprises a video input interface (111) and a video processing module (112),
the video input interface (111) is used for accessing a plurality of paths of video serial data;
the video processing module (112) is electrically connected with the video input interface (111) and is used for converting the multi-channel video serial data accessed by the video input interface (111) into parallel data.
4. The multiplexed video data processing apparatus according to claim 3, wherein the video input interface (111) employs an HDMI interface.
5. The multi-channel video data processing apparatus according to claim 3, wherein the video processing module (112) is an FPGA chip having a model number of JFM7K 325T.
6. The multi-channel video data processing apparatus according to claim 2, wherein said video decoding circuit (12) includes a video decoding chip having a model number IT6801 FN.
7. The multiple video data processing apparatus according to claim 2, wherein said video processing terminal (20) comprises a data buffer (21), said data buffer (21) being configured to buffer parallel data decoded by said video decoding circuit (12).
8. The multi-channel video data processing apparatus according to claim 7, wherein said video output terminal (30) includes a video encoding circuit (31) and a video output circuit (32),
the video coding circuit (31) is electrically connected with the data buffer (21) and is used for coding the parallel data buffered by the data buffer (21);
the video output circuit (32) is electrically connected with the video coding circuit (31) and is used for transmitting the parallel data coded by the video coding circuit (31) to an external display for displaying in a serial mode.
9. The multi-channel video data processing apparatus according to claim 8, wherein said video coding circuit (31) comprises a video coding chip, said video coding chip having a model number of a 912.
10. The multi-channel video data processing apparatus as claimed in claim 8, wherein said video output circuit (32) includes a serial transmission module.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202220968281.XU CN217240793U (en) | 2022-04-25 | 2022-04-25 | Multi-channel video data processing device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202220968281.XU CN217240793U (en) | 2022-04-25 | 2022-04-25 | Multi-channel video data processing device |
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| CN217240793U true CN217240793U (en) | 2022-08-19 |
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| CN202220968281.XU Active CN217240793U (en) | 2022-04-25 | 2022-04-25 | Multi-channel video data processing device |
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