CN218041574U - High-definition video signal transmission system - Google Patents
High-definition video signal transmission system Download PDFInfo
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- CN218041574U CN218041574U CN202221623870.0U CN202221623870U CN218041574U CN 218041574 U CN218041574 U CN 218041574U CN 202221623870 U CN202221623870 U CN 202221623870U CN 218041574 U CN218041574 U CN 218041574U
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Abstract
The application discloses high definition video signal transmission system includes: the SDI interface, the network interface, signal conditioning circuit, receiving and dispatching switching circuit, data processing module, the SDI interface is used for transmitting high definition digital signal, the network interface is used for transmitting network video signal, signal conditioning circuit connects the SDI interface, signal conditioning circuit is used for adjusting high definition digital signal, receiving and dispatching switching circuit connects signal conditioning circuit, receiving and dispatching switching circuit is arranged in control signal conditioning circuit high definition digital signal's signal flow direction, data processing module connects signal conditioning circuit, data processing module is used for carrying out interconversion to high definition digital signal and network video signal according to the signal flow direction. Through setting up data processing module, can carry out interconversion with high definition digital signal and network video signal, network video signal can transmit through the internet to reduce the cost of transmission video signal, and can greatly increased transmission distance.
Description
Technical Field
The application relates to the technical field of video signal transmission, in particular to a high-definition video signal transmission system.
Background
An SDI (Serial Digital Interface) Interface is an Interface that sequentially transfers each bit of a data word and corresponding data through a single channel, and can be used to transmit high definition video signals. However, when the video signal is transmitted by using the SDI, a dedicated wire is required to transmit the video signal, which results in higher cost and limited transmission distance for transmitting the video signal.
SUMMERY OF THE UTILITY MODEL
The present application is directed to solving at least one of the problems in the prior art. Therefore, the application provides a high-definition video signal transmission system which can reduce the cost of transmitting video signals and increase the transmission distance.
According to the embodiment of the first aspect of the application, the high definition video signal transmission system comprises: the SDI interface is used for transmitting high-definition digital signals; the network interface is used for transmitting network video signals; the signal conditioning circuit is connected with the SDI interface and is used for adjusting the high-definition digital signal; the receiving and transmitting switching circuit is connected with the signal conditioning circuit and is used for controlling the signal flow direction of the high-definition digital signal in the signal conditioning circuit; the data processing module is connected with the signal conditioning circuit and used for performing mutual conversion on the high-definition digital signal and the network video signal according to the signal flow direction.
According to the embodiment of the application, the high-definition video signal transmission system at least has the following beneficial effects: through setting up data processing module, can carry out interconversion with high definition digital signal and network video signal, network video signal can transmit through the internet to reduce the cost of transmission video signal, and can greatly increased transmission distance. And through setting up receiving and dispatching switching module, can make high definition video signal transmission system receive or send high definition digital signal, satisfy different user's user demand.
According to some embodiments of the present application, the high definition video signal transmission system further comprises: and the time sequence synchronous circuit is connected with the data processing module and is used for generating an internal synchronous signal with the same frequency as an external synchronous signal.
According to some embodiments of the application, the timing synchronization circuit comprises: the digital-to-analog converter is connected with the data processing module and used for receiving a frequency control signal, the digital-to-analog converter is used for generating a voltage control signal according to the frequency control signal, the voltage control crystal oscillator is connected with the digital-to-analog converter, and the voltage control crystal oscillator is used for generating the internal synchronization signal according to the voltage control signal.
According to some embodiments of the application, the data processing module comprises: the SDI decoding unit is connected with the signal conditioning circuit and used for decoding the high-definition digital signals to obtain decoded signals, the data compression unit is connected with the SDI decoding unit and used for compressing the decoded signals to obtain compressed signals, and the protocol conversion unit is connected with the data compression unit and used for converting the compressed signals into network video signals.
According to some embodiments of the present application, the data compression unit is an h.265 encoder and the protocol conversion unit is an RTP conversion unit.
According to some embodiments of the application, the data processing module further comprises: the SDI coding unit is connected with the data decompression unit and is used for converting the decompressed signal into the high-definition digital signal.
According to some embodiments of the application, the data processing module comprises: the central processing unit is connected with the field programmable logic gate array, and the field programmable logic gate array is respectively connected with the SDI interface and the network interface.
According to some embodiments of the application, the data processing module further comprises: the first memory is connected with the central processing unit, and the second memory is connected with the field programmable gate array.
According to some embodiments of the application, the central processor is connected with the field programmable gate array through a bus interface.
According to some embodiments of the application, the central processor is integrated in the same chip as the field programmable gate array.
Additional aspects and advantages of the present application will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the present application.
Drawings
The present application is further described with reference to the following figures and examples, in which:
fig. 1 is a block diagram of a high definition video signal transmission system according to an embodiment of the present application;
fig. 2 is a block diagram of a high definition video signal transmission system according to another embodiment of the present application;
FIG. 3 is a block diagram of a timing synchronization circuit according to an embodiment of the present application;
FIG. 4 is a block diagram of a data processing module according to an embodiment of the present application;
FIG. 5 is a block diagram of a data processing module according to another embodiment of the present application;
fig. 6 is a schematic structural diagram of a data processing module according to an embodiment of the present application.
Reference numerals:
the SDI interface 100, the network interface 200, the signal conditioning circuit 300 and the receiving and transmitting switching circuit 400;
the data processing module 500, the timing synchronization circuit 600, the SDI decoding unit 510 and the data compression unit 520;
a protocol conversion unit 530, an SDI encoding unit 540, a data decompression unit 550, a central processing unit 501;
a field programmable gate array 502, a first memory 503, a second memory 504, a digital-to-analog converter 610;
the voltage controlled crystal oscillator 620.
Detailed Description
Reference will now be made in detail to embodiments of the present application, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative and are only for the purpose of explaining the present application and are not to be construed as limiting the present application.
In the description of the present application, it should be understood that the positional descriptions referred to, for example, the directions or positional relationships indicated by upper, lower, front, rear, left, right, etc., are based on the directions or positional relationships shown in the drawings, and are only for convenience of description and simplification of the description, but do not indicate or imply that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and thus, should not be construed as limiting the present application.
In the description of the present application, the meaning of a plurality is one or more, the meaning of a plurality is two or more, and the above, below, exceeding, etc. are understood as excluding the present number, and the above, below, within, etc. are understood as including the present number. If the first and second are described for the purpose of distinguishing technical features, they are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated or implicitly indicating the precedence of the technical features indicated.
In the description of the present application, unless otherwise specifically limited, terms such as set, installed, connected and the like should be understood broadly, and those skilled in the art can reasonably determine the specific meanings of the above terms in the present application in combination with the specific contents of the technical solutions.
Some embodiments, referring to fig. 1, the present application provides a high definition video signal transmission system, including: the SDI interface 100 is used for transmitting high-definition digital signals; the network interface 200 is used for transmitting network video signals; the signal conditioning circuit 300 is connected with the SDI interface 100, and the signal conditioning circuit 300 is used for adjusting the high-definition digital signal; the transceiving switching circuit 400 is connected to the signal conditioning circuit 300, and the transceiving switching circuit 400 is used for controlling the signal flow direction of the high-definition digital signal in the signal conditioning circuit 300; the data processing module 500 is connected to the signal conditioning circuit 300, and the data processing module 500 is configured to perform interconversion between the high-definition digital signal and the network video signal according to a signal flow direction.
In this embodiment, the high-definition digital signal transmitted by the SDI interface 100 is an uncompressed digital component video signal and a digital audio signal, and the SDI interface 100 may be connected to a video camera that transmits the high-definition digital signal or a display device that receives the high-definition digital signal. The network interface 200 is used to connect a network switching device, which is connected to the internet or a local area network via an optical fiber or a network cable, so as to remotely transmit a network video signal.
Since the signal level of the high-definition digital signal transmitted by the SDI interface 100 is different from the signal level of the data processing module 500 and cannot be directly docked, the signal processing module 500 can recognize and process the high-definition digital signal by setting the signal conditioning circuit 300 and performing processing such as shaping, filtering and level conversion on the signal. Since the physical layer of the SDI interface 100 is half-duplex and only supports one-way signal transmission at the same time, the transmit-receive switching circuit 400 is arranged to control the signal flow direction of the high-definition digital signal, that is, the SDI interface 100 outputs or receives the high-definition digital signal.
The data processing module 500 may perform interconversion between the high-definition digital signal and the network video signal, for example, decode and compress the high-definition digital signal and convert the high-definition digital signal into the network video signal; or the network video signal is decompressed and coded and then converted into a high-definition digital signal. Because the network video signal can be transmitted through the internet or the local area network, the network transmission equipment has wide application, has the advantages of low purchase cost, low price of relay equipment, long-distance deployment and the like, can reduce the cost of transmitting the video signal, and can greatly increase the transmission distance.
Some embodiments, referring to fig. 2, the high definition video signal transmission system proposed by the present application further includes: the timing synchronization circuit 600, the timing synchronization circuit 600 is connected to the data processing module 500, and the timing synchronization circuit 600 is used for generating an internal synchronization signal having the same frequency as an external synchronization signal. When the high-definition video signal transmission system transmits a high-definition video signal through the SDI interface 100, an external synchronization signal sent by external equipment needs to be received, so that the clock frequency of the high-definition video signal transmission system is the same as that of the external equipment, and the function of data transmission is completed. However, since the data transmission is affected when the external synchronization signal is lost, the internal synchronization signal having the same frequency as the external synchronization signal is actively generated by providing the timing synchronization circuit 600, and the data transmission is not affected when the external synchronization signal is lost.
Some embodiments, referring to fig. 3, a timing synchronization circuit 600 includes: the digital-to-analog converter 610 is connected to the data processing module 500 and is configured to receive the frequency control signal, the digital-to-analog converter 610 is configured to generate a voltage control signal according to the frequency control signal, the voltage-controlled crystal oscillator 620 is connected to the digital-to-analog converter 610, and the voltage-controlled crystal oscillator 620 is configured to generate an internal synchronization signal according to the voltage control signal. The data processing module 500 receives an external synchronization signal during data transmission, and the data processing module 500 generates a corresponding frequency control signal according to the frequency of the external synchronization signal. Since the frequency control signal output by the data processing module 500 is a digital signal, the digital-to-analog converter 610 is required to convert the corresponding digital signal into an analog signal, i.e., a voltage control signal. The vco 620 may generate an internal synchronization signal having the same frequency as the external synchronization signal by receiving a corresponding voltage control signal. It will be appreciated that the data processing module 500 may provide a clock signal at start-up via a built-in crystal or an externally connected local crystal.
Some embodiments, referring to fig. 4, the data processing module 500 includes: the SDI decoding unit 510 is connected with the signal conditioning circuit 300 and used for decoding high-definition digital signals to obtain decoded signals, the data compression unit 520 is connected with the SDI decoding unit 510 and used for compressing the decoded signals to obtain compressed signals, and the protocol conversion unit 530 is connected with the data compression unit 520 and used for converting the compressed signals into network video signals. When a high-definition digital signal needs to be converted into a network video signal, the transceiving switching module switches the data direction of the SDI interface 100 to a receiving state, the corresponding signal conditioning circuit 300 is an equalizer, and the high-definition digital signal needs to be transmitted in a long distance before being received, so that the signal conditioning circuit 300 needs to adjust the electrical signal amplification amount of various frequency components, thereby restoring the signal and enabling the signal to be correctly identified by the data processing module 500. The signal flow direction of the high definition digital signal in the signal conditioning circuit 300 is from the SDI interface 100 to the data processing module 500.
After receiving the high-definition digital signal, the data processing module 500 first decodes the high-definition digital signal through the SDI decoding unit 510 to convert information such as pixels and blanking in the high-definition digital signal into digital information, so as to obtain a decoded signal. The storage space occupied by the digital information in the decoded signal is large, and in order to improve the storage and transmission efficiency, the data compression unit 520 is adopted to compress the decoded signal. In some embodiments, the data compression unit 520 is an h.265 encoder. H.265 is a video coding standard that can transmit higher quality video information with limited bandwidth. In some other embodiments, the data compression unit 520 may also compress the decoded signal by using an encoding compression method such as h.264. The specific compression method is known to those skilled in the art, and is not described in detail herein.
After the compressed signal is obtained by the data compression unit 520, the compressed signal needs to be converted into a network video signal capable of network transmission by the protocol conversion unit 530. In some embodiments, protocol conversion unit 530 is an RTP conversion unit. RTP (Real-time Transport Protocol) is a network Transport Protocol, which specifies a standard data packet format for transmitting audio and video over the internet, and converts a compressed signal to perform network transmission through a network device.
Some embodiments, referring to fig. 5, the data processing module 500 further comprises: the SDI coding unit 540 and the data decompression unit 550, the protocol conversion unit 530 is connected to the network interface 200 and is used for converting the network video signal into a signal to be decompressed, the data decompression unit 550 is connected to the protocol conversion unit 530 and is used for decompressing the signal to be decompressed to obtain a decompressed signal, and the SDI coding unit 540 is connected to the data decompression unit 550 and is used for converting the decompressed signal into a high-definition digital signal. When the network video signal needs to be converted into the high-definition digital signal, the transceiving switching module switches the data direction of the SDI interface 100 to a sending state, the corresponding signal conditioning circuit 300 is a driver, and the high-definition digital signal has a certain requirement on the transmission distance when being sent, so that the signal conditioning circuit 300 needs to increase the transmission power of the high-definition digital signal. The signal flow direction of the high definition digital signal in the signal conditioning circuit 300 is from the data processing module 500 to the SDI interface 100.
After receiving the network video signal through the network interface 200, the data processing module 500 first converts the network video signal into a signal to be decompressed through the protocol conversion unit. It is understood that the protocol conversion unit 530 may be an RTP conversion unit. The signal to be decompressed is then decompressed by the data decompression unit 550 to obtain a decompressed signal. It will be appreciated that the data compression unit 520 is of the same type as the data decompression unit 550, e.g., when the data compression unit 520 is an h.265 encoder, the corresponding data decompression unit 550 is an h.265 decoder. And finally, the decompressed signal is encoded by an SDI encoding unit 540 to obtain a corresponding high-definition digital signal. It can be understood that the process of converting the network video signal into the high-definition digital signal is the inverse process of converting the high-definition digital signal into the network video signal, and the specific decompression manner thereof is known to those skilled in the art, and is not described herein again.
Some embodiments, referring to fig. 6, the data processing module 500 comprises: a central processing unit 501 and a field programmable logic gate array 502, wherein the central processing unit 501 is connected with the field programmable logic gate array 502, and the field programmable logic gate array 502 is respectively connected with the SDI interface 100 and the network interface 200. In the embodiment of the present application, the functions implemented by the data Processing module 500 in the above embodiments are completed by using a Central Processing Unit (CPU) and a Field Programmable Gate Array (FPGA). The central processing unit 501 is mainly responsible for the functions of setting system parameters, user interaction and the like, and the field programmable gate array 502 is mainly responsible for the functions of data processing, protocol conversion and the like. In some other embodiments, the high definition digital signal may be encoded and decoded using an SDI chip, compressed and decompressed using a codec processor chip, and protocol converted using a protocol converter.
In some embodiments, the data processing module 500 further comprises: a first memory 503 and a second memory 504, wherein the first memory 503 is connected with the central processing unit 501, and the second memory 504 is connected with the field programmable gate array 502. According to the difference of network quality and data compression rate, the data transmission rate of the network port, the SDI interface rate and the processing rate of the FPGA are not matched, so that data buffering is performed by respectively adding the first memory 503 and the second memory 504 for storing video data which is not converted in time. In some embodiments, the central processor 501 is connected to the field programmable gate array 502 via a bus interface. The central processing unit 501 and the field programmable gate array 502 are two different chips respectively, and are in communication connection through a CPU bus. In some embodiments, the central processing unit 501 and the field programmable gate array 502 are integrated in the same chip, which is a heterogeneous chip, and the hardware composition is simpler and more compact and more miniaturized by integrating the central processing unit 501 and the field programmable gate array 502.
In the description of the present application, reference to the description of the terms "one embodiment," "some embodiments," "an illustrative embodiment," "an example," "a specific example," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present application. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The embodiments of the present application have been described in detail with reference to the drawings, but the present application is not limited to the embodiments, and various changes can be made within the knowledge of those skilled in the art without departing from the gist of the present application. Furthermore, the embodiments and features of the embodiments of the present application may be combined with each other without conflict.
Claims (10)
1. High definition video signal transmission system, its characterized in that includes:
the SDI interface is used for transmitting high-definition digital signals;
a network interface for transmitting a network video signal;
the signal conditioning circuit is connected with the SDI interface and is used for adjusting the high-definition digital signal;
the receiving and transmitting switching circuit is connected with the signal conditioning circuit and is used for controlling the signal flow direction of the high-definition digital signal in the signal conditioning circuit;
and the data processing module is connected with the signal conditioning circuit and is used for performing mutual conversion on the high-definition digital signal and the network video signal according to the signal flow direction.
2. The high definition video signal transmission system as claimed in claim 1, further comprising: and the time sequence synchronous circuit is connected with the data processing module and is used for generating an internal synchronous signal with the same frequency as an external synchronous signal.
3. The high definition video signal transmission system as claimed in claim 2, wherein said timing synchronization circuit comprises: the digital-to-analog converter is connected with the data processing module and used for receiving a frequency control signal, the digital-to-analog converter is used for generating a voltage control signal according to the frequency control signal, the voltage control crystal oscillator is connected with the digital-to-analog converter, and the voltage control crystal oscillator is used for generating the internal synchronization signal according to the voltage control signal.
4. The high definition video signal transmission system according to claim 1, wherein the data processing module comprises: the SDI decoding unit is connected with the signal conditioning circuit and used for decoding the high-definition digital signals to obtain decoded signals, the data compression unit is connected with the SDI decoding unit and used for compressing the decoded signals to obtain compressed signals, and the protocol conversion unit is connected with the data compression unit and used for converting the compressed signals into network video signals.
5. The high definition video signal transmission system according to claim 4, wherein said data compression unit is an H.265 encoder and said protocol conversion unit is an RTP conversion unit.
6. The high definition video signal transmission system according to claim 4, wherein said data processing module further comprises: the SDI coding unit is connected with the data decompression unit and used for converting the decompressed signals into the high-definition digital signals.
7. The high definition video signal transmission system according to any one of claims 1 to 6, wherein the data processing module comprises: the central processing unit is connected with the field programmable logic gate array, and the field programmable logic gate array is respectively connected with the SDI interface and the network interface.
8. The high definition video signal transmission system of claim 7 wherein said data processing module further comprises: the first memory is connected with the central processing unit, and the second memory is connected with the field programmable gate array.
9. The high definition video signal transmission system according to claim 7, wherein said central processing unit is connected to said field programmable gate array through a bus interface.
10. The high definition video signal transmission system according to claim 7 wherein said central processing unit is integrated in the same chip as said field programmable gate array.
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