CN217181426U

CN217181426U - Control system and electronic device

Info

Publication number: CN217181426U
Application number: CN202220511623.5U
Authority: CN
Inventors: 刘绿山; 张震; 毛浩翔
Original assignee: Huizhou Research Control Automation Technology Co Ltd
Current assignee: Huizhou Research Control Automation Technology Co Ltd
Priority date: 2022-03-07
Filing date: 2022-03-07
Publication date: 2022-08-12
Anticipated expiration: 2032-03-07

Abstract

The utility model discloses a control system and electronic equipment, the technical scheme of the utility model is that a control mainboard is arranged, and the control mainboard is provided with a man-machine interface and a power circuit; the control main board is also provided with an ARM, the ARM is electrically connected with the human-computer interface, and the ARM is used for generating a corresponding control driving signal and sending the control driving signal to the FPGA when receiving a human-computer control signal; the control main board is also provided with an FPGA, the FPGA is electrically connected with the ARM, and the FPGA controls an external motor through the power circuit when receiving a control driving signal transmitted by the ARM. The utility model discloses control system's reliability, stability and availability factor can be improved.

Description

Control system and electronic device

Technical Field

The utility model relates to an industrial control technical field, in particular to control system and electronic equipment.

Background

With the continuous expansion of the market application range, the requirements of users on miniaturization and cost are higher and higher, the requirements of users on the solution of the whole system are highlighted, and the traditional single industrial control system is difficult to meet the requirements.

Most of the existing control systems are composed of an upper computer, a controller, a driver, a motor and load equipment. In addition, the devices required by the existing control system are mainly single products, such as a PLC, a frequency converter, a servo and the like, which are scattered, and since the control of the load device needs to be realized by controlling a driver driving motor by a controller, no matter communication or interaction, a certain resource loss and external interference are generated between the controller and the driver, so that the control effect of the whole system is reduced.

SUMMERY OF THE UTILITY MODEL

The utility model aims at providing a control system and electronic equipment aims at improving industrial control system and electronic equipment's control efficiency.

To achieve the above object, the present invention provides a control system, which comprises:

the control mainboard is provided with a human-computer interface and a power circuit;

the ARM is arranged on the control mainboard and is electrically connected with the human-computer interface, and the ARM is used for generating a corresponding control driving signal when receiving a human-computer control signal;

the FPGA is arranged on the control mainboard and is electrically connected with the ARM and the power circuit, and when the FPGA receives a control driving signal transmitted by the ARM, the FPGA controls an external motor through the power circuit.

Optionally, the ARM has a dual core architecture.

Optionally, the control system further includes a memory, and the memory is disposed on the control motherboard and electrically connected to the ARM.

Optionally, the control system further includes a power supply assembly, configured to access an ac power supply and convert the accessed ac power supply into a dc power supply for output;

the control mainboard, the ARM, the FPGA and the power supply assembly are respectively and electrically connected.

Optionally, the control system further includes an expansion component interface and an Ethercat interface, the Ethercat interface is disposed on the control motherboard, and the Ethercat interface is electrically connected to the ARM and the expansion component interface respectively.

Optionally, the motor has a power line, an encoder interface and an encoder, and the encoder interface is electrically connected to the encoder and the power circuit, respectively.

Optionally, the control system further includes a motor encoder interface, the motor encoder interface is disposed on the control motherboard, and the motor encoder interface is electrically connected to the plurality of encoder interfaces respectively.

Optionally, the control system further includes an auxiliary circuit, the auxiliary circuit is electrically connected to the plurality of motors, the power circuit and the FPGA, and the auxiliary circuit is one or more of a power amplification circuit, a motor current feedback circuit, a bus voltage detection circuit and a backup power supply.

Optionally, the control main board is further provided with an ethernet interface, an RS232 interface, and a USB interface.

The utility model also provides an electronic equipment, electronic equipment includes foretell control system.

The technical scheme of the utility model is that a control mainboard is arranged, and the control mainboard is provided with a human-computer interface and a power circuit; the control main board is also provided with an ARM, the ARM is electrically connected with the human-computer interface, and the ARM is used for generating a corresponding control driving signal and sending the control driving signal to the FPGA when receiving a human-computer control signal; the control main board is also provided with an FPGA, the FPGA is electrically connected with the ARM, and the FPGA controls an external motor through the power circuit when receiving a control driving signal transmitted by the ARM. The utility model realizes the control driving function which needs the driving board and the control board to be carried out together on one control mainboard, which not only can miniaturize the industrial control mainboard, but also can generate certain resource loss and external interference between the controller and the driver in the prior art no matter communication or interaction, thereby reducing the control effect of the whole system; after the driving and controlling integrated controller is adopted, the data volume needing communication transmission originally only needs to be subjected to variable exchange inside, so that the reliability, stability and use efficiency of the system can be greatly improved.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.

Fig. 1 is a schematic structural diagram of a control system according to an embodiment of the present invention.

The reference numbers illustrate:

reference numerals	Name(s)	Reference numerals	Name (R)
				10	Human-machine interface	70	Second network interface
20	ARM	80	Power supply assembly
				30	FPGA	90	Auxiliary circuit
40	Memory device
				51	USB interface
52	RS232 interface
				53	Ethernet interface
54	Ethercat interface
				60	Motor encoder interface

The objects, features and advantages of the present invention will be further described with reference to the accompanying drawings.

Detailed Description

The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.

It should be noted that, if directional indications (such as upper, lower, left, right, front and rear … …) are involved in the embodiment of the present invention, the directional indications are only used to explain the relative position relationship between the components, the motion situation, etc. in a specific posture (as shown in the drawings), and if the specific posture is changed, the directional indications are changed accordingly.

In addition, if there is a description relating to "first", "second", etc. in the embodiments of the present invention, the description of "first", "second", etc. is for descriptive purposes only and is not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions in the embodiments may be combined with each other, but it must be based on the realization of those skilled in the art, and when the technical solutions are contradictory or cannot be realized, the combination of the technical solutions should not be considered to exist, and is not within the protection scope of the present invention.

The utility model provides a control system.

Referring to fig. 1, in one embodiment, the control system includes a control motherboard having a human-machine interface 10, a power circuit 70;

the ARM20 is arranged on the control main board and electrically connected with the human-computer interface 10, and the ARM20 is used for generating a corresponding control driving signal when receiving a human-computer control signal;

the FPGA30 is arranged on the control mainboard, the FPGA30 is electrically connected with the ARM20 and the power circuit 70, and the FPGA30 controls an external motor through the power circuit 70 when receiving a control driving signal transmitted by the ARM 20.

In this embodiment, the control main board is provided with a human-machine interface 10 and a power circuit 70, and the control main board receives instructions through the human-machine interface 10 and controls an external motor through the power circuit 70. The human-machine interface 10 is used for interfacing input/output devices for establishing contact between a person and a computer and exchanging information, including a keyboard, a display, a mouse, etc., for example: the human-machine interface 10 may be a touch screen interface providing a friendly human-machine interaction interface.

The power circuit 70 is configured to output a relatively large power to the motor, that is, when the FPGA30 receives a control driving signal, the FPGA30 converts the control driving signal into a motor driving signal and sends the motor driving signal to the power circuit 70, and the power circuit 70 supplies power to the external motor, that is, one end of the power circuit 70 is connected to the external motor, and the other end of the power circuit is connected to the FPGA 30.

The control system further comprises an ARM20, wherein the ARM20 is arranged on the control mainboard, namely an ARM processor, and the ARM is used for human-computer interaction and control algorithm realization; the ARM20 is electrically connected to the human-machine interface 10, and the human-machine interface 10 may be externally connected to a user interaction circuit, and receive a human-machine control signal, such as a display signal, a key signal, and the like, and may also be used to output a signal, such as a display signal; in an embodiment, the human-machine interface 10 may be an HDMI interface, which implements interface communication of a human-machine interface or a PC display, and the physical form of the interface is HDMI-Type a, and when the ARM20 receives a human-machine control signal, the human-machine control signal is processed and analyzed to obtain a control driving signal, and the control driving signal is used for controlling a driving load.

For example, the human-machine interface 10 is connected to an external button input, when a user presses a certain button, and after receiving a key signal through the human-machine interface 10, the ARM20 determines that a human-machine control signal corresponding to the pressed button is a start motor, and then there may be a plurality of instructions corresponding to the start motor, for example, the ARM20 may send an instruction to an external IO module to light a green light, indicating that the start is already performed.

The control system further comprises an FPGA30(Field-Programmable Gate Array), namely a Field-Programmable Gate Array, the FPGA30 is arranged on the control mainboard, is electrically connected with the ARM20, and is mainly used for generating a motor driving signal when receiving a control driving signal transmitted by the ARM20, and controlling an external motor through the power circuit. The FPGA30 is responsible for power circuit control and also for controlling the logic functions of the pulse generator, IO output and encoder count implementation. And the FPGA realizes the control of a position loop, a speed loop and a current loop of the motor.

The utility model discloses a set up the control mainboard to set up human-machine interface 10, power circuit 70, ARM20, FPGA30 on the control mainboard, when ARM20 received the human-machine control signal of human-machine interface 10 transmission, the control drive signal that generates to correspond gives FPGA30, and FPGA30 is when receiving the control drive signal that ARM20 transmitted and come, through power circuit 70 controls external motor. Therefore, when the original controller and the driver are respectively located on the two control main boards, after receiving the triggering instruction, the ARM20 of the controller will convert into a control signal and send the control signal to the controller FPGA30, and the FPGA30 of the controller will send some instructions to the FPGA30 of the driver, for example: pulse processing signal, and through the utility model discloses an after the improvement, now need not two control mainboards, FPGA30 direct processing on a control mainboard comes out can the control motor the signal, through the utility model discloses a control system realizes the control to external motor and other loads for data interchange is faster, and the data volume that originally need communicate transmission between controller and driver only needs now to carry out the variable exchange in inside, just so can by a wide margin lifting system's reliability, stability and availability factor, and shorten to the control cycle of algorithm.

Referring to fig. 1, in one embodiment, the ARM20 has a dual core architecture.

In this embodiment, the ARM20 has a dual-core architecture, one core is provided with a linux system and is mainly responsible for human-computer interaction, and the other core is responsible for implementing a control algorithm and generating a control instruction. And the secondary development of VC, C #, VB and Labview languages is supported, so that a user can easily realize the programming of the control system and construct an automatic control system.

Referring to fig. 1, in an embodiment, the control system further includes a memory 40, and the memory 40 is disposed on the control motherboard and electrically connected to the ARM 20.

In this embodiment, the memory 40 is a DDR (double Data rate) memory, which is called a double-Data synchronous dynamic random access memory, and specifically, any one of DDR1, DDR2, and DDR3 may be adopted. The main advantage of DDR memory is the ability to fetch data on both the rising and falling edges of a clock cycle, thereby increasing the data rate for a given clock frequency by a factor of 1. For example, in a DDR200 device, the data transfer frequency is 200MHz, while the bus speed is 100 MHz. DDR1, DDR2 and DDR3 memories have voltages of 2.5, 1.8 and 1.5V, respectively, and thus they generate less heat in power management and are more efficient than normal SDRAM chipsets employing 3.3V. Therefore, the memory 30 is arranged to expand the memory space of the ARM20, store data, software programs, coordinate data and the like, so as to meet the actual use requirement. For example, when ARM20 receives a large segment of motor trajectory control command, the requirement for ARM20 is too high for one-time processing, and it needs to be gradually resolved into control signals to be sent to the motor, part of the data can be stored in memory 40, and ARM20 can then retrieve the data from memory 40 and resolve the data into signals. It should be noted that, in an embodiment, the control motherboard can further be provided with a storage interface, such as a SATA interface, and the connected storage is used as an external storage for supplementary use.

Referring to fig. 1, the control system further includes a power supply assembly 80 for receiving ac power and converting the received ac power into dc power for output. The control mainboard, the ARM20, the FPGA30 and the power supply assembly 80 are respectively and electrically connected.

The power supply assembly 80 is connected to the national grid and the user can control the output or stop of the dc signal by controlling the power supply assembly 80. Specifically, the power supply module 80 can supply power to the entire control motherboard, and if the control motherboard is provided with connecting circuits to connect the elements on the control motherboard, control can be achieved only by supplying power to the control motherboard, and in addition, the power supply module 80 is electrically connected to the ARM20 and the FPGA30, respectively. When a power supply circuit of the control mainboard has errors, power can be supplied to the ARM20, the FPGA30 and elements connected with the ARM20 and the FPGA30 respectively, and therefore realization of control is guaranteed.

The utility model discloses a set up power supply module and realized supplying power for control mainboard, ARM20, FPGA30, can concentrate the power supply for the control mainboard by power supply module, also can supply power respectively for components such as ARM20, FPGA30 on the control mainboard.

Referring to fig. 1, in an embodiment, the control system further includes an expansion component interface and an Ethercat interface 54, where the Ethercat interface 54 is disposed on the control motherboard, and the Ethercat interface 54 is electrically connected to the ARM20 and the expansion component interface respectively.

Ethercat interface 54, i.e., an Ethercat bus communication interface, is an open architecture, and is an ethernet-based field bus system, in which Ethercat (ethernet Control Automation Technology) is integrated as an Ethercat master station solution. An Ethercat bus segment is simply a large ethernet device that can receive and transmit ethernet frames. Contains a large number of Ethercat slave stations. Like any other ethernet, Ethercat does not need to go through a switch to establish communication. The Ethercat interface is electrically connected with the ARM and the expansion component interface respectively. The Ethercat interface 54 receives the control driving signal generated by the ARM20, and then transmits the control driving signal to the expansion component through the expansion component interface. The expansion component comprises an I/O module or an I/O chip, namely an input/output module, wherein I represents input, and O represents output. The I/O interface outputs a control signal according to a processing signal output by the processor to control the work of external equipment, for example, the I/O interface outputs a control signal to perform PLC communication with external industrial equipment and control the external equipment through an output signal, and specifically, the I/O interface of the I/O interface external motor shaft of the control mainboard can control the work of the motor.

The utility model discloses a set up and extend subassembly interface and Ethercat interface 54, make the user can pass through the external subassembly that extends of Ethercat interface 54 to obtain control signal from ARM20, transmit and extend the subassembly, when having had the existing external motor number of control system can not satisfy the user demand, provide the automatic solution of high price/performance ratio of multiaxis number, many IO points for the user.

Referring to FIG. 1, in one embodiment, the motor has a power line, an encoder interface on the encoder, and an encoder, the power line being electrically connected to the power circuit 70.

In this embodiment, the external motor has a power line, an encoder interface, and an encoder, and the number of the external motors may not be limited. Each shaft motor is provided with an original point signal, a positive and negative limit signal and an encoder interface. The origin signal is a reference point for absolute positioning by the motor. The positive and negative limit signals are generated by a motor limit mechanism, and both the limit and the origin are protection functions to protect an actuating mechanism in the motion control system. The encoder interface is located on the motor encoder, usually the encoder has A/B/Z to be 3 pulse output ends, A and B are two continuous pulse output with phase difference of 0.25 cycle, the rotating direction can be known by analyzing the phase of 2 pulses, the rotating speed can be known by frequency, a pulse appears only when the Z pulse type encoder rotates one circle, the Z pulse type encoder is a fixed reference point on the encoder, and the number of the rotation is known by counting the Z pulse type encoder. Therefore, the motion states of the encoder, namely the speed, the angle, the direction and the position of multiple turns of rotation can be completely analyzed according to the states of the three A/B/Z pulses.

Referring to fig. 1, in an embodiment, the control system further includes a motor encoder interface 60, where the motor encoder interface 60 is disposed on the control motherboard, and the motor encoder interface 60 is electrically connected to the plurality of encoder interfaces respectively.

The power line of motor is connected through power circuit 70 to this embodiment to provide power drive motor, then pass through encoder interface connection control mainboard with motor encoder interface 60 with motor encoder's A/B/Z feedback signal, realize feedback signal transmission, motor encoder interface 60 can transmit motor feedback signal to FPGA30, realizes closed-loop control.

The closed-loop control is to collect actual current as feedback current, and carry out closed-loop operation after making a difference according to the feedback current and a given value so as to eliminate an error between the given value and the feedback value and achieve the purpose that the feedback current tracks the given current in real time. In one embodiment, a current module may be disposed on the motor, and a sampling resistor may be connected in series to obtain the feedback current, and the current module compares the feedback current with the current provided by the power circuit and outputs a feedback signal to the FPGA 30.

This embodiment is through utilizing the powerful parallel processing ability of FPGA30, controls the various states of motor operation in-process, realizes gathering motor encoder information through motor encoder interface 60, gathers three electric current information of motor through power circuit 70, realizes whole UNICOM, carries out analysis processes with data through FPGA30, promotes motor drive control's efficiency, realizes accurate motion control through motor drive control.

Referring to fig. 1, the control system further includes an auxiliary circuit 90, the auxiliary circuit 90 is electrically connected to the plurality of motors, the power circuit 70 and the FPGA30, respectively, and the auxiliary circuit 90 is one or more of a power amplifying circuit, a motor current feedback circuit, a bus voltage detection circuit and a backup power supply.

The auxiliary circuit 90 can be assembled by a plurality of small circuits, when the auxiliary circuit 90 is arranged between the motor and the power circuit, the bus voltage detection circuit is arranged to detect the voltage difference between a positive bus and a negative bus of the power circuit and output the voltage difference to the FPGA 30; when a power amplifying circuit is arranged between the motor and the power circuit 70, and the power amplifying circuit is connected with the FPGA30, according to a driving instruction output by the FPGA30, the energy of a direct current power supply connected to the power circuit 70 can be converted into energy obtained by a load through the amplifying circuit, that is, the power of the power circuit 70 is amplified. One end of the motor current feedback circuit is connected to the motor, and the other end is connected to the power circuit 70, wherein the feedback is to feed back a part or all of the output signal (voltage or current) of the amplifier to the input end of the amplifier for comparison (addition or subtraction) with the input signal, and the effective input signal obtained by comparison is used to control the output. The backup power supply can be a lithium battery and is used for supplying power to the motor when the power supply fails.

Referring to fig. 1, in an embodiment, the control motherboard is further provided with a USB interface 51, an RS232 interface 52, and an ethernet interface 53.

The RS232 interface 52 is used for selecting a serial port communication mode to be a 232 mode and is used for being connected with other control systems, such as an industrial personal computer; the USB interfaces 51 can be one or more, different external devices are connected by arranging a plurality of USB interfaces, the high-speed USB interface is used for being connected with a USB flash disk for data transmission, and the low-speed USB interface is used for being connected with external devices such as a mouse and a keyboard, so that auxiliary control is carried out on industrial equipment, and the human-computer interaction experience is enhanced. The ethernet interface 53 is a jack or socket that allows the use of ethernet connectors, which are essential to allow the creation of Local Area Networks (LANs), all devices will be able to access the same information by connecting each device to a central server or hub using ethernet technology.

In this embodiment, the ethernet interface 53, the RS232 interface 52, and the USB interface 51 are disposed on the control motherboard, so that the communication function of the control system is implemented, and the interface function of the control system is richer.

Based on same utility model the design, the utility model discloses still provide an electronic equipment, this electronic equipment includes above-mentioned control system, and this control system's concrete structure refers to above-mentioned embodiment, because this electronic equipment has adopted the whole technical scheme of above-mentioned all embodiments, consequently has all beneficial effects that the technical scheme of above-mentioned embodiment brought at least, and the repeated description is no longer repeated here one by one.

The above is only the optional embodiment of the present invention, and not therefore the limit to the patent scope of the present invention, all the concepts of the present invention utilize the equivalent structure transformation of the content of the specification and the attached drawings, or the direct/indirect application in other related technical fields is included in the patent protection scope of the present invention.

Claims

1. A control system, characterized in that the control system comprises:

2. The control system of claim 1, wherein the ARM has a dual core architecture.

3. The control system of claim 1, further comprising a memory disposed on the control motherboard and electrically connected to the ARM.

4. The control system of claim 1, further comprising a power supply assembly for accessing an ac power source and converting the accessed ac power source to a dc power output;

5. The control system of claim 1, further comprising an expansion component interface and an Ethercat interface, wherein the Ethercat interface is disposed on the control motherboard, and the Ethercat interface is electrically connected to the ARM and the expansion component interface, respectively.

6. The control system of claim 1, wherein the motor has a power line, an encoder interface, and an encoder, the encoder interface located on the encoder, the power line electrically connected to the power circuit.

7. The control system of claim 6, further comprising a motor encoder interface disposed on the control motherboard, the motor encoder interface being electrically connected to each of the plurality of encoder interfaces.

8. The control system of claim 1, further comprising auxiliary circuitry electrically connected to each of the plurality of motors, the power circuit, and the FPGA, the auxiliary circuitry being one or more of a power amplifier circuit, a motor current feedback circuit, a bus voltage detection circuit, and a backup power source.

9. The control system according to claim 1, wherein the control mainboard is further provided with an Ethernet interface, an RS232 interface and a USB interface.

10. An electronic device, characterized in that it comprises a control system according to any one of claims 1-9.