CN2168322Y

CN2168322Y - Erasable and programmable accumulator

Info

Publication number: CN2168322Y
Application number: CN 93204942
Authority: CN
Inventors: 傅忠民
Original assignee: Individual
Current assignee: Individual
Priority date: 1993-02-22
Filing date: 1993-02-22
Publication date: 1994-06-08
Anticipated expiration: 2003-02-22

Abstract

The utility model discloses an EPROM simulator, which mainly comprises an RAM memory, two groups of interface circuits and an interface converting circuit; the interface converting circuit is arranged between the two groups of interface circuits and the RAM memory, each group of interface circuits can be singly communicated with the RAM memory by the interface converting circuit so as to make the RAM memory communicated with an external operating system corresponding to the interface circuit, thus the external operating system which is connected with the RAM memory by the interface converting circuit can directly read, write and modify the program and data of the RAM memory, and the problem of troublesome operation that an EPROM memory needs to be frequently pulled out and erased by ultraviolet in the process of development and debugging of a computer product is solved. The utility model can have a positive action towards computer product development.

Description

Erasable and programmable accumulator

The present invention relates to a kind of read-write program storage device.

In the performance history of computer product, often adopt the ROM (read-only memory) that to wipe can wipe programmable read-only memory (PROM) carries out program and data as program storage device operation debugging, the operation debugging of current procedure and data all is at first erasable programmable read only memory to be inserted in the program development machine, key in editor's instruction and data, transfer to then, be inserted into again in the product that is developed and move, as operation problem is arranged, just wipe the content that has write in the erasable programmable read only memory with ultraviolet ray, erasable programmable read only memory is inserted write amended program or data in the program development machine again again.The exploitation of a computer product, its program and data often will be through the operation debugging of tens times even tens times, therefore the work of this repetition seems very loaded down with trivial details and time-consuming, particularly the number of times that can rewrite of erasable programmable read only memory is limited, often rewrite very fragile erasable programmable read only memory.

The objective of the invention is provides a kind of energy to substitute erasable programmable read only memory for the deficiency that solves above technology, and the erasable programmable read only memory simulator that can be directly the computer product that is developed be carried out the operation debugging of program in its performance history and data by development system.

In order to achieve the above object, erasable programmable read only memory simulator described in the invention is mainly by random access memory, two group of interface circuits, interface switching control circuit and power-supply circuit are formed, interface switching control circuit is located between two group of interface circuits and the random access memory, pass through interface switching control circuit, arbitrary group of interface circuits can both be connected with random access memory separately, so that random access memory and the corresponding peripheral operation of this interface circuit system are connected, thereby realize that any one peripheral operation system that is connected with the erasable programmable read only memory simulator can both read and write or move program and data in the random access memory by the erasable programmable read only memory simulator.

In order to reduce production costs as far as possible, improve result of use, erasable programmable read only memory simulator described in the invention, its described two group of interface circuits all are made up of three interface integrated packages and an interface socket, port A on the interface integrated package links to each other with separately interface socket respectively, and the port B on the interface integrated package links to each other with the pin of random access memory respectively; And described interface switching control circuit comprises change-over switch and auxiliary integrated circuit, and the output pin of auxiliary integrated circuit extremely links to each other with the high and low level control of each interface circuit and random access memory respectively.One group of interface circuits is because of the conducting of control end input low level when stirring change-over switch, another group of interface circuits is turn-offed because of the control end input high level simultaneously, to realize that random access memory is connected with the corresponding interface socket, so that system is connected with peripheral operation, realize direct read or operation to random access memory.

Erasable programmable read only memory simulator described in the invention, can substitute erasable programmable read only memory, with can be arbitrarily in the exploitation that is implemented in computer product to the debugging and the modification of program and data, and directly can in the computer product that is developed, move, having solved erasable programmable read only memory needs in the exploitation of computer product through using the loaded down with trivial details work of ultraviolet erasing always, and it has active operation significance to the exploitation of computer product.

Fig. 1 is an erasable programmable read only memory simulator synoptic diagram.

Fig. 2 is an erasable programmable read only memory simulator structural representation.

Fig. 3 is that the erasable programmable read only memory simulator is implemented wiring diagram.

In conjunction with the accompanying drawings the utility model is further described below by embodiment.

As shown in Figure 1 and Figure 2, the described erasable programmable read only memory simulator of present embodiment mainly is made up of two group of

interface circuits

1,2, random access memory 3, interface switching control circuit 4, power-supply circuit 5 and housing 6, and wherein interface circuit 1 is by interface integrated circuit μ ₁, μ ₂, μ ₃, and interface socket J ₁Form, interface circuit two is by interface integrated circuit μ ₄, μ ₅, μ ₆With interface socket J ₂Form, interface switching control circuit 4 is by change-over switch S ₁With auxiliary integrated circuit μ ₈, μ ₉Form, as shown in Figure 3 interface integrated package μ ₁, μ ₂, μ ₃Port A its corresponding interface socket J respectively ₁Be connected interface integrated package μ ₄, μ ₅, μ ₆Port A its corresponding interface socket J respectively ₂Be connected interface integrated package μ ₁And μ ₄, μ ₂And μ ₅, μ ₃And μ ₆Port B respectively and insert random access memory μ after connecing again respectively ₇Each pin, interface switching control circuit 4 is located at two group of interface circuits and random access memory μ ₇Between, wherein auxiliary integrated circuit μ ₈And μ ₉Output pin extremely link to each other with the control of the high and low level of each interface circuit and random access memory respectively.Q in the power-supply circuit 5 ₁, Q ₂As its Q of the triode in the power-supply circuit ₁Emitter receive interface socket J ₁Power end, Q ₂Emitter receive J ₂Power end, work as Q ₁, Q ₂There is the collector that all can be added to respective tube in the voltage of arbitrary emitter, becomes the working power of erasable programmable read only memory simulator each several part.During use, as change-over switch S ₁When connecting with interface circuit 1, μ ₁, μ ₂, μ ₃The 19th pin be low level, and make μ ₁, μ ₂, μ ₃Conducting, μ ₄, μ ₅, μ ₆The 19th pin by μ ₈The high level that adds of the 14th pin and make μ ₄, μ ₅, μ ₆Turn-off, at this moment, interface circuit μ ₁, μ ₂, μ ₃Make random access memory μ ₇With interface socket J ₁Be connected, thereby realize and interface socket J ₁Outside microprocessing systems that is connected and random access memory μ ₇Become one the final read-write operation of realizing random access memory.As change-over switch S ₁Disconnect μ ₁, μ ₂, μ ₃The 19th pin connect high level and turn-off μ ₄, μ ₅, μ ₆The 19th pin connect low level and conducting, this moment and interface socket J ₂The peripheral operation system that links to each other just can pass through interface integrated package μ ₄, μ ₅, μ ₆To random access memory μ ₇Read-write operation.

Erasable programmable read only memory simulator described in the invention, its described interface integrated package can be the interface circuit that any three-state (being high and low level, high resistant) device constitutes, as 74LS245,74S245,74245,74HC245,74HC245,74125,74HC125, interface switches auxiliary circuit μ ₈, μ ₉Can select 4053 integrated packages for use, interface socket can be selected the 28PLN socket for use.

Claims

1, a kind of erasable programmable read only memory simulator, it is characterized in that it mainly is made up of random access memory, two group of interface circuits, interface switching control circuit and power-supply circuit, interface switching control circuit is located between two group of interface circuits and the random access memory, and arbitrary group of interface circuits is connected with random access memory separately by interface switching control circuit.

2, erasable programmable read only memory simulator according to claim 1 is characterized in that:

A, described two group of interface circuits all are made up of three interface integrated packages and an interface socket, and the port A on the interface integrated package links to each other with separately interface socket respectively, and the port B on the interface integrated package links to each other with the pin of random access memory respectively;

B, described interface switching control circuit comprise change-over switch and auxiliary integrated circuit, and the output pin of auxiliary integrated circuit extremely links to each other with the high and low level control of each interface circuit and random access memory respectively.