CN216795376U - Multi-level circuit board arrangement structure - Google Patents
Multi-level circuit board arrangement structure Download PDFInfo
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- CN216795376U CN216795376U CN202123213718.3U CN202123213718U CN216795376U CN 216795376 U CN216795376 U CN 216795376U CN 202123213718 U CN202123213718 U CN 202123213718U CN 216795376 U CN216795376 U CN 216795376U
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- circuit board
- printed circuit
- connector
- type electronic
- arrangement structure
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Abstract
The utility model relates to a multilayer circuit board arrangement structure which comprises a first printed circuit board, wherein a second printed circuit board is arranged above the first printed circuit board, the first printed circuit board is used for connecting patch electronic elements, the second printed circuit board is used for connecting pin electronic elements, and circuits on the first printed circuit board and circuits on the second printed circuit board are connected through a connector. This multilevel circuit board arrangement structure can shorten circuit board manufacturing procedure, improve factor of safety in the electronic component course of working, reduce and participate in a class electronic component welding degree of difficulty, improve production efficiency and product yield.
Description
Technical Field
The utility model relates to a multi-level circuit board arrangement structure.
Background
The printed circuit board is a common conductive base part in the electrical equipment, along with the increase of the functions of the electrical equipment, the number of electronic components on the circuit board is continuously increased, and various electronic components are integrated on the same printed circuit board, so that the circuit has strong integrity and convenient installation, however, the negative effects are the problems of interference and thermal influence on the arrangement of various electronic components, and the like, the chip type electronic components on the circuit board are usually welded automatically, the pin type electronic element needs to be mechanically welded or manually welded after the patch type electronic element is welded, if the pin-type electronic component is close to the chip-type electronic component, when the pin-type electronic component is soldered, the soldering strength of the chip electronic component is easily affected, and the chip electronic component is easily damaged when the pin electronic component is soldered. Therefore, the conventional hybrid connection mode of the patch electronic element and the pin electronic element has the technical problems of long processing procedure, low safety coefficient of the electronic element in the processing process, high welding difficulty of the pin electronic element and the like.
SUMMERY OF THE UTILITY MODEL
The technical problem to be solved by the utility model is as follows: the utility model provides a multilayer circuit board arrangement structure which is used for solving the problems of long circuit board processing procedure, low safety coefficient in the processing process of electronic elements and high welding difficulty of pin type electronic elements.
In order to solve the technical problems, the utility model adopts the technical scheme that: the multi-level circuit board arrangement structure comprises a first printed circuit board, a second printed circuit board is arranged above the first printed circuit board, the first printed circuit board is used for connecting patch electronic elements, the second printed circuit board is used for connecting pin electronic elements, and circuits on the first printed circuit board are connected with circuits on the second printed circuit board through a connector.
Preferably, the peripheral edge of the second printed circuit board is connected with the first printed circuit board through a plurality of discrete sub-adhesive pads, and two surfaces of each adhesive pad are respectively bonded with the first printed circuit board and the second printed circuit board.
Preferably, the connector is a jumper connector, a male connector and a female connector of the connector are respectively connected to the opposite surfaces of the first printed circuit board and the second printed circuit board, and the male connector and the female connector of the same connector are directly butted.
Preferably, all connectors are of uniform height.
The utility model has the beneficial effects that: according to the utility model, the patch type electronic element and the pin type electronic element are respectively arranged on the first printed circuit board and the second printed circuit board, so that the first printed circuit board is directly finished by automatic welding, and is directly detected and put in storage after the automatic welding is finished without secondary welding, thereby avoiding the welding strength influence caused by reheating of the welded patch type electronic element, and ensuring the connection reliability of the patch type electronic element and the first printed circuit board. The second printed circuit board can be directly welded automatically or manually, and pins of electronic elements are welded well. After the second printed circuit board and the pin type electronic elements are welded, the first printed circuit board and the second printed circuit board are butted up and down through the connector, so that a complete multi-layer circuit board is formed, the production efficiency is greatly improved, the production difficulty is reduced, the product quality is improved, the occupied area of the circuit board can be reduced, and the board space utilization rate of the first printed circuit board is improved.
Drawings
The following detailed description of embodiments of the utility model is provided in conjunction with the appended drawings, in which:
FIG. 1 is a schematic perspective view of the present invention;
in fig. 1: 1. the electronic device comprises a first printed circuit board, a second printed circuit board, a third printed circuit board, a patch type electronic component, a fourth printed circuit board, a pin type electronic component, a fourth printed circuit board, a connector, a fourth printed circuit board, a fifth printed circuit board, a sixth printed circuit board, a fifth printed circuit board, a sixth printed circuit board, a fifth printed circuit board, a pin type electronic component, a fifth printed circuit board type electronic component, a pin type electronic component, a connector, a fifth printed circuit board type electronic component, a pin type electronic component, a connector, a 6 and a rubber gasket.
Detailed Description
Specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
The multi-layer circuit board arrangement structure shown in fig. 1 includes a first printed circuit board 1, a second printed circuit board 2 is disposed above the first printed circuit board 1, the first printed circuit board 1 is used for connecting a patch-type electronic component 3, the second printed circuit board 2 is used for connecting a pin-type electronic component 4, and a circuit on the first printed circuit board 1 and a circuit on the second printed circuit board 2 are connected by a connector 5.
In this embodiment, the peripheral edge of the second printed circuit board 2 is connected to the first printed circuit board 1 through a plurality of discrete adhesive pads 6, and two sides of the adhesive pads 6 are respectively bonded to the first printed circuit board 1 and the second printed circuit board 2. Can make first printed circuit board 1 and second printed circuit board 2 integratization like this, make things convenient for later stage to shift and install, in actual production, first printed circuit board 2's connected mode is diversified, can suitably adjust. The first printed circuit board 1 and the second printed circuit board 2 are insulated by adopting the rubber pad 6 for connection, and certain shock absorption effect is achieved.
In this embodiment, the connector 5 is a jumper connector, the male connector and the female connector of the connector 5 are respectively connected to the opposite surfaces of the first printed circuit board 1 and the second printed circuit board 2, and the male connector and the female connector of the same connector 5 are directly butted. When the number of connectors between the first printed circuit board 1 and the second printed circuit board 2 is large, the connector 5 can be directly used to connect the first printed circuit board 1 and the second printed circuit board 2, and it is also possible to eliminate the adhesive pad 6. At this time, it is preferable to set the heights of all the connectors 5 to be equal to each other. To ensure that all connectors 5 can be reliably connected.
The working principle of the utility model is as follows: as shown in figure 1, the patch type electronic element 3 and the pin type electronic element 4 are respectively arranged on the first printed circuit board 1 and the second printed circuit board 2, so that the first printed circuit board 1 is directly finished by automatic welding, and is directly detected and put in storage after the automatic welding is finished without secondary welding, thereby avoiding the welding strength influenced by the reheating of the welded patch type electronic element 3 and ensuring the connection reliability of the patch type electronic element 3 and the first printed circuit board 1. The second printed circuit board 2 can directly weld the pin type electronic elements 4 through automatic welding or manual welding, and because the second printed circuit board 2 is not provided with the patch type electronic elements 3 which are welded in advance, the difficulty of welding the pin type electronic elements 4 is greatly reduced, and the welding efficiency is improved. After the second printed circuit board 2 and the pin type electronic elements 4 are welded, the first printed circuit board 1 and the second printed circuit board 2 are butted up and down through the connector 5, so that a complete multi-layer circuit board is formed, the production efficiency is greatly improved, the production difficulty is reduced, the product quality is improved, the occupied area of the circuit board can be reduced, and the board space utilization rate of the first printed circuit board 1 is improved.
The above embodiments are merely illustrative of the principles and effects of the present invention, and some embodiments in use, and are not intended to limit the utility model; it should be noted that, for those skilled in the art, various changes and modifications can be made without departing from the inventive concept of the present invention, and these changes and modifications belong to the protection scope of the present invention.
Claims (4)
1. The multi-level circuit board arrangement structure comprises a first printed circuit board (1) and is characterized in that a second printed circuit board (2) is arranged above the first printed circuit board (1), the first printed circuit board (1) is used for being connected with a patch type electronic element (3), the second printed circuit board (2) is used for being connected with a pin type electronic element (4), and a circuit on the first printed circuit board (1) is connected with a circuit on the second printed circuit board (2) through a connector (5).
2. A multilevel circuit board arrangement according to claim 1, wherein the peripheral edge of the second printed circuit board (2) is connected to the first printed circuit board (1) by a number of discrete subdivisions of glue pads (6), both sides of the glue pads (6) being glued to the first printed circuit board (1) and the second printed circuit board (2), respectively.
3. A multilevel circuit board arrangement according to claim 1, wherein the connector (5) is a jumper connector, the male and female connectors of the connector (5) being connected to facing surfaces of the first printed circuit board (1) and the second printed circuit board (2), respectively, the male and female connectors of the same connector (5) being directly butted.
4. A multilevel circuit board arrangement according to claim 1, characterized in that the height of all connectors (5) is uniform.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202123213718.3U CN216795376U (en) | 2021-12-20 | 2021-12-20 | Multi-level circuit board arrangement structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202123213718.3U CN216795376U (en) | 2021-12-20 | 2021-12-20 | Multi-level circuit board arrangement structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN216795376U true CN216795376U (en) | 2022-06-21 |
Family
ID=82008430
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202123213718.3U Active CN216795376U (en) | 2021-12-20 | 2021-12-20 | Multi-level circuit board arrangement structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN216795376U (en) |
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2021
- 2021-12-20 CN CN202123213718.3U patent/CN216795376U/en active Active
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