CN216774742U - IGBT drive circuit capable of being turned off in grading mode - Google Patents
IGBT drive circuit capable of being turned off in grading mode Download PDFInfo
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Abstract
The application discloses a graded turn-off IGBT driving circuit which comprises a turn-on module, a turn-off module, a state detection module and a logic processing module. The turn-off module comprises a first turn-off passage and a second turn-off passage. The state detection module is used for acquiring the gate voltage of the IGBT in real time and outputting a level signal to the logic processing module according to the magnitude of the gate voltage. The logic processing module carries out logic processing on the level signal and the PWM control signal and then outputs a control signal so as to control and switch the first turn-off passage and the second turn-off passage when the IGBT needs to be turned off, and the IGBT is turned off in a grading manner by reducing the gate voltage to different preset voltages at least twice. Therefore, the multichannel control signals are transmitted without adding isolating devices such as an optical coupler, the circuit is simplified, and the design cost is reduced.
Description
Technical Field
The application relates to the technical field of IGBT driving, in particular to an IGBT driving circuit capable of being turned off in a grading mode.
Background
The IGBT driver is widely applied to hot industries such as photovoltaics, wind power generation, frequency conversion and electric automobiles, but in the field of IGBT driving used in industry and the like, bus voltage of a plurality of occasions is high, voltage resistance of an IGBT module is low, and therefore a gate pole graded turn-off technology is needed to suppress overhigh peak voltage, the purpose of protecting the IGBT safely is achieved, in the prior art, a plurality of control signals need to be transmitted through an optical coupler or a transformer to achieve the purpose of graded turn-off, and the circuit is complex and high in cost.
SUMMERY OF THE UTILITY MODEL
In view of this, it is necessary to provide a gradable turn-off IGBT driving circuit, which can realize the gradable turn-off without adding an isolator such as an optocoupler to transmit a plurality of control signals, so that the circuit is simplified and the cost is reduced.
The technical scheme proposed by the application for achieving the purpose is as follows:
the IGBT driving circuit capable of being turned off in a grading way comprises a turn-on module and a turn-off module which are electrically connected with an IGBT gate electrode, wherein the turn-on module and the turn-off module are controlled to be turned on and off through PWM control signals so as to correspondingly control the turn-on and the turn-off of the IGBT, the IGBT driving circuit capable of being turned off in a grading way also comprises a state detection module which is electrically connected with the IGBT gate electrode and a logic processing module which is electrically connected with the turn-on module, the turn-off module comprises a first turn-off passage and a second turn-off passage, the state detection module is used for acquiring the gate electrode voltage of the IGBT in real time and outputting a corresponding level signal to the logic processing module according to the gate electrode voltage, the logic processing module outputs a control signal after carrying out logic processing on the level signal and the PWM control signal so as to control and switch the first turn-off passage and the second turn-off passage when the IGBT needs to be turned off, and the IGBT is turned off in a grading way by reducing the gate voltage of the IGBT to different preset voltages at least twice.
Further, the first turn-off path and the second turn-off path are used for providing gate resistors with different resistance values for the IGBT.
Further, the state detection module is further configured to set the preset voltage.
Further, the turn-on module comprises a resistor (Rgon) and a MOS (Q1), the source of the MOS (Q1) is connected with the power supply (V1), the drain of the MOS (Q1) is electrically connected with the gate of the IGBT through the resistor (Rgon), and the gate of the MOS (Q1) is electrically connected with the logic processing module.
Further, the first turn-off path includes a resistor (Rgoff) and a MOS transistor (Q2), a source of the MOS transistor (Q2) is electrically connected to the power supply (V2), a drain of the MOS transistor (Q2) is electrically connected to a gate of the IGBT through the resistor (Rgoff), and a gate of the MOS transistor (Q2) is electrically connected to the logic processing module.
Further, the second turn-off path comprises a resistor (Rssd) and a MOS transistor (Q3), the source of the MOS transistor (Q3) is connected to the midpoint potential, the drain of the MOS transistor (Q3) is electrically connected to the gate of the IGBT after passing through the resistor (Rssd) and the resistor (Rgoff) in sequence, and the gate of the MOS transistor (Q3) is electrically connected to the logic processing module.
Further, the state detection module comprises a resistor (R1), a resistor (R2), a resistor (R3), a resistor (R4), a schmitt trigger (T1), a schmitt trigger (T2) and a comparator (OP1), wherein an input end of the schmitt trigger (T1) is electrically connected to a gate of the IGBT through the resistor (R1), an input end of the schmitt trigger (T1) is also connected to a midpoint potential through the resistor (R3), and an output end of the schmitt trigger (T1) is electrically connected with an inverting input end of the comparator (OP1) in an inverted manner; the input end of the Schmitt trigger (T2) is electrically connected with the gate electrode of the IGBT through the resistor (R2), the input end of the Schmitt trigger (T2) is also connected with the midpoint potential through the resistor (R4), and the output end of the Schmitt trigger (T2) is electrically connected with the non-inverting input end of the comparator (OP1) in a backward direction; the output end of the comparator (OP1) is electrically connected with the logic processing module.
Further, the logic processing module comprises a nor gate (NAND), a not gate (U1), a not gate (U2), a not gate (U3), and a not gate (U4), wherein a first input end of the nor gate (NAND) is used for inputting a PWM control signal, a first input end of the nor gate (NAND) is electrically connected to the gate of the MOS transistor (Q1) through the not gate (U1), a first input end of the nor gate (NAND) is also electrically connected to the gate of the MOS transistor (Q3) through the not gate (U2), a second input end of the nor gate (NAND) is electrically connected to an output end of the NAND comparator (OP1), and an output end of the nor gate (NAND) is electrically connected to the gate of the MOS transistor (Q2) after being sequentially connected in series with the not gate (U3) and the not gate (U4).
Further, the voltage range provided by the power supply (V1) is-10V to-15V.
The IGBT driving circuit capable of being turned off in a grading way is provided with a state detection module and is used for acquiring the gate voltage of the IGBT in real time and outputting a corresponding level signal according to the magnitude of the gate voltage; and a logic processing module is arranged to output a control signal after the level signal and the PWM control signal are subjected to logic processing, so that the IGBT is controlled to be switched to turn-off paths with different resistance values when needing to be turned off, and the IGBT is turned off in a grading manner by reducing the gate voltage of the IGBT to different preset voltages at least twice. Therefore, the IGBT can be switched off in a grading mode only by transmitting one switch control signal, and isolation devices such as an optical coupler are not required to be added to transmit multiple paths of control signals, so that the circuit is simplified, and the design cost is reduced.
Drawings
Fig. 1 is a block diagram of a preferred embodiment of the IGBT driver circuit with scalable turn-off provided in the present application.
Fig. 2 is a circuit connection diagram of a preferred embodiment of the IGBT driving circuit capable of being turned off in a grading manner provided by the present application.
Fig. 3 is a schematic diagram of the level logic of the signals in fig. 2.
Fig. 4 is a waveform diagram of step turn-off of a preferred embodiment of the IGBT gate voltage of fig. 2.
Description of the main elements
First off-path 21
Second shut-off path 22
Resistors R1, R2, R3, R4, Rgoff, Rssd, Rgon
Schmitt triggers T1, T2
Comparator OP1
NOR gate NAND
NOT gate U1, U2, U3, U4,
MOS tubes Q1, Q2, Q3
Power supplies V1, V2
The following detailed description will further illustrate the present application in conjunction with the above-described figures.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application will be further described in detail with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
Referring to fig. 1, the present application provides a IGBT driving circuit capable of being turned off in a graded manner, including a turn-on module (1), a turn-off module (2), and a state detection module (3) electrically connected to a gate of an IGBT, and a logic processing module (4) electrically connected to the turn-on module (1), the turn-off module (2), and the state detection module (3). The IGBT driving circuit capable of being turned off in a grading mode is used for controlling the on and off of the turn-on module and the turn-off module through the PWM control signal so as to correspondingly control the on and off of the IGBT.
The shutdown module (2) comprises a first shutdown path (21) and a second shutdown path (22). The state detection module (3) is used for acquiring the gate voltage of the IGBT in real time and outputting a corresponding level signal to the logic processing module (4) according to the magnitude of the gate voltage. The logic processing module (4) outputs a control signal after performing logic processing on the level signal and the PWM control signal, so as to control and switch the first turn-off access (21) and the second turn-off access (22) when the IGBT needs to be turned off, and realize the step turn-off of the IGBT by reducing the gate voltage of the IGBT to different preset voltages at least twice.
Preferably, the first turn-off path (21) and the second turn-off path (22) are used for providing gate resistors with different resistance values for the IGBT.
Preferably, the state detection module (3) is further configured to set the preset voltage.
Therefore, the IGBT can be switched off in a grading mode only by transmitting one switch control signal, and isolation devices such as an optical coupler are not required to be added to transmit multiple paths of control signals, so that the circuit is simplified, and the design cost is reduced.
Referring to fig. 2, fig. 2 is a specific circuit structure of a preferred embodiment of the IGBT driving circuit with a step-down turn-off function provided in the present application. The turn-on module (1) comprises a resistor (Rgon) and a MOS (Q1), the source electrode of the MOS (Q1) is connected with a power supply (V1), the drain electrode of the MOS (Q1) is electrically connected with the gate electrode of the IGBT through the resistor (Rgon), and the gate electrode of the MOS (Q1) is electrically connected with the logic processing module (4). The voltage value provided by the power supply (V1) is V1.
The first turn-off path (21) comprises a resistor (Rgoff) and a MOS transistor (Q2), wherein the source electrode of the MOS transistor (Q2) is electrically connected to the power supply (V2), the drain electrode of the MOS transistor (Q2) is electrically connected to the gate electrode of the IGBT through the resistor (Rgoff), and the gate electrode of the MOS transistor (Q2) is electrically connected with the logic processing module (4). The voltage value provided by the power supply (V2) is V2.
The second turn-off path (22) comprises a resistor (Rssd) and a MOS (Q3), the source of the MOS (Q3) is connected with the midpoint potential, the drain of the MOS (Q3) is electrically connected with the gate of the IGBT after passing through the resistor (Rssd) and the resistor (Rgoff) in sequence, and the gate of the MOS (Q3) is electrically connected with the logic processing module (4).
The state detection module (3) comprises a resistor (R1), a resistor (R2), a resistor (R3), a resistor (R4), a Schmidt trigger (T1), a Schmidt trigger (T2) and a comparator (OP1), wherein the input end of the Schmidt trigger (T1) is electrically connected with the gate electrode of the IGBT through the resistor (R1), the input end of the Schmidt trigger (T1) is also connected with the neutral point potential through the resistor (R3), and the output end of the Schmidt trigger (T1) is electrically connected with the inverting input end of the comparator (OP1) in an inverting way; the input end of the Schmitt trigger (T2) is electrically connected with the gate electrode of the IGBT through the resistor (R2), the input end of the Schmitt trigger (T2) is also connected with the midpoint potential through the resistor (R4), and the output end of the Schmitt trigger (T2) is electrically connected with the non-inverting input end of the comparator (OP1) in a backward direction; the output end of the comparator (OP1) is electrically connected with the logic processing module (4).
The logic processing module (4) comprises a NOR gate (NAND), a NOT gate (U1), a NOT gate (U2), a NOT gate (U3) and a NOT gate (U4). The first input terminal of the NOR gate (NAND) is used for inputting the PWM control signal. The first input end of the NOR gate (NAND) is electrically connected with the gate of the MOS transistor (Q1) through the NOT gate (U1). The first input end of the NOR gate (NAND) is also electrically connected with the gate of the MOS transistor (Q3) through the NOT gate (U2). The second input end of the NOR gate (NAND) is electrically connected with the output end of the comparator (OP1), and the output end of the NOR gate (NAND) is electrically connected with the gate of the MOS transistor (Q2) after being sequentially connected with the NOR gate (U3) and the NOR gate (U4) in series.
Referring to fig. 3, the circuit principle provided in this embodiment will be described in detail.
In this embodiment, the IGBT driving circuit capable of being turned off in a graded manner includes three working processes, which are power-on (static state), turning-on and turning-off in a graded manner.
And (3) electrifying: when the IGBT is powered on, the PWM control signal is at a low level, the IGBT gate voltage is pulled to v1, the comparator (OP1) inverts to output a low level, the NOT gate (U1), the NOT gate (U2) and the NOT gate (U4) output a high level, the MOS transistor (Q2) and the MOS transistor (Q3) are both turned on, the MOS transistor (Q1) is turned off, and the IGBT gate voltage is pulled down to v1 through a resistor (Rgoff).
The opening process: when the IGBT is switched on, the PWM control signal is high level, the NOR gate (NAND) outputs low level, the NOT gate (U1), the NOT gate (U2) and the NOT gate (U4) output low level, at the moment, the MOS transistor (Q2) and the MOS transistor (Q3) are both cut off, the MOS transistor (Q1) is switched on, and the IGBT gate voltage is pulled up to v2 through the resistor (Rgon).
A step shutdown process: when the IGBT is turned off, the PWM control signal is at a low level, the NOR gate (NAND) outputs a low level, the NOT gate (U1) and the NOT gate (U2) output a high level, the MOS transistor (Q1) is turned off at the moment, and the MOS transistor (Q3) is continuously turned on; because the gate voltage is high in the initial stage, the input end fed back to the Schmitt trigger T1 and T2 is identified as high level, and the output end is low level, therefore, the comparator (OP1) flips to output low level, the NOR gate (NAND) outputs high level, the NOR gate (U3) outputs low level, the NOR gate (U4) outputs high level, the MOS transistor (Q2) is switched on, and the IGBT gate voltage is switched off rapidly through the resistor (Rgoff); when the IGBT gate voltage drops to a first preset value, the IGBT gate voltage is fed back to a Schmitt trigger (T1) to be identified as a low level and output a high level, the IGBT gate voltage at the moment is fed back to the Schmitt trigger (T2) to be still identified as a high level, and the output is still a low level, so that a comparator (OP1) does not overturn and outputs a high level, a NOR gate (NAND) outputs a low level, a NOR gate (U3) outputs a high level, a NOR gate (U4) outputs a low level, a MOS transistor (Q2) is cut off, and the IGBT gate voltage is slowly cut off through a resistor (Rssd) and a resistor (Rgoff); when the IGBT gate voltage continuously drops to a second preset value, the IGBT gate voltage is fed back to the Schmitt trigger (T2) to be identified as a low level and output a high level, at the moment, the comparator (OP1) turns over again to output the low level, the NOR gate (NAND) outputs the high level, the NOR gate (U3) outputs the low level, the NOR gate (U4) outputs the high level, the MOS transistor (Q2) is conducted again, and the IGBT gate voltage can be rapidly turned off only through the resistor (Rgoff). The whole turn-off process is a grading process of fast turn-off, slow turn-off and fast turn-off, and in the whole turn-off process, the gate voltage of the IGBT is shown in figure 4. According to the embodiment, the three MOS tubes are controlled to be opened or closed, so that the rapid turn-off and the slow turn-off are realized by selecting the large-resistance loop and the small-resistance loop, and the grading effect is finally achieved.
In the present embodiment, the first preset value and the second preset value (i.e. the identification voltage at the input terminal of the schmitt trigger) can be determined according to actual conditions, and are specifically adjusted and set by selecting the resistor (R1), the resistor (R2), the resistor (R3) and the resistor (R4) with different resistances.
In the embodiment, the voltage range provided by the power supply (V1) is-10V to-15V; the voltage provided by the power supply (V2) is 15V.
The IGBT driving circuit capable of being turned off in a grading way is provided with a state detection module and is used for acquiring the gate voltage of the IGBT in real time and outputting a corresponding level signal according to the magnitude of the gate voltage; and a logic processing module is arranged to carry out logic processing on the level signal and the PWM control signal and then output a control signal, so that the IGBT is controlled to be switched to turn-off paths with different resistance values when needing to be turned off, and the IGBT is turned off in a grading manner by reducing the gate voltage of the IGBT to different preset voltages at least twice. Therefore, the IGBT can be switched off in a grading mode only by transmitting one switch control signal, and isolation devices such as an optical coupler are not required to be added to transmit multiple paths of control signals, so that the circuit is simplified, and the design cost is reduced.
The above description is only exemplary of the present application and should not be taken as limiting the present application, as any modification, equivalent replacement, or improvement made within the spirit and principle of the present application should be included in the protection scope of the present application.
Claims (9)
1. The IGBT driving circuit capable of being turned off in a grading way comprises a turn-on module and a turn-off module which are electrically connected with an IGBT gate pole, and is controlled to be turned on and turned off through PWM control signals so as to correspondingly control the turn-on and the turn-off of the IGBT, and is characterized by further comprising a state detection module and a logic processing module, wherein the state detection module is electrically connected with the IGBT gate pole, the logic processing module is electrically connected with the turn-on module, the turn-off module comprises a first turn-off passage and a second turn-off passage, the state detection module is used for acquiring the gate pole voltage of the IGBT in real time and outputting a corresponding level signal to the logic processing module according to the magnitude of the gate pole voltage, the logic processing module carries out logic processing on the level signal and the PWM control signal and then outputs a control signal so as to control and switch the first turn-off passage and the second turn-off passage when the IGBT needs to be turned off, and the step-off IGBT is realized by reducing the gate voltage of the IGBT to different preset voltages at least twice.
2. The IGBT drive circuit capable of being turned off in a grading manner according to claim 1, wherein the first turn-off path and the second turn-off path are used for providing gate resistors with different resistance values for the IGBT.
3. The IGBT driver circuit capable of being turned off according to claim 1, wherein the state detection module is further configured to set the preset voltage.
4. The IGBT drive circuit capable of being turned off in a grading manner according to claim 1, wherein the turn-on module comprises a resistor Rgon and a MOS transistor Q1, the source of the MOS transistor Q1 is connected with a power supply V1, the drain of the MOS transistor Q1 is electrically connected with the gate of the IGBT through the resistor Rgon, and the gate of the MOS transistor Q1 is electrically connected with the logic processing module.
5. The IGBT drive circuit capable of being turned off in a grading manner according to claim 4, wherein the first turn-off path comprises a resistor Rgoff and a MOS transistor Q2, the source of the MOS transistor Q2 is electrically connected to a power supply V2, the drain of the MOS transistor Q2 is electrically connected to the gate of the IGBT through the resistor Rgoff, and the gate of the MOS transistor Q2 is electrically connected to the logic processing module.
6. The IGBT driving circuit capable of being turned off in a grading manner according to claim 5, wherein the second turn-off path comprises a resistor Rssd and a MOS transistor Q3, the source of the MOS transistor Q3 is connected with a midpoint potential, the drain of the MOS transistor Q3 is electrically connected with the gate of the IGBT after passing through the resistor Rssd and the resistor Rgoff in sequence, and the gate of the MOS transistor Q3 is electrically connected with the logic processing module.
7. The IGBT driving circuit capable of being turned off in a grading manner according to claim 6, wherein the state detection module comprises a resistor R1, a resistor R2, a resistor R3, a resistor R4, a Schmitt trigger T1, a Schmitt trigger T2 and a comparator OP1, wherein an input end of the Schmitt trigger T1 is electrically connected to a gate electrode of the IGBT through the resistor R1, an input end of the Schmitt trigger T1 is also connected to a midpoint potential through the resistor R3, and an output end of the Schmitt trigger T1 is electrically connected with an inverting input end of the comparator OP1 in an inverted manner; the input end of the schmitt trigger T2 is electrically connected to the gate of the IGBT through the resistor R2, the input end of the schmitt trigger T2 is also connected to the midpoint potential through the resistor R4, and the output end of the schmitt trigger T2 is electrically connected to the non-inverting input end of the comparator OP1 after inverting; the output end of the comparator OP1 is electrically connected with the logic processing module.
8. The IGBT driving circuit capable of being turned off in a grading manner according to claim 7, wherein the logic processing module comprises a NOR gate NAND, a NOR gate U1, a NOR gate U2, a NOR gate U3 and a NOR gate U4, a first input end of the NOR gate NAND is used for inputting PWM control signals, a first input end of the NOR gate NAND is electrically connected to the gate of the MOS transistor Q1 through the NOR gate U1, the first input end of the NOR gate NAND is also electrically connected to the gate of the MOS transistor Q3 through the NOR gate U2, a second input end of the NOR gate NAND is electrically connected to the output end of the comparator OP1, and an output end of the NOR gate NAND is electrically connected to the gate of the MOS transistor Q2 after being sequentially connected in series with the NOR gate U3 and the NOR gate U4.
9. The IGBT drive circuit capable of being turned off in a grading manner according to claim 4, wherein the voltage supplied by the power supply V1 ranges from-10V to-15V.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202122652449.4U CN216774742U (en) | 2021-10-29 | 2021-10-29 | IGBT drive circuit capable of being turned off in grading mode |
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| CN202122652449.4U CN216774742U (en) | 2021-10-29 | 2021-10-29 | IGBT drive circuit capable of being turned off in grading mode |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114844492A (en) * | 2022-07-05 | 2022-08-02 | 深圳芯能半导体技术有限公司 | Two-stage turn-off gate drive circuit |
| CN116647223A (en) * | 2023-07-24 | 2023-08-25 | 深圳基本半导体有限公司 | Gate-level driving circuit, chip and electronic equipment |
-
2021
- 2021-10-29 CN CN202122652449.4U patent/CN216774742U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114844492A (en) * | 2022-07-05 | 2022-08-02 | 深圳芯能半导体技术有限公司 | Two-stage turn-off gate drive circuit |
| CN116647223A (en) * | 2023-07-24 | 2023-08-25 | 深圳基本半导体有限公司 | Gate-level driving circuit, chip and electronic equipment |
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Denomination of utility model: A Gradually Switchable IGBT Driver Circuit Effective date of registration: 20230831 Granted publication date: 20220617 Pledgee: Bank of Communications Limited Shenzhen Branch Pledgor: Shenzhen bronze sword Technology Co.,Ltd. Registration number: Y2023980054850 |
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