CN216751172U - Input overvoltage and output overcurrent protection circuit - Google Patents
Input overvoltage and output overcurrent protection circuit Download PDFInfo
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- CN216751172U CN216751172U CN202220182350.4U CN202220182350U CN216751172U CN 216751172 U CN216751172 U CN 216751172U CN 202220182350 U CN202220182350 U CN 202220182350U CN 216751172 U CN216751172 U CN 216751172U
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Abstract
The utility model relates to the field of household appliance management, and provides an input overvoltage and output overcurrent protection circuit for realizing input overvoltage and output overcurrent protection.
Description
Technical Field
The utility model relates to the field of household appliance management, in particular to an input overvoltage and output overcurrent protection circuit.
Background
Direct current power supply type products often cause the components and parts damage on the PCB board because of too high input voltage or output back end circuit short circuit, influence user's normal use, how to realize input excessive pressure, output overcurrent protection become the problem that awaits a urgent need to solve.
SUMMERY OF THE UTILITY MODEL
The utility model provides an input overvoltage and output overcurrent protection circuit in order to realize input overvoltage and output overcurrent protection.
The technical scheme adopted by the utility model for solving the problems is as follows:
the input overvoltage and output overcurrent protection circuit comprises a voltage input end, a voltage output end, first to eighth resistors, a first MOS tube, a second MOS tube, a third MOS tube and a voltage stabilizing diode,
one end of a fifth resistor is connected with the voltage input end, the other end of the fifth resistor is respectively connected with one end of a sixth resistor and a grid electrode of a third MOS tube, the other end of the sixth resistor is grounded, one end of the first resistor is connected with the voltage input end, the other end of the first resistor is respectively connected with a cathode of a voltage stabilizing diode and one end of a second resistor, an anode of the voltage stabilizing diode is grounded, the other end of the second resistor is respectively connected with a grid electrode of a second MOS tube and a drain electrode of the third MOS tube, a source electrode of the second MOS tube and a source electrode of the first MOS tube are both connected with the voltage input end, a drain electrode of the second MOS tube and one end of a third resistor are both connected with the grid electrode of the first MOS tube, the other end of the third resistor is grounded, a drain electrode of the first MOS tube is connected with one end of a fourth resistor, the other end of the fourth resistor is respectively connected with the voltage output end and one end of a seventh resistor, and the other end of the seventh resistor is respectively connected with a source electrode of the third MOS tube and one end of an eighth resistor, the other end of the eighth resistor is grounded.
Furthermore, the first MOS tube and the second MOS tube are both P-MOS tubes, and the third MOS tube is an N-MOS tube.
Compared with the prior art, the utility model has the beneficial effects that: through detecting input voltage and output current, when the too high or too big condition of output current of input voltage appears, the circuit can start protect function, through MOS pipe disconnect circuit to the protection rear end device can not further damage. In addition, the utility model has simple structure and low manufacturing cost.
Drawings
FIG. 1 is a circuit diagram of an input over-voltage, output over-current protection circuit of the present invention;
fig. 2 is a circuit diagram of an embodiment.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail with reference to the following embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the utility model and are not intended to limit the utility model.
As shown in fig. 1, the input overvoltage and output overcurrent protection circuit includes a voltage input terminal Vin, a voltage output terminal Vout, a first resistor R1 to an eighth resistor R8, a first MOS transistor Q1, a second MOS transistor Q2, a third MOS transistor Q4, and a zener diode D1,
one end of a fifth resistor R5 is connected with a voltage input end Vin, the other end of the fifth resistor R5836 is connected with one end of a sixth resistor R6 and a gate of a third MOS tube Q4 respectively, the other end of the sixth resistor R6 is grounded, one end of a first resistor R1 is connected with the voltage input end Vin, the other end of the first resistor R1 is connected with a cathode of a voltage-stabilizing diode D1 and one end of a second resistor R2 respectively, an anode of the voltage-stabilizing diode D1 is grounded, the other end of a second resistor R2 is connected with a gate of a second MOS tube Q2 and a drain of the third MOS tube Q4 respectively, a source of the second MOS tube Q2 and a source of the first MOS tube Q1 are connected with the voltage input end Vin, a drain of the second MOS tube Q2 and one end of the third resistor R3 are connected with a gate of the first MOS tube Q1, the other end of the third resistor is grounded, a drain of the first MOS tube Q1 is connected with one end of a fourth resistor R4, the other end of the fourth resistor R4 is connected with an output end of a voltage Vout and one end of the seventh resistor R7 respectively, the other end of the seventh resistor R7 is connected to the source of the third MOS transistor Q4 and one end of the eighth resistor R8, respectively, and the other end of the eighth resistor R8 is grounded.
Further, the first MOS transistor Q1 and the second MOS transistor Q2 are both P-MOS transistors, and the third MOS transistor Q4 is an N-MOS transistor.
Examples
In actual use, the voltage input end Vin is connected to the front-end circuit, and the voltage output end Vout is connected to the back-end circuit, as shown in fig. 2, in this embodiment, the voltage input end Vin is connected to the power supply, the voltage output end Vout is connected to the load resistor R9, when the voltage output by the front-end circuit is too high, that is, the voltage of the voltage input end Vin is too high, the gate voltage of the P-MOS transistor Q2 is always unchanged because the voltage of the cathode of the zener diode D1 is unchanged, and when the source voltage of the P-MOS transistor Q2 is higher than vgs (th) of the gate voltage, the P-MOS transistor Q2 is turned on, and at this time, the gate voltage of the P-MOS transistor Q1 is the same as the source voltage thereof, and the P-MOS transistor Q1 is turned off, and no power is supplied to the back-end circuit, thereby implementing overvoltage protection.
When the current of the back-end circuit is far higher than the normal operating current, due to the increase of the current, the voltage drop on the fourth resistor R4 becomes high, the voltage is divided by the seventh resistor R7 and the eighth resistor R8, the source voltage of the N-MOS transistor Q4 becomes low, when the gate voltage and the source voltage of the N-MOS transistor Q4 are higher than vgs (th), the N-MOS transistor Q4 is turned on, the drain voltage of the N-MOS transistor Q4 is pulled low, and when the source voltage and the gate voltage of the P-MOS transistor Q2 are higher than vgs (th), the P-MOS transistor Q2 is turned on, the gate voltage of the P-MOS transistor Q1 is the same as the source voltage thereof, and the P-MOS transistor Q1 is turned off, so that the back-end circuit is no longer powered, and the back-end circuit is protected, thereby realizing overcurrent protection.
Claims (2)
1. The input overvoltage and output overcurrent protection circuit is characterized by comprising a voltage input end, a voltage output end, first to eighth resistors, a first MOS (metal oxide semiconductor) tube, a second MOS tube, a third MOS tube and a voltage stabilizing diode,
one end of a fifth resistor is connected with the voltage input end, the other end of the fifth resistor is respectively connected with one end of a sixth resistor and one end of a third MOS tube, the other end of the sixth resistor is grounded, one end of the first resistor is connected with the voltage input end, the other end of the first resistor is respectively connected with the cathode of a voltage stabilizing diode and one end of a second resistor, the anode of the voltage stabilizing diode is grounded, the other end of the second resistor is respectively connected with the grid of a second MOS tube and the drain of the third MOS tube, the source of the second MOS tube and the source of the first MOS tube are both connected with the voltage input end, the drain of the second MOS tube and one end of the third resistor are both connected with the grid of the first MOS tube, the other end of the third resistor is grounded, the drain of the first MOS tube is connected with one end of a fourth resistor, the other end of the fourth resistor is respectively connected with the voltage output end and one end of a seventh resistor, and the other end of the seventh resistor are respectively connected with the source of the third MOS tube and one end of an eighth resistor, the other end of the eighth resistor is grounded.
2. The input overvoltage and output overcurrent protection circuit according to claim 1, wherein the first MOS transistor and the second MOS transistor are both P-MOS transistors, and the third MOS transistor is an N-MOS transistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202220182350.4U CN216751172U (en) | 2022-01-24 | 2022-01-24 | Input overvoltage and output overcurrent protection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202220182350.4U CN216751172U (en) | 2022-01-24 | 2022-01-24 | Input overvoltage and output overcurrent protection circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN216751172U true CN216751172U (en) | 2022-06-14 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202220182350.4U Active CN216751172U (en) | 2022-01-24 | 2022-01-24 | Input overvoltage and output overcurrent protection circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN216751172U (en) |
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2022
- 2022-01-24 CN CN202220182350.4U patent/CN216751172U/en active Active
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