CN216623073U

CN216623073U - Power supply jitter resistant current mirror circuit

Info

Publication number: CN216623073U
Application number: CN202122123671.5U
Authority: CN
Inventors: 徐静; 田荣军; 朱启举; 张鹏; 张力锋; 石川
Original assignee: Suzhou Feiyu Microelectronics Co ltd
Current assignee: Suzhou Feiyu Microelectronics Co ltd
Priority date: 2021-09-03
Filing date: 2021-09-03
Publication date: 2022-05-27
Anticipated expiration: 2031-09-03

Abstract

The utility model provides a current mirror circuit resisting power supply jitter, which comprises: the N-type current mirror circuit module and the P-type current mirror circuit module are connected, wherein the input end of the N-type current mirror circuit module is connected with the output end of a previous circuit, the output end of the N-type current mirror circuit module is connected with the input end of a next circuit, the input end of the P-type current mirror circuit module is connected with the output end of the previous circuit, and the output end of the P-type current mirror circuit module is connected with the input end of the next circuit; the power supply jitter resistant current mirror circuit has the following beneficial effects: a resistor R is connected between the drain electrodes and the grid electrodes of an input current mirror NMOS tube and a PMOS tube in series, and a ground capacitor C is added to the grid electrodes of the input current mirror NMOS tube and the PMOS tube, so that the grid electrodes of the input current mirror NMOS tube and the PMOS tube reach a high-resistance state, the connection of a parasitic diode is eliminated, and the suppression of the noise and the ground jitter of a power supply is realized.

Description

Power supply jitter resistant current mirror circuit

Technical Field

The utility model relates to the technical field of integrated circuit design, in particular to a power supply jitter resistant current mirror circuit.

Background

The current mirror is a standard component commonly existing in analog integrated circuits, and is also present in some digital circuits, in the traditional voltage mode operational amplifier design, the current mirror is used for generating bias current and serving as an active load, in the novel current mode analog integrated circuit design, the current mirror is widely used for realizing the duplication or multiplication of current signals besides the bias current, the current mirror with complementary polarity can also realize the conversion of differential-single-ended current signals, and the current mirror is not only a basic unit circuit of the integrated circuit, but also a typical current mode circuit.

The current mirror circuit is widely applied to integrated circuit design, the existing current mirror circuit is a PMOS current mirror or an NMOS current mirror, and due to the structural characteristics of the existing current mirror circuit, a parasitic diode connection structure is easily influenced by noise and ground jitter of a power supply, so that the output precision of the current mirror is influenced.

SUMMERY OF THE UTILITY MODEL

In view of the above-mentioned drawbacks of the prior art, an object of the present invention is to provide a power supply jitter resistant current mirror circuit for solving the problem of the prior art that is susceptible to noise and ground jitter of a power supply.

To achieve the above and other related objects, the present invention provides a current mirror circuit resistant to power supply jitter, comprising: the N-type current mirror circuit module and the P-type current mirror circuit module are connected, wherein the input end of the N-type current mirror circuit module is connected with the output end of the last circuit, the output end of the N-type current mirror circuit module is connected with the input end of the next circuit, the input end of the P-type current mirror circuit module is connected with the output end of the last circuit, and the output end of the P-type current mirror circuit module is connected with the input end of the next circuit.

In an embodiment of the utility model, the N-type current mirror circuit module includes a first filtering unit and a first stabilizing unit, an input end of the first filtering unit is connected to an output end of a previous branch circuit, an output end of the first filtering unit is connected to an input end of the first stabilizing unit, and an output end of the first stabilizing unit is connected to an input end of a next branch circuit.

In an embodiment of the utility model, the first filtering unit includes an NMOS transistor T1, a resistor R1, and a capacitor C1, a drain of the NMOS transistor T1 is connected to an output terminal of a previous branch circuit, a drain of the NMOS transistor T1 is connected to a gate of the NMOS transistor T1 through a resistor R1, a gate of the NMOS transistor T1 is connected to a positive electrode of the capacitor C1, a negative electrode of the capacitor C1 is grounded, a gate of the NMOS transistor T1 is connected to an input terminal of the first stabilizing unit, and a source of the NMOS transistor T1 is grounded;

the first stabilizing unit comprises an NMOS tube T2, the input end of the NMOS tube T2 is connected with the output end of the first filtering unit, the drain electrode of the NMOS tube T2 is connected with the input end of the next branch circuit, and the source electrode of the NMOS tube T2 is grounded.

In an embodiment of the utility model, the P-type current mirror circuit module includes a second filtering unit and a second stabilizing unit, an input end of the second filtering unit is connected to an output end of the previous branch circuit, an output end of the second filtering unit is connected to an input end of the second stabilizing unit, and an output end of the second stabilizing unit is connected to an input end of the next branch circuit.

In an embodiment of the utility model, the second filtering unit includes a PMOS transistor T3, a resistor R2, and a capacitor C2, a source of the PMOS transistor T3 is connected to an output terminal of the first voltage source, a drain of the PMOS transistor T3 is connected to an output terminal of the previous branch circuit, a drain of the PMOS transistor T3 is connected to a gate of the PMOS transistor T3 through the resistor R2, a gate of the PMOS transistor T3 is connected to a negative electrode of the capacitor C2, a positive electrode of the capacitor C2 is connected to an output terminal of the second voltage source, and a gate of the PMOS transistor T3 is connected to an input terminal of the second stabilizing unit;

the second stabilizing unit comprises a PMOS tube T4, the grid electrode of the PMOS tube T4 is connected with the output end of the second filtering unit, the source electrode of the PMOS tube T4 is connected with the output end of a third voltage source, and the drain electrode of the PMOS tube T4 is connected with the input end of the next branch circuit.

As described above, the current mirror circuit resisting power supply jitter according to the present invention has the following advantages: the resistor R is connected between the drain electrode and the grid electrode of the input current mirror NMOS tube and the PMOS tube in series, and the ground capacitor C is added to the grid electrode of the current mirror NMOS tube and the PMOS tube, so that the grid electrodes of the input current mirror NMOS tube and the PMOS tube reach a high-resistance state, the connection of a parasitic diode is eliminated, and because the capacitor is charged when the rectified voltage is higher than the capacitor voltage and is discharged when the rectified voltage is lower than the capacitor voltage, the output voltage is basically stable in the charging and discharging processes, the suppression of the noise and the ground jitter of a power supply is finally realized, and the RC filter has a simple structure, so the suppression of the noise and the ground jitter of the power supply can be realized by using a very simple structure.

Drawings

FIG. 1 is a block diagram of the overall structure disclosed in the embodiments of the present invention;

FIG. 2 is a schematic diagram of an N-type current mirror circuit disclosed in an embodiment of the present invention;

FIG. 3 is a schematic diagram of a P-type current mirror circuit disclosed in an embodiment of the present invention;

Detailed Description

The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The utility model is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention. It is to be noted that the features in the following embodiments and examples may be combined with each other without conflict.

It should be noted that the drawings provided in the following embodiments are only for illustrating the basic idea of the present invention, and the components related to the present invention are only shown in the drawings rather than drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of the components in actual implementation may be changed freely, and the layout of the components may be more complicated.

Referring to fig. 1, the present invention provides a current mirror circuit for resisting power jitter, including: an N-type current mirror circuit module and a P-type current mirror circuit module. Specifically, the N-type current mirror circuit module includes a first filtering unit and a first stabilizing unit.

Referring to fig. 2, the first filter unit includes an NMOS transistor T1, a resistor R1, and a capacitor C1, and the first stabilizing unit includes an NMOS transistor T2, in this embodiment, the resistor R1 and the capacitor C1 may take values according to practical applications to achieve suppression of different power and ground noises, and the NMOS transistor T1 and the NMOS transistor T2 are selected as an example for description.

The drain of the NMOS transistor T1 is connected to the output terminal of the previous branch circuit, and the drain of the NMOS transistor T1 is connected to the gate of the NMOS transistor T1 through the resistor R1, the resistor R1 is a voltage-dividing resistor, when charging the C1, the resistor R1 can slow down the speed of the capacitor C1 during charging, so that the charging voltage is relatively gentle, thereby reducing the noise amplitude, and the filtering effect is better, the gate of the NMOS transistor T1 is connected to the positive electrode of the capacitor C1, the negative electrode of the capacitor C1 is grounded, the capacitor C1 charges when the rectified voltage is higher than the voltage of the capacitor C1, the capacitor C1 discharges when the rectified voltage is lower than the voltage of the capacitor C1, during charging and discharging, the output voltage is substantially stable, finally, the suppression of the noise and ground jitter of the power supply is realized, and the source of the NMOS transistor T1 is grounded.

The grid of the NMOS tube T2 is connected with the grid of the NMOS tube T1, the source of the NMOS tube T2 is grounded, the drain of the NMOS tube T2 is connected with the input end of the next branch circuit, the NMOS tube T1 and the NMOS tube T2 have the advantages of small encouragement power, large output power, negative temperature coefficient of output drain current, safety, firmness, high working frequency and simple bias.

By adopting the scheme, the resistor R1 is connected in series between the drain electrode and the grid electrode of the input current mirror NMOS tube, and the ground capacitor C1 is added to the grid electrode of the current mirror NMOS tube, so that the grid electrode of the input current mirror NMOS tube reaches a high-resistance state, the connection of a parasitic diode is eliminated, and the RC filter has a simple structure, so that the suppression of the noise of a power supply and the ground jitter can be realized by using a very simple structure.

Referring to fig. 1, the P-type current mirror circuit module includes a second filtering unit and a second stabilizing unit.

Referring to fig. 3, the second filtering unit includes an NMOS transistor T3, a resistor R2 and a capacitor C2, and the second stabilizing unit includes an NMOS transistor T4, in this embodiment, the resistor R2 and the capacitor C2 may take values according to practical applications to achieve suppression of different power and ground noises, and the NMOS transistor T3 and the NMOS transistor T4 are selected as examples for description below.

The source of the NMOS tube T3 is connected to the first voltage source VDD1, the drain of the NMOS tube T3 is connected to the output terminal of the previous branch circuit, and the drain of the NMOS tube T3 is connected to the gate of the NMOS tube T3 through the resistor R2, the resistor R2 is a voltage dividing resistor, when charging C2, the resistor R2 may slow down the capacitor C2 during charging, so that the charging voltage is relatively gentle, and thus the noise amplitude becomes smaller, the filtering effect is better, the gate of the NMOS tube T3 is connected to the negative electrode of the capacitor C2, the positive electrode of the capacitor C2 is connected to the second voltage source VCC2, when the rectification voltage is higher than the voltage of the capacitor C1, when the rectification voltage is lower than the voltage of the capacitor C1, the capacitor C1 discharges, during charging and discharging, the output voltage is substantially stable, and finally, the noise of the power supply and the suppression of the ground are realized.

The grid electrode of the NMOS tube T4 is connected with the grid electrode of the NMOS tube T3, the source electrode of the NMOS tube T4 is connected with a third voltage source VDD3, the drain electrode of the NMOS tube T4 is connected with the input end of the next branch circuit, the NMOS tube T3 and the NMOS tube T4 have the advantages of small encouragement power, large output power, negative temperature coefficient of output drain current, safety, firmness, high working frequency and simple bias, and the values of the first voltage source VDD1 and the third voltage source VDD3 are usually 3V, 1.8V, 1.5V and the like; the second voltage source VCC2 usually takes on values of 12V, 5V, 3.3V, etc.

By adopting the scheme, the resistor R2 is connected between the drain electrode and the grid electrode of the input PMOS tube in series, and the ground capacitor C2 is added to the grid electrode of the current mirror PMOS tube, so that the grid electrode of the input current mirror PMOS tube reaches a high-resistance state, the connection of a parasitic diode is eliminated, and the RC filter has a simple structure, so that the noise of a power supply and the ground jitter can be inhibited by a very simple structure.

In summary, the utility model eliminates the connection of parasitic diodes by connecting a resistor R in series between the drain and the gate of the input current mirror NMOS and PMOS transistors and adding a capacitance to ground C in the gates of the current mirror NMOS and PMOS transistors to make the gates of the input current mirror NMOS and PMOS transistors reach a high resistance state, and because the capacitance charges when the rectified voltage is higher than the capacitance voltage and discharges when the rectified voltage is lower than the capacitance voltage, the output voltage is substantially stable during the charging and discharging processes, and finally the suppression of the noise and ground jitter of the power supply is realized, and the RC filter has a simpler structure, so the suppression of the noise and ground jitter of the power supply can be realized with a very simple structure. Therefore, the utility model effectively overcomes various defects in the prior art and has high industrial utilization value.

The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the utility model. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.

Claims

1. A power supply jitter resistant current mirror circuit, comprising: the N-type current mirror circuit module and the P-type current mirror circuit module are connected, wherein the input end of the N-type current mirror circuit module is connected with the output end of the last circuit, the output end of the N-type current mirror circuit module is connected with the input end of the next circuit, the input end of the P-type current mirror circuit module is connected with the output end of the last circuit, and the output end of the P-type current mirror circuit module is connected with the input end of the next circuit.

2. A power supply jitter tolerant current mirror circuit as claimed in claim 1, wherein: the N-type current mirror circuit module comprises a first filtering unit and a first stabilizing unit, wherein the input end of the first filtering unit is connected with the output end of the last branch circuit, the output end of the first filtering unit is connected with the input end of the first stabilizing unit, and the output end of the first stabilizing unit is connected with the input end of the next branch circuit.

3. A power supply jitter tolerant current mirror circuit as claimed in claim 2, wherein:

the first filtering unit comprises an NMOS tube T1, a resistor R1 and a capacitor C1, the drain electrode of the NMOS tube T1 is connected with the output end of the last branch circuit, the drain electrode of the NMOS tube T1 is connected with the grid electrode of the NMOS tube T1 through a resistor R1, the grid electrode of the NMOS tube T1 is connected with the positive electrode of the capacitor C1, the negative electrode of the capacitor C1 is grounded, the grid electrode of the NMOS tube T1 is connected with the input end of the first stabilizing unit, and the source electrode of the NMOS tube T1 is grounded;

4. A power supply jitter tolerant current mirror circuit as claimed in claim 1, wherein: the P-type current mirror circuit module comprises a second filtering unit and a second stabilizing unit, wherein the input end of the second filtering unit is connected with the output end of the last branch circuit, the output end of the second filtering unit is connected with the input end of the second stabilizing unit, and the output end of the second stabilizing unit is connected with the input end of the next branch circuit.

5. The power supply jitter tolerant current mirror circuit of claim 4, wherein: the second filtering unit comprises a PMOS tube T3, a resistor R2 and a capacitor C2, wherein the source electrode of the PMOS tube T3 is connected with the output end of the first voltage source, the drain electrode of the PMOS tube T3 is connected with the output end of the last branch circuit, the drain electrode of the PMOS tube T3 is connected with the grid electrode of the PMOS tube T3 through the resistor R2, the grid electrode of the PMOS tube T3 is connected with the negative electrode of the capacitor C2, the positive electrode of the capacitor C2 is connected with the output end of the second voltage source, and the grid electrode of the PMOS tube T3 is connected with the input end of the second stabilizing unit;