CN216389077U

CN216389077U - Thin film capacitor group and low-impurity-inductance busbar suitable for high-voltage SiC MOSFET module

Info

Publication number: CN216389077U
Application number: CN202122778565.0U
Authority: CN
Inventors: 刘弘耀; 毛赛君; 丁育杰
Original assignee: Chenxin Electronics Suzhou Co ltd
Current assignee: Chenxin Electronics Suzhou Co ltd
Priority date: 2021-11-12
Filing date: 2021-11-12
Publication date: 2022-04-26
Anticipated expiration: 2031-11-12

Abstract

The application relates to a power device, the utility model discloses a thin film capacitor group and be applicable to female the arranging of low miscellaneous sense of high pressure SiC MOSFET module, female the arranging of low miscellaneous sense of being applicable to high pressure SiC MOSFET module includes a plurality of thin film capacitor group, thin film capacitor group link is on a PCB base plate, thin film capacitor group difference array setting on each face of PCB base plate, and the setting of staggering of thin film capacitor group on tow sides, and thin film capacitor group all is close to the power module interface setting of SiC MOSFET module, thin film capacitor group includes two low pressure thin film capacitors, two low pressure thin film capacitors 1 pass through the PCB board and connect. The application provides a thin film capacitor group and be applicable to female the arranging of low miscellaneous sense of high pressure SiC MOSFET module, greatly reduced the female cost of arranging of SiC MOSFET module absorption capacitance, reduced the female miscellaneous sense of arranging of absorption capacitance, reduced the manufacturing degree of difficulty, improved the female power density who arranges of whole electric capacity.

Description

Thin film capacitor group and low-impurity-inductance busbar suitable for high-voltage SiC MOSFET module

Technical Field

The application relates to a power device, in particular to a thin film capacitor bank and a low-impurity-inductance busbar suitable for a high-voltage SiC MOSFET module.

Background

At present, the conventional bus thin film capacitor of each capacitor manufacturer generally has a withstand voltage below 1300V, and in the design of the absorption capacitor of a higher-voltage SiC MOSFET module (more than or equal to 1300V), a design scheme of a laminated bus bar and a customized thin film capacitor is generally needed.

SUMMERY OF THE UTILITY MODEL

In order to reduce cost and simultaneously reduce the impurity inductance, the application provides a thin film capacitor group and a low impurity inductance busbar suitable for a high-voltage SiC MOSFET module.

In a first aspect, the present application provides a thin film capacitor bank.

The thin film capacitor group comprises two low-voltage thin film capacitors, and the two low-voltage thin film capacitors are connected in series through a PCB.

By adopting the technical scheme, two conventional low-voltage thin film capacitors are connected in series through a small PCB to form a thin film capacitor group, so that the stray inductance is reduced to be below 30nH and is smaller than that of a customized high-voltage thin film capacitor.

In a second aspect, the present application provides a low parasitic inductance busbar suitable for a high voltage SiC MOSFET module.

Female arranging of low miscellaneous sense suitable for high-pressure SiC MOSFET module, including PCB base plate and a plurality of film capacitor group, including two low pressure film capacitor, two low pressure film capacitor passes through PCB board series connection, the PCB base plate has the power module interface that is used for connecting the SiC MOSFET module and is used for connecting higher level DC power supply's positive input and negative input, film capacitor group connect in on the PCB base plate.

By adopting the technical scheme, two conventional low-voltage thin-film capacitors are connected in series through a small PCB to form a thin-film capacitor group, so that the stray inductance is reduced to be below 30nH, and the conventional low-voltage thin-film capacitors and the PCB substrate are utilized, so that an absorption circuit with low stray inductance can be realized without customizing, the low-voltage thin-film capacitors are applied to high-voltage occasions, and the cost is effectively reduced.

In some embodiments, the front and back sides of the PCB substrate are connected with the thin film capacitor bank power module interface.

Through adopting above-mentioned technical scheme, install film capacitor group respectively at the upper surface and the lower surface of PCB base plate, can reduce the size of PCB base plate greatly, reduce cost improves the female power density who arranges of electric capacity.

In some embodiments, the thin film capacitor sets on each side of the PCB substrate are arranged in a separate array.

By adopting the technical scheme, the sense of impurities is favorably reduced.

In some embodiments, the thin film capacitor sets on the front and back surfaces of the PCB substrate are staggered.

By adopting the technical scheme, the space of the PCB substrate can be fully utilized, and the size of the PCB substrate is reduced.

In some embodiments, the thin-film capacitor banks are each disposed proximate to the power module interface.

By adopting the technical scheme, the distances from all the thin film capacitor groups to the SiC MOSFET module are reduced, so that the sense of impurities introduced by a PCB substrate loop is reduced.

In some embodiments, the PCB substrate is, in order from bottom to top: the lower-layer insulating plate, the lower-layer conductor plate, the middle insulating plate, the upper-layer conductor plate and the upper-layer insulating plate are arranged, the anode input end is arranged on the lower-layer conductor plate, and the cathode input end is arranged on the upper-layer conductor plate.

In some embodiments, the power module interface includes a positive output for connecting to a positive power module electrode and a negative output for connecting to a negative power module electrode, the positive output being located on the lower conductor plate and the negative output being located on a negative plate connected to the PCB substrate, the PCB substrate being connected to the negative plate via a coaxial resistor.

The application provides a thin film capacitor group and be applicable to female arranging of low miscellaneous sense of high pressure SiC MOSFET module and compare with correlation technique:

through installing film capacitor group respectively at the upper surface and the lower surface of PCB base plate, be close to the power module interface of SiC MOSFET module with all film capacitor groups simultaneously, guarantee that all film capacitor groups are minimum to the distance of SiC MOSFET module, guarantee by the miscellaneous sense minimum that the PCB return circuit introduced, simultaneously, the size that can reduce PCB greatly in the both sides of PCB is installed to the electric capacity, reduce cost improves the female power density who arranges of electric capacity.

Drawings

Fig. 1 is a schematic structural diagram of a thin film capacitor bank provided in the present application;

fig. 2 is a schematic structural diagram of a low-impurity-induced busbar suitable for a high-voltage SiC MOSFET module provided in the present application;

fig. 3 is a side view of the low parasitic inductance busbar suitable for use in the high voltage SiC MOSFET module shown in fig. 2;

fig. 4 is a cross-sectional view of a PCB substrate in a low-parasitic busbar suitable for use in a high-voltage SiC MOSFET module as provided herein.

In the figure: 1. a low voltage thin film capacitor; 2. a PCB board; 10. a thin film capacitor bank; 20. a PCB substrate; 21. a power module interface; 211. a positive output end; 212. a negative output end; 22. a positive input terminal; 23. a negative input end; 201. a lower insulating plate; 202. a lower conductor plate; 203. an intermediate insulating plate; 204. an upper conductor plate; 205. an upper insulating plate.

Detailed Description

The present application is described in further detail below with reference to the attached figures.

The application firstly discloses a thin film capacitor group, as shown in fig. 1, comprising two low voltage thin film capacitors 1, wherein the two low voltage thin film capacitors 1 are connected in series through a PCB 2. This application establishes ties two conventional low pressure film capacitor 1 through a fritter PCB board 2, synthesizes a film capacitor group, makes the miscellaneous sense of capacitor group reduce to below 30nH, is less than customized high-pressure film capacitor usually to make its low miscellaneous sense that is applicable to high-pressure SiC MOSFET module female arranging.

The application also discloses female arranging of low miscellaneous sense suitable for high-pressure SiC MOSFET module, as shown in fig. 2 and fig. 3, including a plurality of above-mentioned thin film capacitor group 10, thin film capacitor group 10 connects in a PCB base plate 20's tow sides, and thin film capacitor group 10 on each side of PCB base plate 20 equally divide and do not array setting, and the thin film capacitor group 10 of tow sides staggers the setting on PCB base plate 20 thickness direction. This application will establish ties two conventional low pressure film capacitor 1 through a fritter PCB board 2, synthetic film capacitor group 10, makes the miscellaneous sense reduce to below 30nH, and utilizes conventional low pressure film capacitor 1 and PCB base plate 20, need not to customize the absorption circuit that can realize low miscellaneous sense, is applied to high pressure occasion with low pressure film capacitor 1, effectively reduces the cost. In addition, the thin film capacitor groups 10 are arranged in an array mode, so that the generation of miscellaneous inductance is reduced, the thin film capacitor groups 10 are respectively arranged on the upper surface and the lower surface of the PCB substrate 20, the size of the PCB substrate 20 can be greatly reduced, the cost is reduced, the power density of the capacitor bus bar is improved, the thin film capacitor groups on the front surface and the back surface are arranged in a staggered mode, the space of the PCB substrate can be fully utilized, and the size of the PCB substrate is reduced.

As shown in fig. 2 and 4, the PCB substrate 20 includes, from bottom to top: the power supply comprises a lower insulating plate 201, a lower conductor plate 202 with a positive input end 22 and a positive output end 211, a middle insulating plate 203, an upper conductor plate 204 with a negative input end 23 and an upper insulating plate 205, wherein the positive input end 22 and the negative input end 23 are used for being connected with an upper direct current power supply.

As shown in fig. 2, the PCB substrate 20 has a power module interface 21 for connecting the SiC MOSFET module, the power module interface 21 includes a positive output terminal 211 for connecting with a positive electrode of the power module and a negative output terminal 212 for connecting with a negative electrode of the power module, the positive output terminal 211 is located on the lower conductor plate 202, the negative output terminal 212 is located on a negative plate connected with the PCB substrate 20, and the PCB substrate 20 and the negative plate are connected through a coaxial resistor.

In this embodiment of the present application, the thin film capacitor banks 10 are all disposed as close as possible to the power module interface 21 of the SiC MOSFET module to reduce the distance from all the thin film capacitor banks 10 to the SiC MOSFET module, thereby reducing the parasitic inductance introduced by the circuit of the PCB substrate 20.

The above embodiments are preferred embodiments of the present application, and the protection scope of the present application is not limited by the above embodiments, so: all equivalent changes made according to the structure, shape and principle of the present application shall be covered by the protection scope of the present application.

Claims

1. The thin film capacitor bank is characterized by comprising two low-voltage thin film capacitors (1), wherein the two low-voltage thin film capacitors (1) are connected in series through a PCB (printed circuit board) 2.

2. The low-impurity-inductance busbar suitable for the high-voltage SiC MOSFET module is characterized by comprising a PCB (20) and a plurality of thin film capacitor sets (10) according to claim 1, wherein the PCB (20) is provided with a power module interface (21) for connecting the SiC MOSFET module, and a positive input end (22) and a negative input end (23) for connecting a superior direct-current power supply, and the thin film capacitor sets (10) are connected to the PCB (20).

3. The busbar with low impurity induction suitable for the high-voltage SiC MOSFET module according to claim 2, wherein the power module interface of the thin film capacitor bank (10) is connected to both the front side and the back side of the PCB substrate (20).

4. The low-impurity-inductance busbar suitable for the high-voltage SiC MOSFET module according to claim 3, wherein the thin-film capacitor groups (10) on each surface of the PCB substrate (20) are respectively arranged in an array.

5. The low-impurity-inductance busbar for the high-voltage SiC MOSFET module according to claim 3 or 4, wherein the thin-film capacitor groups (10) on the front and back surfaces of the PCB substrate (20) are arranged in a staggered manner.

6. The low parasitic busbar for a high voltage SiC MOSFET module according to claim 5, wherein said thin film capacitor banks (10) are each disposed proximate to said power module interface (21).

7. The low-impurity-inductance busbar suitable for the high-voltage SiC MOSFET module according to claim 2, wherein the PCB substrate (20) comprises, from bottom to top: the low-voltage-resistant high-voltage-resistant cable comprises a lower insulating plate (201), a lower conductor plate (202), a middle insulating plate (203), an upper conductor plate (204) and an upper insulating plate (205), wherein the positive input end (22) is arranged on the lower conductor plate (202), and the negative input end (23) is arranged on the upper conductor plate (204).

8. The busbar of claim 7, wherein the power module interface (21) comprises a positive output terminal (211) for connecting to a positive electrode of the power module and a negative output terminal (212) for connecting to a negative electrode of the power module, the positive output terminal (211) is located on the lower conductor plate (202), the negative output terminal (212) is located on a negative plate connected to the PCB substrate (20), and the PCB substrate (20) and the negative plate are connected by a coaxial resistor.