CN216352197U - Manual reset power-down prevention circuit and electronic equipment - Google Patents
Manual reset power-down prevention circuit and electronic equipment Download PDFInfo
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- CN216352197U CN216352197U CN202122879362.0U CN202122879362U CN216352197U CN 216352197 U CN216352197 U CN 216352197U CN 202122879362 U CN202122879362 U CN 202122879362U CN 216352197 U CN216352197 U CN 216352197U
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Abstract
The utility model discloses a manual reset power-down prevention circuit and electronic equipment. The manual reset power failure prevention circuit comprises a reset module, a charge-discharge module, a first power-on module, a second power-on module and a level locking module, wherein when the reset module starts reset, the first power-on module starts to enable the charge-discharge module to discharge to control the level locking module to lock an output level, and when the microprocessor is powered on, the second power-on module performs compensation charging on the charge-discharge module. When the reset module is manually started to reset, the first power-on module is started to enable the charging and discharging module to discharge the control level locking module to lock the output level, and when the microprocessor is powered on, the second power-on module is used for compensating charging of the charging and discharging module so as to compensate the condition that the capacitor of the charging and discharging module is insufficiently charged during manual reset, thereby effectively preventing power failure during reset and improving the reliability of reset.
Description
Technical Field
The utility model relates to the electronic circuit technology, in particular to a manual reset power-down prevention circuit and electronic equipment.
Background
The reset circuit is an important part in electronic control, and is an indispensable part for ensuring the stable and reliable operation of circuits in a microcomputer system, the main function of the reset circuit is power-on reset, so that a CPU and various parts of the system are in a determined initial state and start to operate from the initial state, and then when a program is abnormal, external reset is carried out, and the system starts to operate again in the initial state.
In order to ensure that the system can be restarted by manual operation when the system is abnormal and necessary, the conventional manual RESET circuit is connected to a RESET (RESET) pin of the MCU through a key to RESET the circuit, but when the whole circuit system of the electronic equipment controls the power supply of the whole system by using a soft switch, the conventional RESET circuit cannot normally maintain the power supply of the system when working, and the RESET is unsuccessful.
Thus, the existing manual reset circuit still needs to be improved and improved.
SUMMERY OF THE UTILITY MODEL
In view of the above-mentioned shortcomings in the prior art, an object of the present invention is to provide a manual reset power down prevention circuit and an electronic device, which can improve the reliability of reset.
In order to solve the technical problems, the utility model adopts the following technical scheme:
a manual reset power-off prevention circuit is used for resetting a microprocessor of electronic equipment and comprises a reset module, a charge-discharge module, a first power-on module, a second power-on module and a level locking module, wherein when the reset module starts reset, the first power-on module starts to enable the charge-discharge module to discharge to control the level locking module to lock an output level, and when the microprocessor is powered on, the second power-on module performs compensation charging on the charge-discharge module.
As an improvement of the present invention, the first power supply module includes a first MOS transistor, a first resistor, and a first diode, a gate of the first MOS transistor is connected to the reset module, the second power supply module, and one end of the first resistor, a source of the first MOS transistor is connected to a negative electrode of the first diode and the other end of the first resistor, a drain of the first MOS transistor is connected to the charge-discharge module, and an anode of the first diode is connected to the VCC power supply terminal.
As an improvement of the present invention, the charge and discharge module includes a capacitor, a second resistor, and a second diode, an anode of the second diode is connected to a drain of the first MOS transistor, is also grounded through the capacitor, and is also grounded through the second resistor, and a cathode of the second diode is connected to the level locking module.
As an improvement of the present invention, the level locking module includes a first triode, a third resistor and a fourth resistor, a base of the first triode is connected to a negative electrode of the second diode through the third resistor and is also grounded through the fourth resistor, an emitter of the first triode is grounded, and a collector of the first triode is connected to the power switch module of the electronic device.
As a further improvement of the present invention, the second power supply module includes a second triode, a fifth resistor and a sixth resistor, a base of the second triode is connected to the IO3 pin of the microprocessor through the fifth resistor and also grounded through the sixth resistor, an emitter of the second triode is grounded, and a collector of the second triode is connected to the gate of the first MOS transistor and the reset module.
As a further improvement of the present invention, the reset module includes a reset key, a third diode, a fourth diode, a seventh resistor, and an eighth resistor, one end of the reset key is connected to a negative electrode of the third diode and a negative electrode of the fourth diode, the other end of the reset key is grounded, a positive electrode of the third diode is connected to a gate of the first MOS transistor and a collector of the second triode through the seventh resistor, and a positive electrode of the fourth diode is connected to a reset pin of the microcontroller through the eighth resistor.
As a further improvement of the present invention, the power switch module includes a power key, a second MOS transistor, a fifth diode, a sixth diode, and a ninth resistor, one end of the power key is connected to a negative electrode of the fifth diode and a negative electrode of the sixth diode, a positive electrode of the sixth diode is connected to an IO2 pin of the microprocessor, and a positive electrode of the fifth diode is connected to a gate of the second MOS transistor and a collector of the first triode, and is also connected to the VCC power supply terminal through the ninth resistor.
As a further improvement of the present invention, the manual reset power-down prevention circuit further includes a seventh diode, an anode of the seventh diode is connected to the IO1 pin of the microprocessor, and a cathode of the seventh diode is connected to a cathode of the second diode and also connected to a base of the second triode through the third resistor.
The utility model also provides electronic equipment which comprises a microprocessor, a power switch module and a manual reset power-off prevention circuit, wherein the manual reset power-off prevention circuit is connected with the microprocessor and the power switch module.
Compared with the prior art, the manual reset power-down prevention circuit and the electronic equipment provided by the utility model have the advantages that when the reset module manually starts reset, the first power-up module starts to enable the charge-discharge module to discharge and control the level locking module to lock the output level, when the microprocessor is powered on, the second power-up module compensates charge for the charge of the charge-discharge module so as to compensate the condition that the capacitor of the charge-discharge module is insufficiently charged during manual reset, the power-down during reset is effectively prevented, and the reset reliability is improved.
Drawings
Fig. 1 is a schematic circuit diagram of a manual reset power-down prevention circuit provided by the utility model.
Reference is made to the accompanying drawings in which:
the charging and discharging module comprises a reset module 1, a charging and discharging module 2, a first power-continuing module 3, a second power-continuing module 4, a level locking module 5, a power switch module 6, a first MOS (metal oxide semiconductor) tube Q1, a first resistor R1, a first diode D1, a capacitor C1, a second resistor R2, a second diode D2, a first triode Q2, a third resistor R3, a fourth resistor R4, a second triode Q3, a fifth resistor R5, a sixth resistor R6, a reset key K1, a third diode Q3, a fourth diode D4, a seventh resistor R7, an eighth resistor R8, a power key K2, a second MOS tube Q4, a fifth diode D5, a sixth diode D6, a ninth resistor R9, a seventh diode D7
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the utility model and are not intended to limit the utility model.
It will be understood that when an element is referred to as being "on," "secured to" or "disposed on" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or intervening elements may also be present.
It should be noted that the terms of orientation such as left, right, up and down in the embodiments of the present invention are only relative to each other or are referred to the normal use state of the product, and should not be considered as limiting.
In order to overcome the defects of the conventional reset circuit, the utility model introduces a capacitor energy storage circuit and a switch circuit based on an MOS tube switch, and solves the problem of power failure of the manual reset circuit in the states of manual reset and soft on-off by utilizing the charge-discharge characteristics of a capacitor.
The manual reset power-down prevention circuit provided by the utility model is used for resetting a microprocessor of electronic equipment, and referring to fig. 1, the manual reset power-down prevention circuit comprises a reset module 1, a charge and discharge module 2, a first power-down module 3, a second power-down module 4 and a level locking module 5, the microprocessor is electronic equipment (such as a television, a temperature and humidity recorder and the like), the reset module 1 and the second power-down module 4 are connected with the first power-down module 3, and the first power-down module 3 is connected with an IO1 pin of the microprocessor and the level locking module 5.
When the reset module 1 starts reset, the first power-on module 3 starts to enable the charge-discharge module 2 to discharge to control the level locking module 5 to lock an output level, when the microprocessor is powered on, the second power-on module 4 performs compensation charging on the charge-discharge module 2 so as to compensate the situation that the capacitor C1 of the charge-discharge module 2 is insufficiently charged during manual reset, thereby effectively preventing power failure during reset and improving the reliability of reset.
Referring to fig. 1, the first power module 3 includes a first MOS transistor Q1, a first resistor R1 and a first diode D1, the first MOS transistor Q1 is a P-channel MOS transistor, the first MOS transistor Q1 is turned on when the gate of the first MOS transistor Q1 is at a low level, the first resistor R1 is a pull-up resistor, and the first diode D1 mainly plays a role in isolation and preventing backflow of signals.
The grid of first MOS pipe Q1 connects the one end of resetting module 1, second continuation of electricity module 4 and first resistance R1, and the negative pole of first diode D1 and the other end of first resistance R1 are connected to the source electrode of first MOS pipe Q1, charge-discharge module 2 is connected to the drain electrode of first MOS pipe Q1, VCC supply end is connected to the positive pole of first diode D1.
The charging and discharging module 2 comprises a capacitor C1, a second resistor R2 and a second diode D2, the capacitor C1 plays a role in storage and power supply, and the second diode D2 also plays a role in isolation and prevents backflow of signals. In the present embodiment, the first and second electrodes are,
the anode of the second diode D2 is connected to the drain of the first MOS transistor Q1, also to ground through the capacitor C1, and also to ground through the second resistor R2, and the cathode of the second diode D2 is connected to the level-locking module 5.
The level locking module 5 includes a first triode Q2, a third resistor R3 and a fourth resistor R4, the first triode Q2 is an NPN triode, when the base of the triode Q2 is at a high level, the first triode Q2 is turned on, and the third resistor R3 is a current-limiting resistor.
The base of the first triode Q2 is connected with the cathode of the second diode D2 through a third resistor R3 and also grounded through a fourth resistor R4, the emitter of the first triode Q2 is grounded, and the collector of the first triode Q2 is connected with the power switch module 6 of the electronic device.
Referring to fig. 1, the second recharging module 4 includes a second transistor Q3, a fifth resistor R5, and a sixth resistor R6, the second transistor Q3 is also an NPN transistor, and the fifth resistor R5 is also a current-limiting resistor when the base thereof is at a high level.
The base electrode of the second triode Q3 is connected with the IO3 pin of the microprocessor through a fifth resistor R5 and is also grounded through a sixth resistor R6, the emitting electrode of the second triode Q3 is grounded, and the collector electrode of the second triode Q3 is connected with the grid electrode of the first MOS tube Q1 and the reset module 1. After the microprocessor is powered on, the pin IO3 outputs high level to make the second triode conductive for compensating the charging time of the capacitor C1.
The reset module 1 comprises a reset key K1, a third diode Q3, a fourth diode D4, a seventh resistor R7 and an eighth resistor R8, wherein the reset key K1 is a switch key for a user to press and manually start reset. One end of the reset key K1 is connected to the cathode of the third diode Q3 and the cathode of the fourth diode D4, the other end of the reset key K1 is grounded, the anode of the third diode Q3 is connected to the gate of the first MOS transistor Q1 and the collector of the second transistor Q3 through a seventh resistor R7, and the anode of the fourth diode D4 is connected to the reset pin of the microcontroller through an eighth resistor R8.
The power switch module 6 includes a power key K2, a second MOS transistor Q4, a fifth diode D5, a sixth diode D6 and a ninth resistor R9, the power key K2 may also adopt a switch key for a user to press a manual start power, the second MOS transistor Q4 also adopts a P-channel MOS transistor, and when the gate of the second MOS transistor Q4 is at a low level, the second MOS transistor Q4 is turned on. The ninth resistor R9 is a pull-up resistor.
One end of the power key K2 is connected to the cathode of the fifth diode D5 and the cathode of the sixth diode D6, the anode of the sixth diode D6 is connected to the IO2 pin of the microprocessor, and the anode of the fifth diode D5 is connected to the gate of the second MOS transistor Q4 and the collector of the first triode, and is also connected to the VCC power supply terminal through the ninth resistor R9.
The manual reset power-off prevention circuit further comprises a seventh diode D7, the seventh diode D7 is an isolation diode, the anode of the seventh diode D7 is connected with an IO1 pin of the microprocessor, the cathode of the seventh diode D7 is connected with the cathode of the second diode D2, and the cathode of the seventh diode D7 is also connected with the base of the second triode Q3 through a third resistor R3.
For a better understanding of the present invention, the working principle of the manual reset power-down prevention circuit of the present invention is explained in detail below with reference to fig. 1:
in fig. 1, a VCC power supply terminal is a system power supply, and a microprocessor may employ an MSP430 series chip, such as an MSP430F6736 chip, which has rich IO (e.g., a P port of the MSP430 chip) and good expansion performance, such as an IO3 port.
When the RESET key is pressed, a RESET pin RESET _ MCU of the microprocessor is changed into low level to trigger the microprocessor to RESET, meanwhile, the first MOS tube Q1, the first triode Q2 and the second MOS tube Q4 are all conducted, the capacitor C1 discharges in the RESET period to maintain the conduction of the first triode Q2, the level of an IO1 port of the microprocessor is locked to maintain the power supply of a system, and the power failure of the system power supply is prevented. When the charge stored in the capacitor C1 comes from the pressing of the reset key K1, the first MOS transistor Q1 is turned on, and the system power VCC of the capacitor C1 is charged through the first diode D1.
In addition, after the reset key is pressed, the charge provided by the capacitor C1 is not enough to maintain the power consumed by the conduction of the first transistor Q2 during the reset period, so that when the microprocessor is powered on, the output of high level from the IO3 port controls the conduction of the second MOS transistor Q4, further enabling the first MOS transistor Q1, which can provide 500mS of charging time for the first MOS transistor Q1, so as to compensate the situation that the capacitor C1 is not enough charged when the reset key is pressed.
The utility model also provides electronic equipment which comprises a microprocessor, a power switch module and a manual reset power-off prevention circuit, wherein the manual reset power-off prevention circuit is connected with the microprocessor and the power switch module. Since the manual reset power down prevention circuit has been described in detail above, it is not described herein again.
In summary, when the reset module manually starts reset, the first power-on module starts to enable the charge-discharge module to discharge and control the level locking module to lock the output level, and when the microprocessor is powered on, the second power-on module performs compensation charge on the charge-discharge module to compensate the situation that the capacitor of the charge-discharge module is insufficiently charged during manual reset, so that power failure during reset is effectively prevented, and the reliability of reset is improved. The utility model adopts a few conventional electronic devices, realizes the function of preventing the power failure of the microprocessor power supply by resetting, and increases the reliability of product resetting on the premise of increasing lower cost.
It should be understood that the technical solutions and the inventive concepts according to the present invention may be equally replaced or changed by those skilled in the art, and all such changes or substitutions should fall within the protection scope of the appended claims.
Claims (10)
1. A manual reset power-off prevention circuit is used for resetting a microprocessor of electronic equipment and is characterized by comprising a reset module, a charge-discharge module, a first power-on module, a second power-on module and a level locking module, wherein when the reset module starts reset, the first power-on module starts to enable the charge-discharge module to discharge and control the level locking module to lock an output level, and when the microprocessor is powered on, the second power-on module performs compensation charging on the charge-discharge module.
2. The manual reset power-off prevention circuit according to claim 1, wherein the first power-on module comprises a first MOS transistor, a first resistor and a first diode, a gate of the first MOS transistor is connected to the reset module, the second power-on module and one end of the first resistor, a source of the first MOS transistor is connected to a cathode of the first diode and the other end of the first resistor, a drain of the first MOS transistor is connected to the charge-discharge module, and an anode of the first diode is connected to the VCC power supply terminal.
3. The manual reset power-off prevention circuit according to claim 2, wherein the charge-discharge module comprises a capacitor, a second resistor and a second diode, an anode of the second diode is connected to a drain of the first MOS transistor, grounded through the capacitor, and grounded through the second resistor, and a cathode of the second diode is connected to the level-locking module.
4. The manual reset power-down prevention circuit according to claim 3, wherein the level locking module comprises a first triode, a third resistor and a fourth resistor, wherein the base of the first triode is connected with the cathode of the second diode through the third resistor and is also connected with the ground through the fourth resistor, the emitter of the first triode is connected with the ground, and the collector of the first triode is connected with the power switch module of the electronic device.
5. The manual reset power-off prevention circuit according to claim 3, wherein the second power-on module comprises a second triode, a fifth resistor and a sixth resistor, the base of the second triode is connected with the IO3 pin of the microprocessor through the fifth resistor and is also connected with the ground through the sixth resistor, the emitter of the second triode is connected with the ground, and the collector of the second triode is connected with the gate of the first MOS transistor and the reset module.
6. The manual reset power-off prevention circuit according to claim 5, wherein the reset module comprises a reset key, a third diode, a fourth diode, a seventh resistor and an eighth resistor, one end of the reset key is connected with the cathode of the third diode and the cathode of the fourth diode, the other end of the reset key is grounded, the anode of the third diode is connected with the gate of the first MOS transistor and the collector of the second triode through the seventh resistor, and the anode of the fourth diode is connected with the reset pin of the microcontroller through the eighth resistor.
7. The manual reset power-off prevention circuit according to claim 4, wherein the power switch module comprises a power key, a second MOS transistor, a fifth diode, a sixth diode and a ninth resistor, one end of the power key is connected with a negative electrode of the fifth diode and a negative electrode of the sixth diode, a positive electrode of the sixth diode is connected with an IO2 pin of the microprocessor, and a positive electrode of the fifth diode is connected with a grid electrode of the second MOS transistor and a collector electrode of the first triode and is also connected with the VCC power supply terminal through the ninth resistor.
8. The manual reset power-down prevention circuit according to claim 5, further comprising a seventh diode, wherein an anode of the seventh diode is connected to the IO1 pin of the microprocessor, and a cathode of the seventh diode is connected to a cathode of the second diode and also connected to the base of the second triode through the third resistor.
9. The manual reset power-off prevention circuit of claim 7, wherein the first MOS transistor and the second MOS transistor are both P-channel MOS transistors.
10. An electronic device comprising a microprocessor and a power switch module, further comprising a manual reset power-down prevention circuit as claimed in any one of claims 1 to 9, the manual reset power-down prevention circuit being connected to the microprocessor and the power switch module.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202122879362.0U CN216352197U (en) | 2021-11-23 | 2021-11-23 | Manual reset power-down prevention circuit and electronic equipment |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202122879362.0U CN216352197U (en) | 2021-11-23 | 2021-11-23 | Manual reset power-down prevention circuit and electronic equipment |
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| Publication Number | Publication Date |
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| CN216352197U true CN216352197U (en) | 2022-04-19 |
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| CN202122879362.0U Active CN216352197U (en) | 2021-11-23 | 2021-11-23 | Manual reset power-down prevention circuit and electronic equipment |
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- 2021-11-23 CN CN202122879362.0U patent/CN216352197U/en active Active
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