CN216250718U - Lead frame and semiconductor device package - Google Patents

Lead frame and semiconductor device package Download PDF

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Publication number
CN216250718U
CN216250718U CN202122888076.0U CN202122888076U CN216250718U CN 216250718 U CN216250718 U CN 216250718U CN 202122888076 U CN202122888076 U CN 202122888076U CN 216250718 U CN216250718 U CN 216250718U
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chip
lead frame
plastic
package
frame
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CN202122888076.0U
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吴泽星
张超
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Wuxi China Resources Huajing Microelectronics Co Ltd
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Wuxi China Resources Huajing Microelectronics Co Ltd
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Abstract

The utility model provides a lead frame and a semiconductor device packaging body, wherein at least one first waterproof groove is arranged at the joint of a plastic packaging body and a radiating fin, so that the adhesion between the plastic packaging body and the lead frame can be improved, and the amount of chemical substance liquid which can permeate into a gap between the radiating fin and the plastic packaging body in the surface treatment process of the semiconductor device packaging body is further reduced and controlled, thereby solving the problem that a coating on the surface of the radiating fin is corroded and discolored to form a coating watermark. In addition, at least one first waterproof groove arranged at the joint of the plastic package body and the radiating fin plays a role in preventing seepage in advance relative to a second waterproof groove arranged on the periphery of the slide frame, so that the seepage amount in the semiconductor device package body can be effectively reduced, and the problem that the chip performance is influenced by the fact that seepage is driven to the chip position in the slide frame in a long way is avoided.

Description

Lead frame and semiconductor device package
Technical Field
The utility model relates to the technical field of semiconductor device packaging, in particular to a lead frame and a semiconductor device packaging body.
Background
Most of the surface packages of the existing semiconductor devices (such as power devices) adopt a lead frame packaging mode, and a radiating fin is arranged on a lead frame to realize heat dissipation, namely, chips subjected to scribing are welded on the lead frame through a welding material, then metal materials are used for connecting pins of the lead frame and the surfaces of the chips to realize electrical communication, finally, the chips are sealed by a plastic package resin material (the plastic package resin material is formed into a plastic package body), part of the pins of the lead frame are exposed out of the plastic package body and used as welding electrodes, the packaged products are welded on a PCB in a reflow soldering mode in the application process, and part of the radiating fin of the lead frame is exposed out of the plastic package body and used for realizing the heat dissipation of the chips.
However, in the conventional semiconductor device package, the problem that the plating layer on the surface of the heat sink is corroded and discolored to form a plating watermark easily occurs.
SUMMERY OF THE UTILITY MODEL
The utility model aims to provide a lead frame and a semiconductor device package, which can solve the problem that a plating layer on the surface of a radiating fin is corroded and discolored to form a plating layer watermark.
In order to achieve the above object, the present invention provides a lead frame, which has at least one chip package region, each chip package region includes a heat sink, a chip carrier frame and at least one pin, the chip carrier frame is used for carrying a chip, the chip and the lead frame of the chip package region are plastically packaged together by a corresponding plastic package body, the pin and the heat sink are both disposed on the periphery of the chip carrier frame, wherein each chip package region further has at least one first waterproof groove, each first waterproof groove is disposed near a joint of the heat sink and the plastic package body and within an outer edge of the plastic package body, and each first waterproof groove continuously extends along a direction of the joint of the heat sink and the plastic package body on the lead frame and is sealed by the heat sink and the plastic package body together into a closed waterproof groove.
Optionally, the distance between the outermost first waterproof groove and the outer edge of the plastic package body is not greater than 0.5 mm.
Optionally, each chip packaging area further has at least one second waterproof groove surrounding the periphery of the chip carrier frame.
Optionally, the longitudinal section of the first waterproof groove is V-shaped or U-shaped.
Optionally, the first waterproof grooves are distributed at equal intervals with equal line width and equal groove depth.
Optionally, the heat sink is further provided with a mounting fixing hole; and/or the outer edge of the radiating fin is also provided with a notch.
Optionally, in each chip package region, all the pins are distributed on the same side of the chip carrier frame, and the heat sink is distributed on the other side of the chip carrier frame.
Optionally, the adjacent pins are connected through corresponding connecting ribs, and the adjacent two chip packaging regions are connected through corresponding connecting ribs.
Based on the same utility model concept, the utility model also provides a semiconductor device packaging body, which comprises the lead frame, at least one chip and the plastic packaging body, wherein each chip is loaded on the chip carrying frame of the chip packaging area corresponding to the lead frame in a one-to-one correspondence manner, and the lead frame of the chip packaging area and the chip are plastically packaged together by the plastic packaging body.
Optionally, the chip is an IGBT device chip.
Compared with the prior art, the technical scheme of the utility model has at least one of the following beneficial effects:
1. the at least one first waterproof groove is arranged at the joint of the plastic package body and the radiating fin, so that the adhesion between the plastic package body and the lead frame can be improved, and the amount of chemical substance liquid which can permeate into a gap between the radiating fin and the plastic package body in the surface treatment process of the semiconductor device package body is further reduced and controlled, so that the problem that a coating on the surface of the radiating fin is corroded and discolored to form a coating watermark is solved.
2. The at least one first waterproof groove arranged at the joint of the plastic package body and the radiating fin plays a role in preventing seepage in advance relative to the second waterproof groove arranged on the periphery of the slide frame, so that the seepage amount in the semiconductor device package body can be effectively reduced, and the problem that the chip performance is influenced by the fact that seepage is driven to the chip position in the slide frame in a long way is avoided.
3. The first waterproof groove and the second waterproof groove are arranged on the lead frame as many as possible, and the moisture resistance of the semiconductor device packaging body can be improved.
Drawings
Fig. 1 is a schematic structural diagram of a conventional lead frame with a plating watermark problem.
Fig. 2 is a schematic structural diagram of a lead frame according to an embodiment of the utility model.
Fig. 3 is a schematic cross-sectional view of a lead frame according to an embodiment of the present invention at a first waterproof groove.
Fig. 4 is a schematic structural diagram of a lead frame according to another embodiment of the present invention.
Fig. 5 is a schematic structural diagram of a lead frame according to still another embodiment of the present invention.
Wherein the reference numerals in the figures are as follows:
101-a slide frame; 102-a second waterproof slot; 103-pin; 104-a heat sink; 105-plating watermark; 106-a first watertight trough; 107-mounting fixing holes; 108-nut holes; 109-a gap; and 20-molding the package body.
Detailed Description
In the following description, numerous specific details are set forth in order to provide a more thorough understanding of the present invention. It will be apparent, however, to one skilled in the art, that the present invention may be practiced without one or more of these specific details. In other instances, well-known features have not been described in order to avoid obscuring the utility model. It is to be understood that the present invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the utility model to those skilled in the art. In the drawings, the size and relative sizes of layers and regions may be exaggerated for clarity. Like reference numerals refer to like elements throughout. It will be understood that when an element or layer is referred to as being "on" …, "or" connected to "other elements or layers, it can be directly on, connected to, or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on …", "directly connected to" other elements or layers, there are no intervening elements or layers present. Although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present invention. Spatial relationship terms such as "under … …", "below", "lower", "over … …", "above", "upper", and the like may be used herein for ease of description to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, then elements or features described as "under … …", "beneath", "below" would then be oriented "over" the other elements or features. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatial descriptors used herein interpreted accordingly. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the utility model. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, steps, operations, elements, components, and/or groups thereof. As used herein, the term "and/or" includes any and all combinations of the associated listed items.
The technical solution proposed by the present invention will be further described in detail with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.
As described in the background art, referring to fig. 1, in the conventional packaging scheme of the semiconductor power device, generally, a diced chip is welded on a chip-carrying frame 101 of a lead frame through a welding material, a metal material is used to connect a lead 103 of the lead frame with the surface of the chip to realize electrical communication, and finally, a plastic-package resin material (the plastic-package resin material is formed into a plastic-package body 20) is used to seal the chip and the lead frame, that is, the plastic-package body 20 plastically packages the chip and the lead frame together, a part of the lead 103 of the lead frame is exposed out of the plastic-package body 20 to serve as a welding electrode, and a heat sink 104 is disposed on the lead frame to dissipate heat of the chip on the chip-carrying frame 101.
The utility model discloses a research finds that, because the expansion coefficients of the heat sink 104 and the plastic-packaging resin of the lead frame are different, after the semiconductor power device with the heat sink 104 is packaged, the joint between the plastic-packaging body 20 and the heat sink 104 formed by the plastic-packaging resin actually has extremely tiny gaps (not shown), during the surface treatment (for example, surface chemical plating) of the semiconductor power device packaging body, a certain amount of liquid containing chemical substances can infiltrate into the gaps between the plastic-packaging body 20 and the heat sink 104 and be retained, and during the subsequent processing and use of the semiconductor power device packaging body, there can be some high-temperature processes, and along with the rise of temperature during these high-temperature processes, the chemical substances remained in the gaps between the plastic-packaging body 20 and the heat sink 104 can be gathered and overflow to the surface of the heat sink 104 in the form of aerial fog, so as to discolor the corrosion plating layer on the surface of the heat sink 104, a plated watermark 105 is formed.
Although the second waterproof grooves 102 are also provided in the conventional lead frame, the second waterproof grooves 102 are generally provided on the periphery of the chip carrier 101 in consideration of only protecting the chip on the chip carrier 101. The joint between the plastic package body 20 and the heat sink 104 is generally far away, the influence of the seepage liquid in the surface treatment process after packaging on the appearance of the surface coating of the heat sink is not considered, and when the seepage liquid amount is large, the seepage liquid is easily driven to the chip part in the slide frame 101 for a long time, so that the performance of the chip is influenced.
Based on the above, the utility model provides an improved lead frame and a semiconductor device package, which can solve the problem that the coating on the surface of a heat sink is corroded and discolored to form a coating watermark, and simultaneously can prevent seepage from being driven to the chip part to affect the performance of the chip.
Referring to fig. 2, an embodiment of the utility model provides a lead frame, which may have one chip package region or at least two chip package regions, only one chip package region is shown in fig. 2, and when there are a plurality of chip package regions, corresponding connecting ribs are disposed on the lead frame to connect adjacent chip package regions.
Wherein each chip package region includes a heat spreader 104, a carrier frame 101, and at least one pin 103. The carrier frame 101 is generally located in the central region of the chip package region for carrying and bonding a chip, which may be an IGBT device chip or the like. The leads 103 and heat sink 104 of each chip package region are disposed on the periphery of the carrier frame 101 of the chip package region. After the molding compound 20 molds the chip and the lead frame of the chip packaging area together, the outer edge of the heat sink 104 is exposed by the molding compound 20 to dissipate heat of the chip carried on the carrier frame 101.
The number of pins 103 in each chip-packaging region may be set according to the requirements of the chip loaded in the slide frame 101 of the chip-packaging region, and the number of pins 103 may be greater than or equal to 1. As an example, a part of the pins 103 is buried by the molding compound 20 after the molding compound 20 is molded to form a dummy terminal, and another part of the pins 103 is used to connect one end of the chip and is molded by the molding compound 20, while the end (i.e. the outer edge of the pins) away from the chip is exposed by the molding compound 20 to serve as a welding electrode for welding the chip to a PCB outside the package. As another example, at least one end of all the leads 103 in the chip package region (i.e., the outer edge of the leads) away from the chip is exposed by the molding compound 20, and serves as a bonding electrode for bonding the chip carried in the chip package region to a PCB outside the package.
The layout of the leads 103 in each chip-packaging region depends on the layout of the chips loaded in the chip-packaging region that need to be brought out. Optionally, in each chip package region, all the leads 103 are distributed on the same side of the carrier frame 101, and the heat sink 104 is distributed on the other side of the carrier frame 101. At this time, in each chip package region, a region where the lead 103 is located and a region where the heat sink 104 is located are disposed on opposite sides of the carrier frame 101. For example, in a chip package area, the leads 103 are disposed on the lower side of the chip 101 and the heat sink 104 is disposed on the upper side of the chip 101.
The lead frame is generally cut after the molding is completed to obtain the final semiconductor device packages independent of each other, and the respective leads 103 are separated from each other. Therefore, further alternatively, before the lead frame is cut, in each chip package region, the adjacent leads 103 are connected by the corresponding connecting ribs, and the adjacent two chip package regions are connected by the corresponding connecting ribs.
In this embodiment, each chip package region further has at least one first waterproof groove 106, each first waterproof groove is disposed near a junction of the heat sink 104 and the plastic package body 20 and covered by the plastic package body 20, and each first waterproof groove 106 continuously extends along a direction of the junction of the heat sink 104 and the plastic package body 20 on the lead frame and is sealed by the heat sink 104 and the plastic package body 20 together to form a closed waterproof groove. When the first waterproof grooves 106 are a plurality of grooves, each first waterproof groove 106 is disposed from the outer edge of the plastic package body 20 one by one (i.e. layer by layer), at equal intervals, and with equal line width, please refer to fig. 3, the longitudinal section of each first waterproof groove is V-shaped or U-shaped. The distance D between the outermost first waterproof groove 106 and the outer edge of the plastic package body 20 is not more than 0.5mm, the interval D between two adjacent first waterproof grooves 106 is less than D, and the groove depth h of each first waterproof groove 106 is less than the thickness of the radiating fin 104, so as to avoid penetrating through the radiating fin 104.
It should be noted that, in general, the shape of the joint between the plastic package body 20 and the heat sink 104 is a non-closed straight line or a curve, so that the first waterproof grooves 106 are sequentially arranged from the joint between the plastic package body 20 and the heat sink 104 toward the direction gradually away from the outer edge of the plastic package body 20 and gradually approaching the slide frame 101, and the cross section of each first waterproof groove 106 is in a non-closed annular shape or a shape such as a curve or a straight line, which depends on the shape of the outer edge of the plastic package body. Thus, the plurality of first flashing grooves 106 may also be said to be a plurality of first flashing grooves 106 or a plurality of stages of first flashing grooves 106 or a plurality of turns of first flashing grooves 106, etc. In the above embodiment, the at least one first waterproof groove 106 is formed at the joint of the plastic package body 20 and the heat sink 104 (and the larger the number is, the better the number is), so as to improve the adhesion between the plastic package body 20 and the lead frame, and further reduce and control the amount of chemical liquid contained in the gap between the heat sink 104 and the plastic package body 20, which can penetrate into the surface treatment process of the semiconductor device package body, thereby solving the problem that the plating layer on the surface of the heat sink 104 is corroded and discolored to form a plating layer watermark. Alternatively, the first waterproof grooves 106 are distributed with equal line width, equal groove depth and equal interval.
Optionally, with continuing reference to fig. 2, each chip carrier frame of the lead frame of the present embodiment further has at least one (one or two) second waterproof grooves 102, and each second waterproof groove 102 is disposed around the chip carrier frame 101. At this time, the second waterproof groove 102 can protect the chip carried by the slide frame 101 in the subsequent process, and the first waterproof groove 106 has an effect of blocking infiltration of seepage in advance relative to the second waterproof groove 102 arranged on the periphery of the slide frame 101, so that the infiltration amount in the semiconductor device package can be effectively reduced, and the problem that the chip performance is affected by the fact that seepage is driven to the chip part in the slide frame 101 in a long time is avoided. In addition, the first waterproof groove 106 and the second waterproof groove 102 are arranged on the lead frame as many as possible, and the moisture resistance of the semiconductor device package body can be improved.
In addition, since the slide frame 101 is usually closed at four sides, and each second waterproof groove 102 surrounds the slide frame 101 for one circle and is annular, the plurality of second waterproof grooves 102 can also be said to be a plurality of circles of second waterproof grooves 102.
It should be noted that the foregoing embodiments only exemplify the structure of the core point of the lead frame related to the present application, but the present invention is not limited to this, and in other embodiments of the present invention, there are other structures on the lead frame.
For example, referring to fig. 4, another embodiment of the present invention provides a lead frame, which is different from the lead frame shown in fig. 2 mainly in that in each chip package region, a mounting fixing hole 107 and a nut hole 108 are further provided on the heat sink 104, and the mounting fixing hole 107 and the nut hole 108 are used for mounting the semiconductor device package having the plastic package body 20 and the lead frame formed after plastic packaging onto a corresponding machine to fix the package body in a subsequent corresponding operation (e.g., cutting, welding, etc.).
For another example, referring to fig. 5, a lead frame according to another embodiment of the present invention is different from the lead frame shown in fig. 5 mainly in that a notch 109 is further disposed on an outer edge of the heat sink 104, and the notch 109 can release stress during the plastic encapsulation process and avoid a problem of poor insulation effect of the plastic encapsulation body.
In this embodiment, the first waterproof groove 106 and the second waterproof groove 102 may be provided as many as possible on the lead frame to improve and enhance the moisture resistance of the semiconductor device package as much as possible.
In addition, when there are several chip package areas, the radiating fins in each chip package area can be separated from each other, or at least the radiating fins of two chip package areas can be connected into one body.
Based on the same concept of the present invention, referring to fig. 2 to 5, the present invention further provides a semiconductor device package, which comprises the lead frame, at least one chip and a corresponding plastic package body 20, wherein the chip and the chip packaging area of the lead frame are arranged in a one-to-one correspondence manner, and each chip is loaded on the corresponding carrier frame 101 of the lead frame in one-to-one correspondence, the plastic package body 20 of each chip package region plastically packages the lead frame of the chip package region and the chip together, and at least seals the part where the lead frame and the chip are connected with each other, for example, a portion of the lead frame and the edge of the chip are sealed inside, and at this time, the outer edge of at least a portion of the leads of the lead frame, the outer edge of the heat sink 104 of the lead frame, and the top and bottom surfaces of the chip are exposed by the molding compound 20, and the top and bottom surfaces of the chip are exposed for double-sided copper-clad processing.
Optionally, at least one chip is an IGBT device chip, and the semiconductor device package is an IGBT power module.
In summary, according to the technical scheme of the utility model, the at least one first waterproof groove is arranged at the joint of the plastic package body and the heat sink, so that the adhesion between the plastic package body and the lead frame can be improved, and further, the amount of chemical substance liquid which can permeate into the gap between the heat sink and the plastic package body in the surface treatment process of the semiconductor device package body can be reduced and controlled, thereby solving the problem that the plating layer on the surface of the heat sink is corroded and discolored to form the plating layer watermark. In addition, at least one first waterproof groove arranged at the joint of the plastic package body and the radiating fin plays a role in preventing seepage in advance relative to a second waterproof groove arranged on the periphery of the slide frame, so that the seepage amount in the semiconductor device package body can be effectively reduced, and the problem that the chip performance is influenced by the fact that seepage is driven to the chip position in the slide frame in a long way is avoided.
The above description is only for the purpose of describing the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention, and any variations and modifications made by those skilled in the art according to the above disclosure are within the scope of the present invention.

Claims (10)

1. The utility model provides a lead frame, has at least one chip package district, every the chip package district includes fin, slide frame and at least one pin, the slide frame is used for bearing the weight of the chip, the chip with the lead frame in chip package district is in the same place by corresponding plastic-sealed body plastic envelope, the pin with the fin all set up in the periphery of slide frame, its characterized in that, every the chip package district still has one at least first capillary groove, and each first capillary groove all sets up the fin with near linking department of plastic-sealed body just is located within the outward flange of plastic-sealed body, and each first capillary groove all along the trend of linking department of plastic-sealed body on fin and the lead frame extends in succession, and quilt the fin with the plastic-sealed body seals up for closed capillary groove jointly.
2. The lead frame according to claim 1, characterized in that the distance between the first waterproof groove of the outermost track and the outer edge of the plastic package body is not more than 0.5 mm.
3. The lead frame of claim 1, wherein each of the chip-packaging regions further has at least one second water-repellent groove around a periphery of the carrier frame.
4. The lead frame according to claim 1, wherein the first watertight groove has a V-shaped or U-shaped longitudinal section.
5. The lead frame according to claim 1, wherein each of the first waterproof grooves has an equal line width, an equal groove depth, and an equal interval distribution.
6. The lead frame of claim 1, wherein the heat sink further includes mounting holes; and/or the outer edge of the radiating fin is also provided with a notch.
7. The lead frame according to any of claims 1-6, wherein in each of the chip package regions, all of the leads are distributed on the same side of the carrier frame and the heat sink is distributed on the other side of the carrier frame.
8. The lead frame of claim 7, wherein adjacent ones of the leads are connected by corresponding connecting ribs, and adjacent ones of the chip package regions are connected by corresponding connecting ribs.
9. A semiconductor device package comprising the lead frame of any one of claims 1-8, at least one chip, and a corresponding plastic package body, wherein each of the chips is loaded on the carrier frame of the corresponding chip package region of the lead frame in a one-to-one correspondence, and the plastic package body is used for plastic packaging the lead frame of the chip package region and the chip together.
10. The semiconductor device package of claim 9, wherein the chip is an IGBT device chip.
CN202122888076.0U 2021-11-23 2021-11-23 Lead frame and semiconductor device package Active CN216250718U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202122888076.0U CN216250718U (en) 2021-11-23 2021-11-23 Lead frame and semiconductor device package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202122888076.0U CN216250718U (en) 2021-11-23 2021-11-23 Lead frame and semiconductor device package

Publications (1)

Publication Number Publication Date
CN216250718U true CN216250718U (en) 2022-04-08

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