CN216217713U

CN216217713U - DPC ceramic multilayer circuit board structure

Info

Publication number: CN216217713U
Application number: CN202122568404.9U
Authority: CN
Inventors: 袁广; 罗素扑; 黄嘉铧
Original assignee: Huizhou Xinci Semiconductor Co ltd
Current assignee: Huizhou Xinci Semiconductor Co ltd
Priority date: 2021-10-25
Filing date: 2021-10-25
Publication date: 2022-04-05
Anticipated expiration: 2031-10-25

Abstract

The utility model discloses a DPC ceramic multilayer circuit board structure, which comprises a DPC ceramic substrate, a first conductive seed layer, a first circuit layer, an insulating layer, a second conductive seed layer and a second circuit layer which are sequentially stacked; the DPC ceramic substrate comprises a DPC ceramic substrate, a first conductive seed layer, a first circuit layer, an insulating layer, a second conductive seed layer, a second circuit layer and a DPC ceramic substrate, wherein the first conductive seed layer is arranged on the upper surface of the DPC ceramic substrate, the first circuit layer is arranged on the upper surface of the first conductive seed layer, the insulating layer is arranged on the upper surface of the first circuit layer, the second conductive seed layer is arranged on the upper surface of the insulating layer, and the second circuit layer is arranged on the upper surface of the second conductive seed layer; so, it mainly is through DPC ceramic substrate, first conductive seed layer, first circuit layer, insulating layer, second conductive seed layer and the second circuit layer that superposes in proper order, obtains DPC ceramic multilayer circuit board structure, carries out the circuit thickening with the mode of electroplating, does not need high temperature hot pressing sintering, has effectively solved the relatively poor, influence signal transmission's of traditional technique metal level electrically conductive heat conductivility problem.

Description

DPC ceramic multilayer circuit board structure

Technical Field

The utility model relates to the technical field of ceramic substrates, in particular to a DPC ceramic multilayer circuit board structure.

Background

Ceramic substrates are the most commonly used substrate materials in the electronic industry, have the advantages of high heat dissipation, low thermal resistance, long service life, voltage resistance and the like, have high ceramic strength and chemical stability compared with most other oxides, are rich in raw material resources, and are suitable for manufacturing various technologies, so the ceramic substrates become basic materials of power electronic circuit structure technology and interconnection technology.

At present, a ceramic multilayer substrate is made into raw ceramic sheets by a tape casting method, holes are formed in the raw ceramic sheets, wires are arranged after the holes are filled with metal slurry, the raw ceramic sheets with the wires are positioned and overlapped one by one, then hot-pressing sintering is carried out, the temperature is required to be 800-1200 ℃, the used metal is required to be capable of resisting the temperature of more than 800 ℃, the electric conduction and heat conduction performance of the metal is poor, signal transmission is influenced, and the material has certain deformation and shrinkage after sintering, so that the dimensional accuracy is poor.

Therefore, a new technical solution is needed to solve the above problems.

SUMMERY OF THE UTILITY MODEL

In view of the above, the present invention is directed to the defects existing in the prior art, and the main object of the present invention is to provide a DPC ceramic multi-layer circuit board structure, which effectively solves the problems of poor electrical and thermal conductivity of a metal layer and signal transmission influence in the conventional technology, and also solves the problem of poor dimensional accuracy caused by a certain deformation and shrinkage of a fired material.

In order to achieve the purpose, the utility model adopts the following technical scheme:

a DPC ceramic multilayer circuit board structure comprises a DPC ceramic substrate, a first conductive seed layer, a first circuit layer, an insulating layer, a second conductive seed layer and a second circuit layer which are sequentially stacked; the DPC ceramic substrate comprises a DPC ceramic substrate, a first conductive seed layer, a first circuit layer, an insulating layer, a second conductive seed layer, a second circuit layer and a DPC ceramic substrate, wherein the first conductive seed layer is arranged on the upper surface of the DPC ceramic substrate, the first circuit layer is arranged on the upper surface of the first conductive seed layer, the insulating layer is arranged on the upper surface of the first circuit layer, the second conductive seed layer is arranged on the upper surface of the insulating layer, and the second circuit layer is arranged on the upper surface of the second conductive seed layer;

the first conductive seed layer and the second conductive seed layer are both vacuum coating layers; the first circuit layer and the second circuit layer are both electroplating circuit layers.

Preferably, the ceramic substrate is an aluminum nitride ceramic, an aluminum oxide ceramic, a silicon oxide ceramic or an aluminum silicon carbon ceramic.

Preferably, the insulating layer is a silicon dioxide insulating layer.

Preferably, the silicon dioxide insulating layer is evaporated or printed on the first circuit layer by using a mold.

Compared with the prior art, the DPC ceramic multilayer circuit board structure has the advantages that the DPC ceramic substrate, the first conductive seed layer, the first circuit layer, the insulating layer, the second conductive seed layer and the second circuit layer are sequentially stacked to obtain the DPC ceramic multilayer circuit board structure, circuits are thickened in an electroplating mode, high-temperature hot-pressing sintering is not needed, the problems that the metal layer in the prior art is poor in conductive and heat-conducting performance and affects signal transmission are effectively solved, and the problem that the dimension precision is poor due to the fact that materials are deformed and shrunk to a certain extent after being sintered is solved.

To more clearly illustrate the structural features and effects of the present invention, the present invention will be described in detail below with reference to the accompanying drawings and specific embodiments.

Drawings

FIG. 1 is a cross-sectional view of an embodiment of the present invention.

The attached drawings indicate the following:

10. DPC ceramic substrate 20, first conductive seed layer

30. First circuit layer 40, insulating layer

50. A second conductive seed layer 60, a second line layer.

Detailed Description

Referring to fig. 1, a specific structure of an embodiment of the utility model is shown.

In the description of the present invention, it should be noted that, for the orientation words, such as the terms "upper", "lower", "front", "rear", "left", "right", etc., indicating the orientation and positional relationship based on the orientation or positional relationship shown in the drawings, are only for convenience of describing the present invention and simplifying the description, but do not indicate or imply that the device or element referred to must have a specific orientation, be constructed in a specific orientation and operation, and should not be construed as limiting the specific scope of the present invention.

A DPC ceramic multilayer circuit board structure comprises a DPC ceramic substrate 10, a first conductive seed layer 20, a first circuit layer 30, an insulating layer 40, a second conductive seed layer 50 and a second circuit layer 60 which are sequentially stacked; the first conductive seed layer 20 is disposed on the upper surface of the DPC ceramic substrate 10, the first circuit layer 30 is disposed on the upper surface of the first conductive seed layer 20, the insulating layer 40 is disposed on the upper surface of the first circuit layer 30, the second conductive seed layer 50 is disposed on the upper surface of the insulating layer 40, and the second circuit layer 60 is disposed on the upper surface of the second conductive seed layer 50; the first conductive seed layer 20 and the second conductive seed layer 50 are both vacuum coating layers; the first circuit layer 30 and the second circuit layer 60 are both electroplating circuit layers.

In the present embodiment, the DPC ceramic substrate 10 is a silicon nitride ceramic, an alumina ceramic, a silicon oxide ceramic, an aluminum silicon carbon ceramic, or other ceramics. Wherein: the silicon nitride ceramic has the characteristics of high strength and high temperature resistance, and the strength can be maintained to 1200 ℃ without reduction; the aluminum oxide ceramic has better conductivity, mechanical strength and high temperature resistance, and is made of aluminum nitride or aluminum oxide ceramic materials, so that the aluminum oxide ceramic has good high temperature resistance, oxidation resistance, wear resistance and corrosion resistance, is stable in structure, is not easy to deform and damage, and has better material processing size precision, thereby ensuring the excellence of product processing.

The DPC is also called as a direct copper-plated substrate, the ceramic substrate is drilled, scribed and the like by laser, the ceramic substrate is plated with copper by a vacuum coating mode after being cleaned, then the circuit manufacturing is finished by yellow lithography or laser development, the thickness of the circuit is increased by an electroplating/chemical plating deposition mode, and finally the manufacturing of a metallized circuit is finished. Compared with the traditional LTCC, HTCC, DBC and other thick film processes, the DPC has the advantages of higher heat conductivity, no deformation of materials, stable process, controllable thickness of a metal layer and high line resolution. In the embodiment, the DPC ceramic substrate adopts the DPC process, so that the crystallization performance of metal is good, the flatness is good, the circuit is not easy to fall off, the position of the circuit is more accurate, and the line distance is smaller.

The first conductive seed layer 20 is disposed on the surface of the DPC ceramic substrate 10 by vacuum coating, so that the first conductive seed layer 20 has excellent barrier properties, and provides excellent electromagnetic shielding and conductive effects.

The insulating layer 40 is a silicon dioxide insulating layer, and needs to be uniformly coated on the surface of the whole first circuit layer 30, so that the silicon dioxide insulating layer can greatly improve the insulating effect and can prevent the silicon device from being polluted.

Detailed description the manufacturing process of this embodiment is as follows:

step 1: forming a first conductive seed layer 20 on the surface of the DPC ceramic substrate 10 by vacuum coating, and then performing pattern transfer by photolithography to form a first circuit layer 30;

step 2: adopting an electroplating mode on the surface of the first circuit layer 30 to obtain the first circuit layer 30 with the required thickness, and carrying out abrasive belt leveling;

step 3, evaporating or printing a silicon dioxide insulating layer on the surface of the first circuit layer 30;

and 4, step 4: forming a second conductive seed layer 50 on the surface of the silicon dioxide insulating layer in a vacuum coating mode, and then carrying out pattern transfer through yellow lithography to form a second circuit layer 60;

and 5: the surface of the second circuit layer 60 is thickened by electroplating to form a multilayer circuit board.

The design of the utility model is characterized in that the DPC ceramic multi-layer circuit board structure is obtained mainly by sequentially stacking the DPC ceramic substrate, the first conductive seed layer, the first circuit layer, the insulating layer, the second conductive seed layer and the second circuit layer, the circuit is thickened in an electroplating mode without high-temperature hot-pressing sintering, the problems of poor conductive and heat-conducting performance of a metal layer and influence on signal transmission in the prior art are effectively solved, and the problem of poor size precision caused by certain deformation and shrinkage of materials after sintering is also solved.

The above description is only a preferred embodiment of the present invention, and is not intended to limit the technical scope of the present invention, so that any minor modifications, equivalent changes and modifications made to the above embodiment according to the technical spirit of the present invention are within the technical scope of the present invention.

Claims

1. A DPC ceramic multilayer circuit board structure, characterized in that: the DPC ceramic substrate, the first conductive seed layer, the first circuit layer, the insulating layer, the second conductive seed layer and the second circuit layer are sequentially stacked; the DPC ceramic substrate comprises a DPC ceramic substrate, a first conductive seed layer, a first circuit layer, an insulating layer, a second conductive seed layer, a second circuit layer and a DPC ceramic substrate, wherein the first conductive seed layer is arranged on the upper surface of the DPC ceramic substrate, the first circuit layer is arranged on the upper surface of the first conductive seed layer, the insulating layer is arranged on the upper surface of the first circuit layer, the second conductive seed layer is arranged on the upper surface of the insulating layer, and the second circuit layer is arranged on the upper surface of the second conductive seed layer;

2. The DPC ceramic multi-layer circuit board structure of claim 1, wherein: the ceramic substrate is aluminum nitride ceramic or aluminum oxide ceramic or silicon oxide ceramic or aluminum silicon carbon ceramic.

3. The DPC ceramic multi-layer circuit board structure of claim 1, wherein: the insulating layer is a silicon dioxide insulating layer.

4. The DPC ceramic multi-layer circuit board structure of claim 3, wherein: the silicon dioxide insulating layer is evaporated or printed on the first circuit layer by adopting a mould.