CN216215869U - DC power supply reverse connection protection circuit - Google Patents
DC power supply reverse connection protection circuit Download PDFInfo
- Publication number
- CN216215869U CN216215869U CN202122707643.8U CN202122707643U CN216215869U CN 216215869 U CN216215869 U CN 216215869U CN 202122707643 U CN202122707643 U CN 202122707643U CN 216215869 U CN216215869 U CN 216215869U
- Authority
- CN
- China
- Prior art keywords
- power supply
- voltage
- pmos tube
- coupled
- power
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Direct Current Feeding And Distribution (AREA)
- Charge And Discharge Circuits For Batteries Or The Like (AREA)
Abstract
The utility model relates to a DC power supply joins in reverse protection circuit, including the anodal input end of power, the anodal output end of power, the power negative pole end, first PMOS pipe, first zener diode and first divider resistor, first divider resistor establishes ties between the grid of first PMOS pipe and power negative pole end, the drain electrode of first PMOS pipe is coupled in the anodal output end of power, the source electrode of first PMOS pipe is coupled in the anodal input end of power, the positive pole of first zener diode is coupled in the grid of first PMOS pipe, the negative pole of first zener diode is coupled in the source electrode of first PMOS pipe. The power supply protection circuit has the advantages that when the polarity of the power supply is reversely connected, the output voltage of the output end can be disconnected, and the effect of power supply input protection is achieved.
Description
Technical Field
The application relates to the technical field of circuit protection, in particular to a reverse connection protection circuit of a DC power supply.
Background
In electronic equipment using direct current, the polarity of a power supply is connected in a reverse manner, which is a common problem in daily life. Since the electronic device has a specific requirement on the polarity of the power supply, once the polarity of the input dc power is reversed, the electronic device may not only stop working, but also may be damaged.
In the prior DC power supply reverse connection protection circuit, a diode is usually connected into the circuit, and the problem of damage to the circuit caused by reverse connection of the power supply polarity is avoided by utilizing the one-way conduction characteristic of the diode. However, when the diode is subjected to a large reverse voltage, the diode may be broken down, thereby losing the unidirectional conduction characteristic.
SUMMERY OF THE UTILITY MODEL
In order to improve the protection capability of the circuit when the polarity of the power supply is connected reversely, the application provides a reverse connection protection circuit of a DC power supply.
The application provides a DC power supply joins conversely protection circuit adopts following technical scheme:
the utility model provides a DC power supply joins in reverse protection circuit, includes power supply positive input end, power supply positive output end, power negative pole end, first PMOS pipe, first zener diode and first divider resistance, first divider resistance is in series between the grid of first PMOS pipe and power negative pole end, the drain electrode of first PMOS pipe is coupled in power supply positive output end, the source electrode of first PMOS pipe is coupled in power supply positive input end, the positive pole of first zener diode is coupled in the grid of first PMOS pipe, the negative pole of first zener diode is coupled in the source electrode of first PMOS pipe.
By adopting the technical scheme, when the input end of the positive electrode of the power supply is connected with the positive electrode and the negative electrode of the power supply is connected with the negative electrode, because the first voltage stabilizing diode is reversely cut off, the voltage difference between the grid voltage and the source electrode of the first PMOS tube is smaller than zero, and the voltage difference between the grid voltage and the source electrode of the first PMOS tube is smaller than the starting voltage of the first PMOS tube through the reverse breakdown voltage of the first voltage stabilizing diode, so that the source electrode and the drain electrode of the first PMOS tube are conducted, and the voltage of the input end of the power supply is output from the output end of the power supply after being reduced by the voltage of the first PMOS tube; when the power supply is reversely connected, namely the positive input end of the power supply is connected with the negative electrode and the negative electrode of the power supply is connected with the positive electrode, the voltage difference between the grid voltage and the source electrode of the first PMOS tube is the voltage drop of the first voltage stabilizing diode, the voltage difference is larger than zero and does not meet the conduction condition of the first PMOS tube, no voltage is output from the positive output end of the power supply, and therefore the power supply of a rear-stage circuit applying the circuit is disconnected. When the polarity of the power supply is reversed and the voltage difference is large, the first voltage dividing resistor divides more voltage, and the first voltage stabilizing diode can maintain the voltage difference between the grid electrode and the source electrode of the first PMOS tube, so that the first PMOS tube is protected, and the protection capability of the circuit when the polarity of the power supply is reversed is improved.
Optionally, the DC power supply reverse connection protection circuit includes a second PMOS transistor and a second voltage-dividing resistor, a drain of the second PMOS transistor is coupled to the positive input terminal of the power supply, a source of the second PMOS transistor is coupled to the source of the first PMOS transistor, and the second voltage-dividing resistor is connected in series between a gate of the second PMOS transistor and the negative terminal of the power supply.
By adopting the technical scheme, when the input end of the positive pole of the power supply is connected with the positive pole and the negative pole of the power supply is connected with the negative pole, the voltage of the positive pole of the power supply acts on the source electrode of the first PMOS tube through the parasitic diode of the second PMOS tube, so that the first PMOS tube is started; when the power supply is reversely connected, namely the input end of the positive pole of the power supply is connected with the negative pole and the negative pole of the power supply is connected with the positive pole, the source electrode and the drain electrode of the second PMOS tube are not conducted, no voltage difference exists between the grid voltage and the source electrode of the first PMOS tube, and no voltage is output from the output end of the power supply; and the parasitic diode of the second PMOS tube can prevent reverse conduction current which may be generated in the parasitic diode of the first PMOS tube.
Optionally, the DC power reverse connection protection circuit further includes a second zener diode, an anode of the second zener diode is coupled to the gate of the second PMOS transistor, and a cathode of the second zener diode is coupled to the source of the second PMOS transistor.
By adopting the technical scheme, when the input end of the positive electrode of the power supply is connected with the positive electrode and the negative electrode of the power supply is connected with the negative electrode, the source electrode and the drain electrode of the second PMOS tube are conducted due to the parasitic diode, at the moment, the grid voltage of the second PMOS tube is smaller than the source electrode voltage of the second PMOS tube through the reverse cut-off of the second voltage stabilizing diode, and the second PMOS tube is started and maintains the voltage difference between the grid electrode of the second PMOS tube and the source electrode of the second PMOS tube through the reverse breakdown voltage of the second voltage stabilizing diode, so that the second PMOS tube is protected.
In summary, the present application includes at least one of the following beneficial technical effects:
1. when the polarity of the power supply is reversely connected, the output voltage of the output end can be cut off, and meanwhile, the first PMOS tube is protected and prevented from being reversely broken down;
2. through the second PMOS tube, the situation of reverse current possibly existing in the protection circuit can be effectively restrained, and the stability of the circuit is improved.
Drawings
Fig. 1 is a reverse connection protection circuit for a DC power supply according to embodiment 1 of the present application.
Fig. 2 is a reverse connection protection circuit of a DC power supply according to embodiment 2 of the present application.
Detailed Description
The present application is described in further detail below with reference to figures 1-2.
The embodiment of the application discloses a reverse connection protection circuit of a DC power supply.
Example 1
Referring to fig. 1, the DC power reverse connection protection circuit includes a power positive input terminal IN +, a power positive output terminal OUT +, a power negative input terminal IN-, a power negative output terminal OUT-, a first PMOS transistor Q1, a first voltage regulator diode D1, and a first voltage divider resistor R1. The power supply negative electrode input end IN-and the power supply negative electrode output end OUT-are connected and grounded, and the power supply negative electrode input end IN-and the power supply negative electrode output end OUT-are integrally used as the power supply negative electrode end. When the polarity of the power supply is connected positively, namely the positive input end IN + of the power supply is connected with the positive electrode, the negative end of the power supply is connected with the negative electrode, at the moment, the first PMOS tube Q1 is conducted, and the positive output end OUT + of the power supply outputs voltage; when the polarity of the power supply is reversely connected, namely the positive input end IN + of the power supply is connected with the negative electrode, the negative electrode of the power supply is connected with the positive electrode, the voltage difference between the grid electrode and the source electrode of the first PMOS tube Q1 is larger than zero, the conduction condition is not met, and the positive output end OUT + of the power supply has no output; meanwhile, the first voltage stabilizing diode D1 keeps the voltage difference between the grid electrode and the source electrode of the first PMOS tube Q1, so that the first PMOS tube Q1 is prevented from being broken down, the first PMOS tube Q1 is protected, and the overall stability of the first PMOS tube Q1 after being connected with the reverse voltage of the power supply is improved.
Specifically, the first voltage dividing resistor R1 is connected IN series between the gate of the first PMOS transistor Q1 and the negative power terminal, the drain of the first PMOS transistor Q1 is coupled to the positive power output terminal OUT +, the source of the first PMOS transistor Q1 is coupled to the positive power input terminal IN +, the anode of the first zener diode is coupled to the gate of the first PMOS transistor Q1, and the cathode of the first zener diode D1 is coupled to the source of the first PMOS transistor Q1. Because the voltage at the two ends of the first voltage stabilizing diode D1 is relatively stable after reverse breakdown, and the voltage is divided by the first voltage dividing resistor R1, the voltage difference between the gate and the source of the first PMOS transistor Q1 does not change much, and the first PMOS transistor Q1 is protected.
The implementation principle of the embodiment of the application is as follows: when the polarity of the power supply is connected positively, due to the voltage-stabilizing characteristic of the first voltage-stabilizing diode D1, a voltage difference exists between the gate and the source of the first PMOS transistor Q1, so that the first PMOS transistor Q1 is turned on, and the positive output end of the power supply outputs voltage; when the power supply polarity is reversed, the conducting condition of the first PMOS transistor Q1 is not satisfied, and at the same time, the voltage difference between the gate and the source of the first PMOS transistor Q1 is maintained at the voltage drop of the first zener diode D1, so as to ensure the stability of the first PMOS transistor Q1 when the power supply polarity is reversed.
Example 2
Referring to fig. 2, the reverse DC power protection circuit further includes a second PMOS transistor Q2, a second voltage dividing resistor R2, and a second zener diode D2. The drain of the second PMOS transistor Q2 is coupled to the positive power input terminal IN +, the source of the second PMOS transistor Q2 is coupled to the source of the first PMOS transistor Q1, and the second voltage-dividing resistor R2 is connected IN series between the gate of the second PMOS transistor Q2 and the negative power terminal. When the voltage of the first PMOS transistor Q1 connected to the power supply disappears, a reverse loop is formed between the parasitic diode in the first PMOS transistor Q1 and the rear-stage load, and a reverse current may occur, which may cause a certain hidden danger to the rear-stage load. The second PMOS tube Q2 is added in front of the source electrode of the first PMOS tube Q1, and the source electrode of the first PMOS tube Q1 is connected with the source electrode of the second PMOS tube Q2, so that the parasitic diode of the first PMOS tube Q1 and the parasitic diode of the second PMOS tube Q2 are reversely connected, and a reverse loop which may occur to the parasitic diode of the first PMOS tube Q1 is limited.
When the input voltage does not exceed the threshold and the power supply polarity is positive, the current flows to the source of the first PMOS transistor Q1 through the parasitic diode of the second PMOS transistor Q2, and the voltage is stabilized between the gate and the source of the first PMOS transistor Q1 through the first voltage stabilizing diode D1, so that the first PMOS transistor Q1 is turned on. When the input voltage does not exceed the threshold and the power polarity is reversed, i.e., the positive input terminal IN + of the power is connected to the negative terminal, and the negative terminal of the power is connected to the positive terminal, the second PMOS transistor Q2 will not be turned on, and the power current cannot flow from the drain to the source of the second PMOS transistor Q2. In the present embodiment, the threshold is 80% of the turn-on voltage of the second PMOS transistor Q2, so as to prevent the second PMOS transistor Q2 from being broken down due to too large voltage difference between the gate and the source. In practical applications, the threshold may be modified by the requirements of the load.
In addition, the anode of the second zener diode D2 is coupled to the gate of the second PMOS transistor Q2, and the cathode of the second zener diode D2 is coupled to the source of the second PMOS transistor Q2.
When the input voltage exceeds the threshold and the power supply polarity is positive, the current flows to the source of the first PMOS transistor Q1 through the parasitic diode of the second PMOS transistor Q2, and at this time, the voltage difference between the gate and the source of the second PMOS transistor Q2 is maintained through the reverse breakdown voltage of the second zener diode D2, so that the second PMOS transistor Q2 is turned on, and the second PMOS transistor Q2 can be protected; the grid electrode and the source electrode of the first PMOS tube Q1 are stabilized through a first voltage stabilizing diode D1, the first PMOS tube Q1 is turned on, and finally, voltage is output from the positive output end OUT + of the power supply. When the input voltage exceeds a threshold value and the polarity of the power supply is reversely connected, namely the input end IN + of the positive pole of the power supply is connected with the negative pole, the negative pole of the power supply is connected with the positive pole, at the moment, the current flows to the source electrode of the second PMOS tube Q2 from the grid electrode of the second PMOS tube Q2 through the second voltage-stabilizing diode D2, the second PMOS tube Q2 cannot be conducted, and the negative pole of the power supply forms a short circuit IN the circuit; at the moment, the voltage difference between the grid electrode and the source electrode of the first PMOS tube Q1 is larger than zero, the conduction condition is not met, and the positive output end OUT + of the power supply has no output; meanwhile, the second zener diode D2 protects the second PMOS transistor Q2 from breakdown.
The implementation principle of the embodiment of the application is as follows: when the power supply polarity is connected positively, the parasitic diode of the second PMOS transistor Q2 makes the drain and the source of the second PMOS transistor Q2 connected, and at this time, a voltage difference is generated between the gate and the source of the second PMOS transistor Q2 through the second zener diode D2 and the second PMOS transistor Q2 is turned on, and the current is switched from the parasitic diode to the channel of the second PMOS transistor Q2; the first PMOS tube Q1 is conducted through the first voltage-stabilizing diode D1, and finally voltage is output from the positive output end of the power supply; when the polarity of the power supply is reversely connected, the second PMOS tube Q2 and the first PMOS tube Q1 are not conducted, and no voltage is output from the positive output end of the power supply; at this time, the voltage difference between the gate and the source of the second PMOS transistor Q2 is the voltage drop of the second zener diode D2, and the voltage difference between the gate and the source of the first PMOS transistor Q1 is the voltage drop of the first zener diode D1, so as to ensure the stability of the second PMOS transistor Q2 and the first PMOS transistor Q1.
The above embodiments are preferred embodiments of the present application, and the protection scope of the present application is not limited by the above embodiments, so: all equivalent changes made according to the structure, shape and principle of the present application shall be covered by the protection scope of the present application.
Claims (3)
1. A kind of DC power connects the protective circuit against, characterized by that: the power supply comprises a power supply anode input end, a power supply anode output end, a power supply cathode end, a first PMOS (P-channel metal oxide semiconductor) tube, a first voltage stabilizing diode and a first voltage dividing resistor, wherein the first voltage dividing resistor is connected in series between a grid electrode of the first PMOS tube and the power supply cathode end, a drain electrode of the first PMOS tube is coupled to the power supply anode output end, a source electrode of the first PMOS tube is coupled to the power supply anode input end, an anode of the first voltage stabilizing diode is coupled to the grid electrode of the first PMOS tube, and a cathode of the first voltage stabilizing diode is coupled to the source electrode of the first PMOS tube.
2. The reverse DC power protection circuit of claim 1, wherein: the power supply circuit comprises a second PMOS (P-channel metal oxide semiconductor) tube and a second voltage-dividing resistor, wherein the drain electrode of the second PMOS tube is coupled to the positive input end of a power supply, the source electrode of the second PMOS tube is coupled to the source electrode of the first PMOS tube, and the second voltage-dividing resistor is connected between the grid electrode of the second PMOS tube and the negative end of the power supply in series.
3. The reverse DC power protection circuit of claim 2, wherein: the diode further comprises a second voltage stabilizing diode, wherein the anode of the second voltage stabilizing diode is coupled to the grid electrode of the second PMOS tube, and the cathode of the second voltage stabilizing diode is coupled to the source electrode of the second PMOS tube.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202122707643.8U CN216215869U (en) | 2021-11-05 | 2021-11-05 | DC power supply reverse connection protection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202122707643.8U CN216215869U (en) | 2021-11-05 | 2021-11-05 | DC power supply reverse connection protection circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN216215869U true CN216215869U (en) | 2022-04-05 |
Family
ID=80904423
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202122707643.8U Active CN216215869U (en) | 2021-11-05 | 2021-11-05 | DC power supply reverse connection protection circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN216215869U (en) |
-
2021
- 2021-11-05 CN CN202122707643.8U patent/CN216215869U/en active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN203166467U (en) | Overvoltage protection circuit | |
| CN201256290Y (en) | Protection circuit for suppressing surge current and preventing input voltage reverse connection | |
| US9350164B2 (en) | Surge protection circuit | |
| CN202513543U (en) | Overcurrent protection circuit | |
| CN202373957U (en) | Over-voltage and under-voltage protection circuit | |
| CN109004818B (en) | Intrinsically safe direct-current capacitive load slow starting device | |
| CN211123821U (en) | Linear voltage stabilizing circuit applied to ammeter and terminal | |
| CN204992541U (en) | Switch power -supply overvoltage protecting circuit | |
| CN216215869U (en) | DC power supply reverse connection protection circuit | |
| CN105356437A (en) | Anti-surge circuit | |
| CN217406186U (en) | Delay conduction circuit for inhibiting startup peak current at negative terminal | |
| CN217135367U (en) | Slow start circuit | |
| CN214480273U (en) | Ultra-low voltage overcurrent and overvoltage protection circuit | |
| CN108777572B (en) | Semiconductor tube protection circuit and method | |
| CN105790215A (en) | CT open-circuit protection device | |
| CN218102580U (en) | Double-input-end anti-reverse-filling circuit for adapter and USB equipment | |
| CN217427663U (en) | Current impact preventing circuit | |
| CN214045014U (en) | Voltage protection circuit and power input device | |
| CN205489460U (en) | CT open circuit protection device | |
| CN212033770U (en) | Peak voltage suppression circuit | |
| CN215835386U (en) | Circuit and intelligent terminal with reduced conduction voltage drop | |
| CN221487356U (en) | Power supply protection circuit | |
| CN214798853U (en) | Capacitive load power-supply-preventing reverse connection driving control circuit | |
| CN220475409U (en) | Anti-reverse connection module based on high-power vehicle-mounted equipment input power supply | |
| CN210167964U (en) | Direct current surge driving circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |