CN216146510U - ESD-resistant FPC structure - Google Patents
ESD-resistant FPC structure Download PDFInfo
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- CN216146510U CN216146510U CN202121885339.6U CN202121885339U CN216146510U CN 216146510 U CN216146510 U CN 216146510U CN 202121885339 U CN202121885339 U CN 202121885339U CN 216146510 U CN216146510 U CN 216146510U
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Abstract
The utility model discloses an ESD (electro-static discharge) -resistant FPC (flexible printed circuit) structure, wherein one surface of a film base material is provided with a circuit layer, the other surface of the film base material is provided with a copper-exposed area, a ground wire of the circuit layer is electrically connected with the copper-exposed area, the copper-exposed area is covered with an anti-oxidation conductive layer, a cover film covers the film base material at the periphery of the anti-oxidation conductive layer, and the cover film and the circuit layer are covered with an EMI (electro-magnetic interference) film. The utility model adopts the gold plating process to strengthen the ESD resistance of the FPC, matches the mainstream manufacturing process of the FPC at present, and finally matches the design and the mass production, thereby improving the ESD resistance of the product and reducing the risk of functional failure of the product.
Description
Technical Field
The present invention relates to the field of FPC (flexible circuit board) technology.
Background
With the development of electronic device technology, the product models and functions are more and more, and especially, with the development of automobile CID diversification, the electrical performance requirements of the display device are stricter, and external interference signals are more and stronger. Thus, it is necessary to optimize the ESD (electrostatic discharge) resistant design to prevent the external ESD from damaging or even breaking the internal circuit.
Most of the existing anti-ESD schemes adopt a method for blocking ESD, when the ESD is too strong, the line is damaged or even disconnected, and under the condition that the peripheral protection is not complete, the ESD enters a functional area from a gap to damage the line.
Disclosure of Invention
The utility model aims to solve the technical problem of realizing an FPC structure which is convenient to produce and can effectively resist ESD.
In order to achieve the purpose, the utility model adopts the technical scheme that: the utility model provides an anti ESD's FPC structure, one of them face of film substrate is equipped with the circuit layer, and the another side is equipped with the dew copper region, the ground wire and the dew copper region electricity of circuit layer are connected, the dew copper region coats and is stamped anti-oxidation conducting layer, be stamped the cover film on the peripheral film substrate of anti-oxidation conducting layer, cover film and circuit layer coats and is stamped the EMI membrane.
The oxidation-resistant conducting layer is a gold-plated layer.
And the EMI film at the position of the anti-oxidation conductive layer is kept away to expose the anti-oxidation conductive layer.
The thickness of the gold-plated film is less than 1 oz.
The utility model adopts the gold plating process to strengthen the ESD resistance of the FPC, matches the mainstream manufacturing process of the FPC at present, and finally matches the design and the mass production, thereby improving the ESD resistance of the product and reducing the risk of functional failure of the product.
Drawings
The following is a brief description of the contents of each figure in the description of the present invention:
FIG. 1 is a schematic view of an ESD resistant FPC structure;
Detailed Description
The following description of the embodiments with reference to the drawings is provided to describe the embodiments of the present invention, and the embodiments of the present invention, such as the shapes and configurations of the components, the mutual positions and connection relationships of the components, the functions and working principles of the components, the manufacturing processes and the operation and use methods, etc., will be further described in detail to help those skilled in the art to more completely, accurately and deeply understand the inventive concept and technical solutions of the present invention.
The FPC design is mostly the same as the traditional stack, as shown in fig. 1, using a film with copper on both sides as a substrate, chemically etching one side to etch a required wiring layer, chemically etching the other side to etch a copper-exposed area, and connecting the copper to a ground line on the back side. In order to prevent the copper-exposed portion from being oxidized, gold is further plated on the copper-exposed portion to form an oxidation-resistant conductive layer, so as to prevent the metal from being oxidized. The oxidation-resistant conductive layer is preferably a gold-plated layer.
And then attaching a coverage layer on the film substrate around the oxidation-resistant conductive layer to protect the copper layer, but the coverage needs to keep away the copper-exposed gold-plated area to prevent the coverage from causing failure. And finally, pasting the EMI film on the two sides, wherein the EMI film needs to avoid a copper-exposed gold-plated area, and then performing the final inspection work.
The thickness of each layer of material of the FPC design is conventional, and the thickness of gold plating needs to be less than 1oz, so that the bending area of the FPC is prevented from being too thick and hard, and the FPC is difficult to bend or breaks after bending. The idea of the copper exposure and gold plating of the ESD resistant FPC structure is to guide the ESD, but not isolate the ESD, and the ESD flows to the ground only by integral electric conduction through the sequence that the ESD is guided to the ground after the whole machine is grounded.
The utility model adopts the static guiding mode to guide the ESD to the ground through the ground wire, thereby avoiding the damage of the ESD to the function of the product. However, the conventional exposed copper is oxidized after a long time, and the effect is lost, so that gold plating is needed to ensure strong oxidation resistance of the exposed metal part. In combination with the design of the whole FPC, the gold-plated part is connected to the ground wire of the peripheral ground conducting of the FPC, and finally the ground wire is guided to the ground by connecting the grounding part of the client main board, so that the function of the product is prevented from being damaged by ESD.
The utility model has been described above with reference to the accompanying drawings, it is obvious that the utility model is not limited to the specific implementation in the above-described manner, and it is within the scope of the utility model to apply the inventive concept and solution to other applications without substantial modification.
Claims (4)
1. The utility model provides an anti ESD's FPC structure, the film substrate wherein one side is equipped with the circuit layer, and the another side is equipped with and exposes the copper region, the ground wire on circuit layer is connected its characterized in that with exposing the copper regional electricity: and an anti-oxidation conducting layer covers the copper-exposed area, a cover film covers the film base material at the periphery of the anti-oxidation conducting layer, and an EMI film covers the cover film and the circuit layer.
2. The ESD resistant FPC structure of claim 1, wherein: the oxidation-resistant conducting layer is a gold-plated layer.
3. The ESD resistant FPC structure of claim 2, wherein: and the EMI film at the position of the anti-oxidation conductive layer is kept away to expose the anti-oxidation conductive layer.
4. The ESD resistant FPC structure of claim 2 or 3, wherein: the thickness of the gold-plated layer is less than 1 oz.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202121885339.6U CN216146510U (en) | 2021-08-12 | 2021-08-12 | ESD-resistant FPC structure |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202121885339.6U CN216146510U (en) | 2021-08-12 | 2021-08-12 | ESD-resistant FPC structure |
Publications (1)
Publication Number | Publication Date |
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CN216146510U true CN216146510U (en) | 2022-03-29 |
Family
ID=80805781
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CN202121885339.6U Active CN216146510U (en) | 2021-08-12 | 2021-08-12 | ESD-resistant FPC structure |
Country Status (1)
Country | Link |
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CN (1) | CN216146510U (en) |
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2021
- 2021-08-12 CN CN202121885339.6U patent/CN216146510U/en active Active
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