CN215954179U

CN215954179U - High-precision low-power-consumption temperature coefficient calibration device and battery management chip

Info

Publication number: CN215954179U
Application number: CN202121804816.1U
Authority: CN
Inventors: 不公告发明人
Original assignee: Zhuhai Maiju Microelectronics Co Ltd
Current assignee: Zhuhai Maiju Microelectronics Co Ltd
Priority date: 2021-07-27
Filing date: 2021-08-04
Publication date: 2022-03-04
Anticipated expiration: 2031-08-04
Also published as: CN113672021A

Abstract

The utility model provides a high accuracy low-power consumption temperature coefficient calibrating device for the temperature coefficient to the MOS transistor is calibrated, and the MOS transistor is the MOS transistor that charges and discharge that control the charging and discharging of battery/group battery, and the drain-source resistance of the MOS transistor that charges and the drain-source resistance of the MOS transistor that discharges connect and constitute series circuit, include: the drain electrode of the discharge calibration MOS transistor is connected with the drain electrode of the discharge MOS transistor, and/or the drain electrode of the charge calibration MOS transistor is connected with the drain electrode of the charge MOS transistor; a first current source connected to a source of the discharge calibration MOS transistor and/or connected to a source of the charge calibration MOS transistor; and an analog-to-digital converter directly or indirectly acquiring a voltage between the source and the drain of the discharge calibration MOS transistor or a voltage between the source and the drain of the charge calibration MOS transistor. The present disclosure also provides a battery management chip.

Description

High-precision low-power-consumption temperature coefficient calibration device and battery management chip

Technical Field

The utility model provides a high accuracy low-power consumption temperature coefficient calibrating device, battery management chip.

Background

In the use of a battery pack such as a lithium battery, it is necessary to detect a charging current and a discharging current in order to prevent the occurrence of an overcharge or an overdischarge phenomenon, which may cause an explosion or the like, if overcharged, which may impair the life of the battery.

The detection mode adopted at present is mostly to connect a detection resistor in series, but the detection resistor consumes larger energy and also increases the cost, and the detection precision is not high, at least because the resistance value of the detection resistor changes along with the change of the temperature.

In addition, in the prior art, there is a method of detecting a current by using the on-resistances of the charging transistor and the discharging transistor, but this method is also affected by the temperature, that is, the on-resistance changes with the change of the temperature.

Therefore, how to design a simple and effective charging and discharging current detection mode and eliminate the influence of the temperature coefficient is a technical problem to be solved, thereby realizing high-precision current sampling.

SUMMERY OF THE UTILITY MODEL

In order to solve one of the above technical problems, the present disclosure provides a high-precision low-power-consumption temperature coefficient calibration apparatus and a battery management chip.

According to an aspect of the present disclosure, a high-precision low-power consumption temperature coefficient calibration apparatus for calibrating a temperature coefficient of a MOS transistor, the MOS transistor being a charging MOS transistor and a discharging MOS transistor that control charging and discharging of a battery/battery pack, a drain of the charging MOS transistor and a drain of the discharging MOS transistor being connected to constitute a series circuit, includes:

the discharge calibration MOS transistor and/or the charge calibration MOS transistor are/is connected, the drain electrode of the discharge calibration MOS transistor is connected with the drain electrode of the discharge MOS transistor, and/or the drain electrode of the charge calibration MOS transistor is connected with the drain electrode of the charge MOS transistor;

a first current source connected to a source of the discharge calibration MOS transistor and/or to a source of the charge calibration MOS transistor; and

an analog-to-digital converter that directly or indirectly acquires a voltage between a source and a drain of the discharge calibration MOS transistor or a voltage between a source and a drain of the charge calibration MOS transistor.

According to at least one embodiment of the present disclosure, the charge MOS transistor, the discharge calibration MOS transistor, and the charge calibration MOS transistor are the same type of MOS transistor, and a channel aspect ratio and/or a number of cells of the discharge MOS transistor is proportional to a channel aspect ratio and/or a number of cells of the discharge calibration MOS transistor, and a channel aspect ratio and/or a number of cells of the charge MOS transistor is proportional to a channel aspect ratio and/or a number of cells of the charge calibration MOS transistor.

According to at least one embodiment of the present disclosure, the temperature sensor further includes a first resistor and a calibration unit, the first resistor is a zero temperature coefficient resistor or a low temperature coefficient resistor, one end of the first resistor is connected to a second current source, and the other end is connected to a negative terminal of the battery pack, the calibration section obtains a temperature coefficient change of the discharge calibration MOS transistor based on a voltage between a source and a drain of the discharge calibration MOS transistor and obtains the temperature coefficient change of the discharge MOS transistor according to a relationship between the discharge calibration MOS transistor and the discharge MOS transistor, and/or deriving a temperature coefficient variation of the charging calibration MOS transistor based on a voltage between a source and a drain of the charging calibration MOS transistor and deriving the temperature coefficient variation of the charging MOS transistor from a relationship between the charging calibration MOS transistor and the charging MOS transistor.

According to at least one embodiment of the present disclosure, the first current source and the second current source are the same current source or different current sources, and in the case of different current sources, a current value of the first calibration current provided by the first current source and a current value of the second calibration current provided by the second current source are equal or unequal.

According to at least one embodiment of the present disclosure, the analog-to-digital converter further includes:

a first analog-to-digital converter which acquires a voltage across the first resistor and a voltage between a source of the discharge calibration MOS transistor and/or a source of the charge calibration MOS transistor and a negative terminal of a battery/battery pack or a negative terminal of a load/charge terminal; and

a second analog-to-digital converter directly or indirectly acquiring a voltage between a source and a drain of the charging calibration MOS transistor and/or a voltage between a source and a drain of the discharging calibration MOS transistor,

the first analog-to-digital converter and the second analog-to-digital converter are different analog-to-digital converters or the same analog-to-digital converter.

According to at least one embodiment of the present disclosure, the number of the discharge calibration MOS transistors is one.

According to at least one embodiment of the present disclosure, in a case where the temperature coefficient of the discharge MOS transistor is calibrated, the discharge calibration MOS transistor and the discharge MOS transistor are turned on, and the second analog-to-digital converter measures a voltage between the source of the discharge MOS transistor and the source of the charge MOS transistor, and obtains the temperature coefficient variation of the discharge calibration MOS transistor from the voltage between the source and the drain of the discharge calibration MOS transistor, the voltage between the source and the drain of the discharge MOS transistor, and the voltage across the first resistor.

According to at least one embodiment of the present disclosure, in a case where a discharge calibration MOS transistor and a charge calibration MOS transistor are included, drains of the discharge calibration MOS transistor and the charge calibration MOS transistor are both connected to a drain of the discharge MOS transistor, in a case where a temperature coefficient of the discharge MOS transistor is calibrated, the discharge calibration MOS transistor, the discharge MOS transistor, and the charge calibration MOS transistor are turned on, and the second analog-to-digital converter measures a first voltage between a source of the discharge MOS transistor and a source of the charge calibration MOS transistor, and obtains a temperature coefficient change of the discharge calibration MOS transistor from the first voltage and a voltage across the first resistor.

According to at least one embodiment of the present disclosure, in case of calibrating the temperature coefficient of the discharge MOS transistor, the discharge calibration MOS transistor and the discharge MOS transistor are turned on, and the second analog-to-digital converter measures the voltage between the source and the drain of the discharge MOS transistor or measures the voltage between the source and the drain of the discharge calibration MOS transistor, and the temperature coefficient variation of the discharge calibration MOS transistor is obtained in combination with the voltage between the source and the drain of the discharge MOS transistor and the voltage across the first resistor.

According to at least one embodiment of the present disclosure, the number of the charge calibration MOS transistors is one.

According to at least one embodiment of the present disclosure, in case of calibrating the temperature coefficient of the charging MOS transistor, the charging calibration MOS transistor and the charging MOS transistor are turned on, and the second analog-to-digital converter measures the voltage between the source of the discharging MOS transistor and the source of the charging MOS transistor, and obtains the temperature coefficient variation of the charging calibration MOS transistor from the voltage between the source and the drain of the charging calibration MOS transistor, the voltage between the source and the drain of the charging MOS transistor, and the voltage across the first resistor.

According to at least one embodiment of the present disclosure, in a case where a discharge calibration MOS transistor and a charge calibration MOS transistor are included, drains of the charge calibration MOS transistor and the discharge calibration MOS transistor are both connected to a drain of the charge MOS transistor, in a case where a temperature coefficient of the charge MOS transistor is calibrated, the charge calibration MOS transistor, the charge MOS transistor, and the discharge calibration MOS transistor are turned on, and the second analog-to-digital converter measures a second voltage between a source of the charge MOS transistor and a source of the discharge calibration MOS transistor, and obtains a temperature coefficient change of the charge calibration MOS transistor from the second voltage and a voltage across the first resistor.

According to at least one embodiment of the present disclosure, in case of calibrating the temperature coefficient of the charging MOS transistor, the charging calibration MOS transistor and the charging MOS transistor are turned on, and the second analog-to-digital converter measures the voltage between the source and the drain of the discharging MOS transistor or the voltage between the source and the drain of the charging calibration MOS transistor, and combines the voltage between the source and the drain of the charging MOS transistor and the voltage across the first resistor to obtain the temperature coefficient variation of the charging calibration MOS transistor.

According to at least one embodiment of the present disclosure, the number of the discharge calibration MOS transistors is two, and a first discharge calibration MOS transistor and a second discharge calibration MOS transistor of the two discharge calibration MOS transistors are both connected to a drain of the discharge MOS transistor, and a source of the first discharge calibration MOS transistor is connected to the first current source, and a source of the second discharge calibration MOS transistor is connected to a negative terminal of the battery/battery pack.

According to at least one embodiment of the present disclosure, in a case of calibrating a temperature coefficient of the discharge MOS transistor, the first discharge calibration MOS transistor, and the second discharge calibration MOS transistor are all turned on, the second analog-to-digital converter measures a third voltage between a source and a drain of the second discharge calibration MOS transistor, the first analog-to-digital converter measures a fourth voltage between the source of the first discharge calibration MOS transistor and the source of the second discharge calibration MOS transistor, and a temperature coefficient change of the discharge calibration MOS transistor is obtained according to the third voltage, the fourth voltage, and a voltage across the first resistor.

According to at least one embodiment of the present disclosure, in a case of calibrating a temperature coefficient of the discharge MOS transistor, the first discharge calibration MOS transistor, and the second discharge calibration MOS transistor are all turned on, the first discharge calibration MOS transistor and the second discharge calibration MOS transistor are the same MOS transistor, a fourth voltage between a source of the first discharge calibration MOS transistor and a source of the second discharge calibration MOS transistor is measured by the first analog-to-digital converter, and a temperature coefficient change of the discharge calibration MOS transistor is obtained from the fourth voltage and a voltage across the first resistor.

According to at least one embodiment of the present disclosure, in case of calibrating a temperature coefficient of the discharging MOS transistor, the first discharging calibration MOS transistor, and the second discharging calibration MOS transistor are all turned on, and the second analog-to-digital converter measures a voltage between a source and a drain of the first discharging calibration MOS transistor, a voltage between a source of the first discharging calibration MOS transistor and a source of the second discharging calibration MOS transistor, a voltage between a source and a drain of the discharging MOS transistor, or a voltage between a source of the discharging MOS transistor and a source of the charging MOS transistor;

the first analog-to-digital converter measures a fourth voltage between the source of the first discharge calibration MOS transistor and the source of the second discharge calibration MOS transistor,

and obtaining the temperature coefficient change of the discharge calibration MOS transistor according to the voltage measured by the second analog-to-digital converter, the fourth voltage and the voltage at two ends of the first resistor.

According to at least one embodiment of the present disclosure, in a case where a charge calibration MOS transistor is included, the charge calibration MOS transistor is made conductive, and the second analog-to-digital converter measures a voltage between a source of the second discharge calibration MOS transistor and a source of the charge calibration MOS transistor to obtain the third voltage.

According to at least one embodiment of the present disclosure, the number of the charging calibration MOS transistors is two, and a first charging calibration MOS transistor and a second charging calibration MOS transistor of the two charging calibration MOS transistors are both connected to a drain of the charging MOS transistor, and a source of the first charging calibration MOS transistor is connected to the first current source, and a source of the second charging calibration MOS transistor is connected to a negative terminal of the battery/battery pack or a negative terminal of the load/charger terminal.

According to at least one embodiment of the present disclosure, in a case where a temperature coefficient of the charging MOS transistor is calibrated, the charging MOS transistor, the first charging calibration MOS transistor, and the second charging calibration MOS transistor are all turned on, the second analog-to-digital converter measures a fifth voltage between a source and a drain of the second charging calibration MOS transistor, the first analog-to-digital converter measures a sixth voltage between the source of the first charging calibration MOS transistor and the source of the second charging calibration MOS transistor, and a temperature coefficient change of the charging calibration MOS transistor is obtained according to the fifth voltage, the sixth voltage, and a voltage across the first resistor.

According to at least one embodiment of the present disclosure, in a case of calibrating a temperature coefficient of the charging MOS transistor, the first charging calibration MOS transistor, and the second charging calibration MOS transistor are all turned on, the first charging calibration MOS transistor and the second charging calibration MOS transistor are the same MOS transistor, a sixth voltage between a source of the first charging calibration MOS transistor and a source of the second charging calibration MOS transistor is measured by the first analog-to-digital converter, and a temperature coefficient change of the charging calibration MOS transistor is obtained according to the sixth voltage and a voltage across the first resistor.

According to at least one embodiment of the present disclosure, in case of calibrating a temperature coefficient of the charging MOS transistor, the first charging calibration MOS transistor, and the second charging calibration MOS transistor are all turned on, and the second analog-to-digital converter measures a voltage between a source and a drain of the first charging calibration MOS transistor, a voltage between a source of the first charging calibration MOS transistor and a source of the second charging calibration MOS transistor, a voltage between a source and a drain of the charging MOS transistor, or a voltage between a source of the charging MOS transistor and a source of the discharging MOS transistor;

the first analog-to-digital converter measures a sixth voltage between the source of the first charge calibration MOS transistor and the source of the second charge calibration MOS transistor,

and obtaining the temperature coefficient change of the charging calibration MOS transistor according to the voltage measured by the second analog-to-digital converter, the sixth voltage and the voltage at two ends of the first resistor.

According to at least one embodiment of the present disclosure, in a case where a discharge calibration MOS transistor is included, the discharge calibration MOS transistor is made conductive, and the second analog-to-digital converter measures a voltage between a source of the second charge calibration MOS transistor and a source of the discharge calibration MOS transistor to obtain the fifth voltage.

According to at least one embodiment of the present disclosure, a channel aspect ratio and/or the number of cells of the discharge calibration MOS transistor and a channel aspect ratio and/or the number of cells of the discharge MOS transistor are 1: m, and/or the channel length-width ratio and/or the number of the cells of the charging calibration MOS transistor and the channel length-width ratio and/or the number of the cells of the charging MOS transistor are 1: m, wherein M is greater than 1.

According to at least one embodiment of the present disclosure, the discharge MOS transistor and the discharge calibration MOS transistor are NMOS transistors or PMOS transistors, and the value of M is 100, 1000, or 10000.

According to still another aspect of the present disclosure, a battery management chip is integrated with the high-precision low-power consumption temperature coefficient calibration apparatus as described in any one of the above.

Drawings

The accompanying drawings, which are included to provide a further understanding of the disclosure and are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the disclosure and together with the description serve to explain the principles of the disclosure.

Fig. 1 shows a schematic diagram of a temperature coefficient calibration apparatus according to an embodiment of the present disclosure.

Fig. 2 shows a schematic diagram of a calibration device according to an embodiment of the present disclosure.

Fig. 3 illustrates a calibration device according to one embodiment of the present disclosure.

FIG. 4 shows a calibration circuit according to another embodiment of the present disclosure

FIG. 5 shows a calibration circuit according to another embodiment of the present disclosure

Fig. 6 shows a schematic diagram of a battery management chip according to one embodiment of the present disclosure.

Detailed Description

The present disclosure will be described in further detail with reference to the drawings and embodiments. It is to be understood that the specific embodiments described herein are for purposes of illustration only and are not to be construed as limitations of the present disclosure. It should be further noted that, for the convenience of description, only the portions relevant to the present disclosure are shown in the drawings.

It should be noted that the embodiments and features of the embodiments in the present disclosure may be combined with each other without conflict. Technical solutions of the present disclosure will be described in detail below with reference to the accompanying drawings in conjunction with embodiments.

Unless otherwise indicated, the illustrated exemplary embodiments/examples are to be understood as providing exemplary features of various details of some ways in which the technical concepts of the present disclosure may be practiced. Accordingly, unless otherwise indicated, features of the various embodiments may be additionally combined, separated, interchanged, and/or rearranged without departing from the technical concept of the present disclosure.

The use of cross-hatching and/or shading in the drawings is generally used to clarify the boundaries between adjacent components. As such, unless otherwise noted, the presence or absence of cross-hatching or shading does not convey or indicate any preference or requirement for a particular material, material property, size, proportion, commonality between the illustrated components and/or any other characteristic, attribute, property, etc., of a component. Further, in the drawings, the size and relative sizes of components may be exaggerated for clarity and/or descriptive purposes. While example embodiments may be practiced differently, the specific process sequence may be performed in a different order than that described. For example, two processes described consecutively may be performed substantially simultaneously or in reverse order to that described. In addition, like reference numerals denote like parts.

When an element is referred to as being "on" or "on," "connected to" or "coupled to" another element, it can be directly on, connected or coupled to the other element or intervening elements may be present. However, when an element is referred to as being "directly on," "directly connected to" or "directly coupled to" another element, there are no intervening elements present. For purposes of this disclosure, the term "connected" may refer to physically, electrically, etc., and may or may not have intermediate components.

For descriptive purposes, the present disclosure may use spatially relative terms such as "below … …," below … …, "" below … …, "" below, "" above … …, "" above, "" … …, "" higher, "and" side (e.g., as in "side wall") to describe one component's relationship to another (other) component as illustrated in the figures. Spatially relative terms are intended to encompass different orientations of the device in use, operation, and/or manufacture in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the exemplary term "below … …" can encompass both an orientation of "above" and "below". Further, the devices may be otherwise positioned (e.g., rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.

The terminology used herein is for the purpose of describing particular embodiments and is not intended to be limiting. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. Furthermore, when the terms "comprises" and/or "comprising" and variations thereof are used in this specification, the presence of stated features, integers, steps, operations, elements, components and/or groups thereof are stated but does not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and/or groups thereof. It is also noted that, as used herein, the terms "substantially," "about," and other similar terms are used as approximate terms and not as degree terms, and as such, are used to interpret inherent deviations in measured values, calculated values, and/or provided values that would be recognized by one of ordinary skill in the art.

According to one embodiment of the present disclosure, a high-precision low-power consumption temperature coefficient calibration device is provided, wherein the temperature coefficient calibration device can be used for calibrating the temperature coefficients of a charging MOS transistor and a discharging MOS transistor, calibrating the on-resistances of the charging MOS transistor and the discharging MOS transistor, and the like.

In the present disclosure, each MOS transistor may be integrated in one device, which may ensure that each transistor has the same temperature coefficient or a variation in temperature coefficient.

Fig. 1 illustrates a temperature coefficient calibration apparatus according to an embodiment of the present disclosure.

As shown in fig. 1, the temperature coefficient calibration apparatus may include: a discharge MOS transistor 110 and a charge MOS transistor 120. In the present disclosure, an NMOS transistor is taken as an example for illustration, but those skilled in the art should understand that it may also be a PMOS transistor, and furthermore. In the case of NMOS transistors, the series circuit of the discharge MOS transistor 110 and the charge MOS transistor 120 may be connected between the negative terminal of the battery pack and the negative terminal of the load/charger, and in the case of PMOS transistors, the series circuit of the discharge MOS transistor 110 and the charge MOS transistor 120 may be connected between the positive terminal of the battery pack and the positive terminal of the load/charger.

The gate of the discharge MOS transistor 110 is connected to a discharge control signal DSG to control the discharge of the battery pack, wherein the source of the discharge MOS transistor 110 is connected to one end B-of the battery pack. When only the discharge MOS transistor 110 is included, the drain of the discharge MOS transistor 110 may be connected to the load/charger terminal. Among them, the discharge MOS transistor 110 may include a parasitic diode.

Further, a zener diode 210 may be connected between the gate and the source of the discharge MOS transistor 110 in order to prevent the gate of the discharge MOS transistor 110 from being broken down. In fig. 1, a form of zener diode is shown, although other types of diodes may be selected. Which may include two zener diodes connected in series in opposite directions.

And the gate of the discharge MOS transistor 110 may be connected to the discharge control signal DSG through a resistor, which may have a resistance of 1K ohm, in order to provide electrostatic protection.

The discharge calibration MOS transistor 111 may calibrate a temperature coefficient of the discharge MOS transistor.

The drain of the discharge calibration MOS transistor 111 is connected to the drain of the discharge MOS transistor 110, the gate of the discharge calibration MOS transistor 111 is connected to the discharge control signal DSG, and the source of the discharge calibration MOS transistor 111 serves as a discharge calibration terminal SD 1. Among them, the discharge calibration MOS transistor 111 may include a parasitic diode. Although here, it is shown that the discharge calibration MOS transistor and the discharge MOS transistor use the same discharge control signal DSG, they may use different discharge control signals.

Further, a zener diode (e.g., in the form of zener diode 210) may be connected between the gate and the source of the discharge calibration MOS transistor 111 in order to prevent the gate of the discharge calibration MOS transistor 111 from being broken down.

The gate of the discharge calibration MOS transistor 111 may be connected to the discharge control signal DSG through a resistor, which may have a resistance of 100K ohms, so as to provide electrostatic protection.

The channel aspect ratio of the discharge calibration MOS transistor 111 and the channel aspect ratio of the discharge MOS transistor 110 are 1: m, wherein M is greater than 1. For example, the value of M may be 100, 1000, 10000, etc.

In addition, other discharge calibration MOS transistors 112 may be further included, where the number of the other discharge calibration MOS transistors may be N, where N is an integer greater than or equal to 1. The channel length-to-width ratio of the nth discharge calibration MOS transistor to the channel length-to-width ratio of the discharge MOS transistor 110 is 1: the power of N-1 of M, wherein i is an integer greater than or equal to 1, and the value of i changes along with the value of N. For example, the value of M is an integer multiple of 10, preferably 100. The channel length-to-width ratio of the Nth discharge calibration MOS transistor to the charge MOS transistor is 1: the power of M to the N-1. For example, the channel aspect ratio of the transistor 111 to the transistor 110 is 1:100, the channel aspect ratio of the transistor 112 to the transistor 110 is 1:1000, and the channel aspect ratio of the other transistors to the transistor 110 is 1: 10000. For example, when MOS transistors are characterized by the number of cells, depending on the type of MOS transistor, then the above-mentioned relationship of the channel aspect ratio can be expressed as a relationship of the number of cells (the number of parallel cells).

The other arrangement of the discharge calibration MOS transistor may be the same as the arrangement of the discharge calibration MOS transistor 111, and for the sake of brevity, the description thereof is omitted.

For example, as shown in fig. 1, the gates of the discharge

calibration MOS transistors

111, 112 may be controlled to be turned on and off by a discharge control signal DSG, and the sources may serve as the discharge calibration terminals SD1, SD 2.

According to a further embodiment of the present disclosure, the temperature coefficient calibration apparatus further includes: a charging MOS transistor 120, the gate of the charging MOS transistor 120 is connected with a charging control signal CG to control the charging of the battery pack, wherein the drain of the charging MOS transistor 120 is connected with the drain of the discharging MOS transistor 110, and the source of the charging MOS transistor 120 is connected with one end P-of the load/charger. Wherein the charging MOS transistor may include a parasitic diode.

Further, a zener diode 220 may be connected between the gate and the source of the charging MOS transistor 120 in order to prevent the gate of the charging MOS transistor 120 from being broken down. In fig. 1, a form of zener diode is shown, although other types of diodes may be selected. Which may include two zener diodes connected in series in opposite directions.

And the gate of the charging MOS transistor 120 may be connected to the discharge control signal DSG through a resistor, which may have a resistance of 1K ohm, in order to provide electrostatic protection.

Similarly to the discharge calibration MOS transistor of the discharge MOS transistor 110, the charge MOS transistor 120 may also be provided with a plurality of charge

calibration MOS transistors

121, 122.

Further, a zener diode may be connected between the gate and the source of the charge calibration MOS transistor in order to prevent the gate of the charge calibration MOS transistor from being broken down. And the gate of the charge calibration MOS transistor may be connected to the charge control signal CHG through a resistor, which may have a resistance of 100K ohms, so as to provide electrostatic protection.

The channel aspect ratio of the charge calibration MOS transistor and the channel aspect ratio of the charge MOS transistor 120 are 1: m, wherein M is greater than 1. For example, the value of M may be 100, 1000, 10000, etc. The number of the charge calibration MOS transistors is N, wherein N is an integer greater than or equal to 1, and the channel length-width ratio of the Nth charge calibration MOS transistor and the channel length-width ratio of the charge MOS transistor are 1: the power of N-1 of M, wherein i is an integer greater than or equal to 1, and the value of i changes along with the value of N. The value of M may be an integer multiple of 10, preferably 100. The channel length-to-width ratio of the Nth charge calibration MOS transistor and the charge MOS transistor is 1: the power of M to the N-1.

For example, the channel aspect ratio of the transistor 121 to the transistor 120 is 1:100, the channel aspect ratio of the transistor 122 to the transistor 120 is 1:1000, and the channel aspect ratio of the other transistors to the transistor 120 is 1: 10000. For example, when MOS transistors are characterized by the number of cells, depending on the type of MOS transistor, then the above-mentioned relationship of the channel aspect ratio can be expressed as a relationship of the number of cells (the number of parallel cells).

For example, as shown in fig. 1, the gates of the charging

calibration MOS transistors

121 and 122 may be controlled to be turned on and off by a charging control signal CHG, and the sources may serve as charging calibration terminals SC1 and SC 2.

In the present disclosure, the discharge MOS transistor and the discharge calibration MOS transistor are the same type of transistor, and the charge MOS transistor and the charge calibration MOS transistor are the same type of transistor. Or all four are the same type of MOS transistors.

It will be appreciated by those skilled in the art that the larger the channel width to length ratio of a MOS transistor, the smaller the on-resistance and thus the greater the current flowing through it. In the present disclosure, the on-resistance of the charging and discharging MOS transistor with a large aspect ratio will be small, so that the energy consumed in the charging and discharging circuit is small. When the current needs to be detected, the detection MOS transistor with the small channel width and length ratio is used, so that the on-resistance of the detection MOS transistor is large, the current flowing through the detection MOS transistor is small, the detection can be convenient, and the requirements of large current resistance of a subsequent acquisition unit and the like are not needed. Meanwhile, the detection MOS transistor is positioned in the detection branch circuit, so that the normal charge and discharge loop cannot be influenced, for example, the electric energy of a battery is consumed.

Although the charging current and the discharging current can be detected by the on-resistances of the charging and discharging MOS transistors. However, it should be noted that in the actual manufacturing process, the on-resistance cannot be made to be ideal, and the on-resistance of the transistor may also vary with temperature coefficient, for example, ± 20% may occur with temperature. It will affect the detection effect.

Therefore, in order to solve the problems in the prior art, a calibration device is proposed in the present disclosure.

Fig. 2 and 3 illustrate a calibration device according to one embodiment of the present disclosure. The discharge calibration MOS transistor 111 will be described as an example. The same principle can be applied to other discharge calibration MOS transistors, and in addition, the same principle can be applied to charge calibration MOS transistors.

The calibration apparatus may include a first current source 310 and a second current source 320, an external resistor 410, a first analog-to-digital converter 510, and a second analog-to-digital converter 520.

The first current source 310 is for providing a first calibration current Ical1, the second current source 320 is for providing a second calibration current Ical2, and the current values of the first and second calibration currents may be equal. Further, preferably, the first and second

current sources

310 and 320 may generate the first and second calibration currents Ical1 and Ical2 according to the voltage VB + (voltage of B + terminal) of the battery pack. More preferably, the first current source and the second current source may be the same current source.

The second current source 320 is connected to the negative terminal B of the battery pack via an external resistor 410, and the first current source 310 is connected to the discharge calibration MOS transistor, for example, may be connected to the source of the discharge calibration MOS transistor 111.

The second analog-to-digital converter 520 may be used to measure the voltage across the series circuit of the discharge MOS transistor 110 and the charge MOS transistor 120.

In the present disclosure, the voltage VDS1 between the terminal D and the terminal S1 of the discharging MOS transistor 110 is (VB1-VP1)/2, where VB1 is the voltage at the negative terminal B-of the battery pack and VP1 is the voltage at the negative terminal P-of the load/charger. The voltage VDS1 can here be obtained by half the voltage measured by the second analog-to-digital converter.

In the case where the first current source 310 provides the first calibration current Ical1, the voltage at the source terminal SD1 of the discharge calibration MOS transistor will be equal to VSD1 — Ron1M × Ical1+ IL × Ron1+ Ical1 × Ron1, where Ron1M is the on-resistance of the transistor 111, IL is the charging current, and Ron1 is the on-resistance of the transistor 110.

Because Ron1 is 1/100, 1/1000, 1/10000, etc. of Ron1M, the voltage VSD1 will be approximately equal to Ron1M Ical1+ IL international 1-V2 (Ical1 is set small, being a small current). IL × Ron1 ═ V1/2 ═ VB1-VP1)/2, where the voltage V1 collected by the second analog-to-digital conversion unit is ═ VB1-VP1, so Ron1M ═ Ical1 ═ V2-V1/2, where V2 is the difference between the voltage at the connection point a of the first current source 310 and the source of the discharge calibration MOS transistor 111 shown in fig. 1 and the voltage at the negative terminal B-of the battery pack, and this V2 is collected by the first analog-to-digital converter 510.

Thus Ron1M ═ V2-V1/2)/Ical 1.

The first adc 510 may also measure a voltage between the terminals B and B "of the external resistor 410, wherein the voltage may be represented as V3, where V3 is Ical2 Rext, where Ical2 is the second calibration current provided by the second current source 320, and Rext is the resistance value of the external resistor. Wherein the second calibration current may be the same as the first calibration current. Although two different current sources are shown in the figure, it is also possible to implement a current source by which two branches are branched to connect the external resistor and the discharge calibration MOS transistor. Wherein the voltage V3 may be measured by the first analog-to-digital converter 510.

In this way it is possible to obtain,

since the external resistor may be a zero temperature coefficient resistor or a low temperature coefficient resistor, for example, the temperature coefficient is usually 10 ppm/DEG C. The amount of change in Ron1M with temperature will be

Because Ron1M and Ron1 have a predetermined ratio, and the ratio is set to be constant. Therefore, the temperature change amount of Ron1 can be obtained from the temperature change amount of Ron 1M. Therefore, after the temperature variation of Ron1 is known, calibration and compensation can be performed according to the temperature variation.

In the technical scheme of the disclosure, a sampling resistor is omitted, the sampling resistor is generally connected in series with the charging and discharging MOS transistor, and the charging voltage or the discharging voltage is obtained by collecting the voltage at two ends of the sampling resistor. It is omitted entirely in this disclosure, which can reduce power consumption and also save cost.

Further, in the present disclosure, although it is described that the voltages of the terminals S1 and S2 are measured by the second analog-to-digital converter, it should be noted that the second analog-to-digital converter may also measure the voltage between the terminal S1 and the terminal D, which is the drain terminal of the discharge MOS transistor 110.

In the actual manufacturing process, the D terminal can be led out and the voltage condition thereof is measured. But in order to separately draw out the D terminal, such as by a wire, it would greatly increase the manufacturing cost due to the limitation of the device manufacturing process.

Therefore, in the present disclosure, since the charging calibration MOS transistor 121 needs to detect the temperature coefficient of the charging MOS transistor, and in the manufacturing process, according to the structure of the present disclosure, the drains of the

transistors

110, 111, 120, and 121 need to be connected. Therefore, in order to avoid the increase of process complexity and cost caused by separately leading out the D terminal, in the present disclosure, the transistor 121 may be used for implementation in the temperature coefficient calibration of the discharge MOS transistor 110. Specific implementations will be described below. Furthermore, in the process of integrating the respective MOS transistors into one chip, if the voltage of the drain needs to be measured separately, a separate pin is required because the increase of the pin may cause an increase in the chip size and the like.

Therefore, in order to further solve the technical problem, a further improvement is provided in the present disclosure, for example, as shown in fig. 4, when measuring the temperature coefficient variation of the discharging MOS transistor 110, the discharging MOS transistor 110 and the discharging calibration MOS transistor 111 may be turned on, and the charging calibration MOS transistor 121 may also be turned on. Here, since the temperature coefficient calibration of the charging MOS transistor 120 is required, the charging calibration MOS transistor 121 needs to be provided accordingly. At this time, the measurement of the drain voltage can be achieved by using the charge calibration MOS transistor 121.

In the present disclosure, since the voltage of the P-terminal is not stable and sometimes has a large deviation, and thus, the way of obtaining the voltage V1 by measuring the voltage between the B-terminal and the P-terminal in the above embodiment may not be accurate, a preferred technical solution in the present disclosure is to measure the voltage between the drain D and the source terminal S1 to calibrate the temperature coefficient of the discharge MOS transistor 110, and to calibrate the temperature coefficient of the charge MOS transistor 120 by measuring the voltage between the drain D and the source terminal S2.

The temperature coefficient compensation of the discharge MOS transistor 110 will be explained as an example. Here, the second analog-to-digital converter 520 may connect the source terminal (B-terminal) of the discharge MOS transistor 110 and the source terminal S2M of the charge calibration MOS transistor 121, so that in a case where the charge calibration MOS transistor 121 is turned on, a voltage between the source and the drain of the discharge MOS transistor 110 may be obtained through the second analog-to-digital converter connected between the terminal S2M and the terminal S1. And further according to the formula mentioned above

To obtain the temperature coefficient variation, wherein V1/2 in this formula is the voltage between the source and the drain of the discharge MOS transistor 110.

Further, the measurement of the temperature variation amount of the discharging MOS transistor 110 is described above, but the measurement of the charging MOS transistor 120 may be performed in the same manner, that is, the first calibration current may be supplied to the SC1 terminal through the current source, and the temperature variation amount of the charging MOS transistor 120 may also be realized by the above-described procedure. It will be understood by those skilled in the art that the first current source 310 may be connected to the SC1 terminal and the series circuit of the second current source and the resistor 410 may be connected to the B-terminal and also to the P-terminal in the process of correcting the temperature coefficient of the charging MOS transistor 120.

At this time, the transistor 120 and the transistor 121 need to be turned on, and the transistor 111 also needs to be turned on, and the second analog-to-digital converter 520 may measure the voltage between the terminal S2 and the terminal D as the correlation term of V1/2 in the above equation. In addition, the second analog-to-digital converter may also measure the voltage between the terminal S1 and the terminal S2, or may also measure the voltage at the terminal S1 and the terminal SC1, and so on.

If the temperature coefficients of the discharging MOS transistor 110 and the charging MOS transistor 120 are not calibrated, the on-resistances of the two will have a temperature coefficient, for example, in the case of from-40 ℃ to 80 ℃, the two will vary by more than 20%. Therefore, without calibrating the temperature variation or temperature coefficient of the two, the charging current or the discharging current will be detected with an error of at least 20%. Therefore, the disclosure innovatively proposes that when a charging and discharging MOS transistor (large tube) is calibrated, a calibration current can be injected into the corresponding charging and discharging electrical calibration MOS transistor (small tube) through a current source, the voltage at two ends of the small tube is measured (the voltage of the small tube is simply obtained), and the temperature coefficient of the large tube is correspondingly obtained according to the proportional relation between the large tube and the small tube, so that a basis is provided for the subsequent charging and discharging current compensation.

Further, in the above manner, during the calibration process, the obtaining of V2 will be affected by the charging and discharging current, such as the above-mentioned formula related to V2. So that it may affect the actual charging and discharging process during the calibration process or the charging and discharging process may affect the calibration process. According to a further embodiment of the present disclosure, there is further provided an improved embodiment.

Referring to fig. 5, two discharge

calibration MOS transistors

111, 112 and two charge

calibration MOS transistors

121, 122 may be included.

The temperature coefficient calibration of the discharge MOS transistor 110 will be described as an example. The drains of the discharge calibration MOS transistor 111 and the discharge calibration MOS transistor 112 are connected to the drain of the discharge MOS transistor 110, and the drains of the charge calibration MOS transistor 121 and the charge calibration MOS transistor 122 are connected to the drain of the charge MOS transistor 120.

The source terminal SD2 of the discharge calibration MOS transistor 112 is connected to a first current source, and the source terminal SD1 of the discharge calibration MOS transistor 111 is connected to the B-terminal of the battery pack.

In the calibration process, the discharge calibration MOS transistor 111 and the discharge calibration MOS transistor 112 may be made conductive. While the second analog-to-digital converter may measure the voltage across the transistor 110 and the transistor 120, as described above, and more preferably, make one of the charging calibration MOS transistor 121 and the charging calibration MOS transistor 122 conductive, the second analog-to-digital converter may measure the voltage of the B-terminal of the battery pack and the source of the conductive one of the charging calibration MOS transistor 121 and the charging calibration MOS transistor 122. In this way, the charging and discharging current can be made to not cause any interference to the calibration.

In addition, the second analog-to-digital converter may measure a voltage between the S1 terminal and the S2 terminal, may measure a voltage between the S1 terminal and the D terminal, may measure a voltage between the S1 terminal and the SC1 terminal, may measure a voltage between the S1 terminal and the SC2 terminal, and the like.

The following will describe with reference to the connection manner of fig. 5. The discharge calibration MOS transistor 111 and the discharge calibration MOS transistor 112 are turned on, and the charge calibration MOS transistor 121 is turned on. Thus, the device is provided with

Where V3 is the voltage between terminals B and B-of the external resistor 410, V2 is the voltage between terminals a and B-and V4 is the voltage between terminals D and B-of the transistor 111.

In addition, in the case where the transistor 111 and the transistor 112 are provided identically, V2 will be equal to 2 × V4, so that the above formula can be transformed into

In this way, further advantages can also be obtained. While those skilled in the art understand that a constant current source can provide a constant current, in actual manufacturing, the provision of a completely constant current is nearly impossible, and the higher the accuracy of the current provided, the higher the cost.

However, according to this embodiment of the present disclosure, the accuracy problem of the current provided by the constant current source can be ignored, as can be seen in the above equation,

independence from a constant current source can be achieved. This can effectively reduce the cost and the like.

The present disclosure also provides a battery management chip, as shown in fig. 6, which may include the calibration device described above, and it should be noted that in the battery management chip, the respective MOS transistors described above may be integrated in the one battery management chip.

In the description herein, reference to the description of the terms "one embodiment/mode," "some embodiments/modes," "example," "specific example," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment/mode or example is included in at least one embodiment/mode or example of the application. In this specification, the schematic representations of the terms used above are not necessarily intended to be the same embodiment/mode or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments/modes or examples. Furthermore, the various embodiments/aspects or examples and features of the various embodiments/aspects or examples described in this specification can be combined and combined by one skilled in the art without conflicting therewith.

Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present application, "plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.

It will be understood by those skilled in the art that the foregoing embodiments are merely for clarity of illustration of the disclosure and are not intended to limit the scope of the disclosure. Other variations or modifications may occur to those skilled in the art, based on the foregoing disclosure, and are still within the scope of the present disclosure.

Claims

1. A high-precision low-power consumption temperature coefficient calibration device is used for calibrating the temperature coefficient of MOS transistors, the MOS transistors are a charging MOS transistor and a discharging MOS transistor which control the charging and discharging of a battery/battery pack, the drain electrode of the charging MOS transistor and the drain electrode of the discharging MOS transistor are connected to form a series circuit, and the device is characterized by comprising:

2. The temperature coefficient calibration device according to claim 1, wherein the charge MOS transistor, the discharge calibration MOS transistor, and the charge calibration MOS transistor are MOS transistors of the same type, and a channel aspect ratio and/or a cell number of the discharge MOS transistor is proportional to a channel aspect ratio and/or a cell number of the discharge calibration MOS transistor, and a channel aspect ratio and/or a cell number of the charge MOS transistor is proportional to a channel aspect ratio and/or a cell number of the charge calibration MOS transistor.

3. The temperature coefficient calibration device according to claim 2, further comprising a first resistor and a calibration portion,

the first resistor is a zero temperature coefficient resistor or a low temperature coefficient resistor, one end of the first resistor is connected with the second current source, the other end of the first resistor is connected with the negative end of the battery pack,

the calibration section obtains a temperature coefficient change of the discharge calibration MOS transistor based on a voltage between a source and a drain of the discharge calibration MOS transistor and obtains a temperature coefficient change of the discharge MOS transistor from a relationship between the discharge calibration MOS transistor and the discharge MOS transistor, and/or obtains a temperature coefficient change of the charge calibration MOS transistor based on a voltage between a source and a drain of the charge calibration MOS transistor and obtains a temperature coefficient change of the charge MOS transistor from a relationship between the charge calibration MOS transistor and the charge MOS transistor.

4. The temperature coefficient calibration apparatus according to claim 3, wherein the first current source and the second current source are the same current source or different current sources, and in the case of different current sources, a current value of the first calibration current supplied from the first current source and a current value of the second calibration current supplied from the second current source are equal or unequal.

5. The temperature coefficient calibration apparatus of claim 3, wherein the analog-to-digital converter comprises:

6. The temperature coefficient calibration device according to claim 5, wherein the number of the discharge calibration MOS transistors is one.

7. The temperature coefficient calibration device according to claim 6, wherein in a case of calibrating the temperature coefficient of the discharge MOS transistor, the discharge calibration MOS transistor and the discharge MOS transistor are turned on, and the second analog-to-digital converter measures a voltage between the source of the discharge MOS transistor and the source of the charge MOS transistor, and obtains the temperature coefficient variation of the discharge calibration MOS transistor from the voltage between the source and the drain of the discharge calibration MOS transistor, the voltage between the source and the drain of the discharge MOS transistor, and the voltage across the first resistor.

8. The temperature coefficient calibration device according to claim 7, wherein in a case where a discharge calibration MOS transistor and a charge calibration MOS transistor are included, drains of the discharge calibration MOS transistor and the charge calibration MOS transistor are each connected to a drain of the discharge MOS transistor, in a case where a temperature coefficient of the discharge MOS transistor is calibrated, the discharge calibration MOS transistor, the discharge MOS transistor, and the charge calibration MOS transistor are turned on, and the second analog-to-digital converter measures a first voltage between a source of the discharge MOS transistor and a source of the charge calibration MOS transistor, and derives a temperature coefficient change of the discharge calibration MOS transistor from the first voltage and a voltage across the first resistor.

9. The temperature coefficient calibration device according to claim 7, wherein in a case where the temperature coefficient of the discharge MOS transistor is calibrated, the discharge calibration MOS transistor and the discharge MOS transistor are turned on, and the second analog-to-digital converter measures a voltage between a source and a drain of the discharge MOS transistor or measures a voltage between a source and a drain of the discharge calibration MOS transistor, and obtains the temperature coefficient variation of the discharge calibration MOS transistor in conjunction with the voltage between the source and the drain of the discharge MOS transistor and the voltage across the first resistor.

10. The temperature coefficient calibration device according to claim 5, wherein the number of the charge calibration MOS transistors is one.

11. The temperature coefficient calibration device according to claim 10, wherein in a case of calibrating the temperature coefficient of the charging MOS transistor, the charging calibration MOS transistor and the charging MOS transistor are turned on, and the second analog-to-digital converter measures a voltage between the source of the discharging MOS transistor and the source of the charging MOS transistor, and obtains the temperature coefficient variation of the charging calibration MOS transistor from the voltage between the source and the drain of the charging calibration MOS transistor, the voltage between the source and the drain of the charging MOS transistor, and the voltage across the first resistor.

12. The temperature coefficient calibration device according to claim 10, wherein in a case where a discharge calibration MOS transistor and a charge calibration MOS transistor are included, drains of the charge calibration MOS transistor and the discharge calibration MOS transistor are connected to a drain of the charge MOS transistor, in a case where a temperature coefficient of the charge MOS transistor is calibrated, the charge calibration MOS transistor, the charge MOS transistor, and the discharge calibration MOS transistor are turned on, and the second analog-to-digital converter measures a second voltage between a source of the charge MOS transistor and a source of the discharge calibration MOS transistor, and derives a temperature coefficient change of the charge calibration MOS transistor from the second voltage and a voltage across the first resistor.

13. The temperature coefficient calibration device according to claim 10, wherein in a case of calibrating the temperature coefficient of the charging MOS transistor, the charging calibration MOS transistor and the charging MOS transistor are turned on, and the second analog-to-digital converter measures a voltage between the source and the drain of the discharging MOS transistor or a voltage between the source and the drain of the charging calibration MOS transistor, and combines the voltage between the source and the drain of the charging MOS transistor and the voltage across the first resistor to obtain the temperature coefficient variation of the charging calibration MOS transistor.

14. The temperature coefficient calibration device according to claim 5, wherein the number of the discharge calibration MOS transistors is two, and a first discharge calibration MOS transistor and a second discharge calibration MOS transistor of the two discharge calibration MOS transistors are both connected to the drain of the discharge MOS transistor, and the source of the first discharge calibration MOS transistor is connected to the first current source, and the source of the second discharge calibration MOS transistor is connected to the negative terminal of the battery/battery pack.

15. The temperature coefficient calibration device according to claim 14, wherein in a case of calibrating the temperature coefficient of the discharge MOS transistor, the first discharge calibration MOS transistor, and the second discharge calibration MOS transistor are all turned on, the second analog-to-digital converter measures a third voltage between a source and a drain of the second discharge calibration MOS transistor, the first analog-to-digital converter measures a fourth voltage between the source of the first discharge calibration MOS transistor and the source of the second discharge calibration MOS transistor, and the temperature coefficient variation of the discharge calibration MOS transistor is obtained from the third voltage, the fourth voltage, and the voltage across the first resistor.

16. The temperature coefficient calibration device according to claim 14, wherein in a case of calibrating the temperature coefficient of the discharge MOS transistor, the first discharge calibration MOS transistor, and the second discharge calibration MOS transistor are all turned on, the first discharge calibration MOS transistor and the second discharge calibration MOS transistor are the same MOS transistor, and a fourth voltage between the source of the first discharge calibration MOS transistor and the source of the second discharge calibration MOS transistor is measured by the first analog-to-digital converter, and the temperature coefficient variation of the discharge calibration MOS transistor is obtained from the fourth voltage and a voltage across the first resistor.

17. The temperature coefficient calibration apparatus according to claim 14, wherein in a case of calibrating the temperature coefficient of the discharge MOS transistor, the first discharge calibration MOS transistor, and the second discharge calibration MOS transistor are all turned on, and the second analog-to-digital converter measures a voltage between a source and a drain of the first discharge calibration MOS transistor, a voltage between a source of the first discharge calibration MOS transistor and a source of the second discharge calibration MOS transistor, a voltage between a source and a drain of the discharge MOS transistor, or a voltage between a source of the discharge MOS transistor and a source of the charge MOS transistor;

18. The temperature coefficient calibration device of claim 15, wherein in a case where a charge calibration MOS transistor is included, the charge calibration MOS transistor is made conductive, and the second analog-to-digital converter measures a voltage between a source of the second discharge calibration MOS transistor and a source of the charge calibration MOS transistor to obtain the third voltage.

19. The temperature coefficient calibration device according to claim 5, wherein the number of the charge calibration MOS transistors is two, and a first charge calibration MOS transistor and a second charge calibration MOS transistor of the two charge calibration MOS transistors are both connected to a drain of the charge MOS transistor, and a source of the first charge calibration MOS transistor is connected to the first current source, and a source of the second charge calibration MOS transistor is connected to a negative terminal of the battery/battery pack or a negative terminal of the load/charger terminal.

20. The temperature coefficient calibration device according to claim 19, wherein in a case of calibrating the temperature coefficient of the charging MOS transistor, the first charging calibration MOS transistor, and the second charging calibration MOS transistor are all turned on, the second analog-to-digital converter measures a fifth voltage between a source and a drain of the second charging calibration MOS transistor, the first analog-to-digital converter measures a sixth voltage between the source of the first charging calibration MOS transistor and the source of the second charging calibration MOS transistor, and the temperature coefficient variation of the charging calibration MOS transistor is obtained from the fifth voltage, the sixth voltage, and a voltage across the first resistor.

21. The temperature coefficient calibration device according to claim 19, wherein in the case of calibrating the temperature coefficient of the charging MOS transistor, the first charging calibration MOS transistor, and the second charging calibration MOS transistor are all turned on, the first charging calibration MOS transistor and the second charging calibration MOS transistor are the same MOS transistor, and a sixth voltage between the source of the first charging calibration MOS transistor and the source of the second charging calibration MOS transistor is measured by the first analog-to-digital converter, and the temperature coefficient variation of the charging calibration MOS transistor is obtained from the sixth voltage and the voltage across the first resistor.

22. The temperature coefficient calibration device according to claim 19, wherein in a case of calibrating the temperature coefficient of the charging MOS transistor, the first charging calibration MOS transistor, and the second charging calibration MOS transistor are all turned on, and the second analog-to-digital converter measures a voltage between a source and a drain of the first charging calibration MOS transistor, a voltage between a source of the first charging calibration MOS transistor and a source of the second charging calibration MOS transistor, a voltage between a source and a drain of the charging MOS transistor, or a voltage between a source of the charging MOS transistor and a source of the discharging MOS transistor;

23. The temperature coefficient calibration device of claim 20, wherein in a case where a discharge calibration MOS transistor is included, the discharge calibration MOS transistor is made conductive, and the second analog-to-digital converter measures a voltage between a source of the second charge calibration MOS transistor and a source of the discharge calibration MOS transistor to obtain the fifth voltage.

24. The temperature coefficient calibration device according to any one of claims 2 to 23, wherein a channel aspect ratio and/or the number of cells of the discharge calibration MOS transistor and a channel aspect ratio and/or the number of cells of the discharge MOS transistor are 1: m, and/or the channel length-width ratio and/or the number of the cells of the charging calibration MOS transistor and the channel length-width ratio and/or the number of the cells of the charging MOS transistor are 1: m, wherein M is greater than 1.

25. The temperature coefficient calibration device of claim 24, wherein the discharge MOS transistor and the discharge calibration MOS transistor are NMOS transistors or PMOS transistors, and the value of M is 100, 1000, or 10000.

26. A battery management chip incorporating a high accuracy low power temperature coefficient calibration apparatus as claimed in any one of claims 1 to 25.