CN215933169U - Backlight control circuit of display device and display device - Google Patents
Backlight control circuit of display device and display device Download PDFInfo
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- CN215933169U CN215933169U CN202122197908.4U CN202122197908U CN215933169U CN 215933169 U CN215933169 U CN 215933169U CN 202122197908 U CN202122197908 U CN 202122197908U CN 215933169 U CN215933169 U CN 215933169U
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Abstract
The utility model discloses a backlight control circuit of a display device, the display device comprises a display panel and a backlight circuit for providing backlight to the display panel, the backlight control circuit comprises: the switching control unit receives the first refresh rate switching signal and generates a switching control signal according to the first refresh rate switching signal; the time sequence control unit is connected with the switching control unit, receives the switching control signal and outputs one of the original signal and the dynamic signal as a backlight modulation signal according to the effective state of the switching control signal; the backlight driving unit receives the backlight modulation signal and generates a backlight driving signal according to the backlight modulation signal to drive the backlight circuit so as to enable the brightness of the backlight circuit to be in smooth transition when the refresh rate is switched; the dynamic signal is a pulse width modulation signal with a variable duty ratio, and smooth transition of brightness is realized when the display device switches the refresh rate, so that human eyes cannot perceive flicker of the display panel due to sudden brightness change.
Description
Technical Field
The present invention relates to the field of display technologies, and in particular, to a backlight control circuit of a display device and a display device.
Background
LCD (Liquid Crystal Display) has many advantages such as low power consumption, light weight, low radiation, etc., and thus has been used to replace the conventional Cathode Ray Tube (CRT) Display. Liquid crystal display devices are widely used in electronic devices such as high-definition digital televisions, desktop computers, notebook computers, tablet computers, mobile phones, digital cameras, and the like.
With the development of display technology, existing liquid crystal display devices support multiple refresh rates and switch between different refresh rates. For example, SW1(Seamless dynamic refresh Switching) changes the refresh Rate of the display device by changing the entire refresh Rate, but when the liquid crystal display device is switched to a different refresh Rate, the charging time of the liquid crystal capacitor is different, the luminance change difference is large, and the problem of screen flicker is caused.
SUMMERY OF THE UTILITY MODEL
In view of the above problems, an object of the present invention is to provide a backlight control circuit of a display device and a display device, so as to improve the problem of screen flicker when the display device is switched in the refresh rate.
According to an aspect of the present invention, there is provided a backlight control circuit of a display device including a display panel and a backlight circuit that supplies backlight to the display panel, the backlight control circuit comprising: the switching control unit receives a first refresh rate switching signal and generates a switching control signal according to the first refresh rate switching signal; the time sequence control unit is connected with the switching control unit, receives the switching control signal and outputs one of an original signal and a dynamic signal as a backlight modulation signal according to the effective state of the switching control signal; the backlight driving unit receives the backlight modulation signal and generates a backlight driving signal according to the backlight modulation signal to drive the backlight circuit so as to enable the brightness of the backlight circuit to be in smooth transition when the refresh rate is switched; wherein the dynamic signal is a pulse width modulation signal with a variable duty ratio.
Optionally, the timing control unit is configured to: when receiving a switching control signal in a first state, outputting the original signal as a backlight modulation signal; when receiving a switching control signal in a second state, reading a set parameter of a pulse width modulation signal in a lookup table, generating a dynamic signal, and outputting the dynamic signal as a backlight modulation signal; wherein the dynamic signal is a pulse width modulation signal with the duty ratio gradually changing to a preset value.
Optionally, the handover control unit includes: the time delay network receives the first refresh rate switching signal and generates a second refresh rate switching signal according to the first refresh rate switching signal; the voltage divider network receives a working voltage and generates a first reference voltage and a second reference voltage according to the working voltage, wherein the first reference voltage is greater than the second reference voltage; a non-inverting input terminal of the first comparator receives the second refresh rate switching signal, an inverting input terminal of the first comparator receives the first reference voltage, and an output terminal of the first comparator is connected to an output terminal of the switching control signal through a third resistor; a non-inverting input terminal of the second comparator receives the second reference voltage, an inverting input terminal of the second comparator receives the second refresh rate switching signal, and an output terminal of the second comparator is connected to an output terminal of the switching control signal through a first resistor; a second resistor connected between an output terminal of the switching control signal and ground; wherein the delay network is configured to generate a second refresh rate switching signal that rises with a first predetermined slope or falls with a second predetermined slope when the first refresh rate switching signal level flips.
Optionally, the delay network includes: a seventh resistor and a first capacitor connected in series between the input terminal of the first refresh rate switching signal and ground, an intermediate node of the seventh resistor and the first capacitor outputting a second refresh rate switching signal.
Optionally, the voltage divider network comprises: the fourth resistor, the fifth resistor and the sixth resistor are sequentially connected between the working voltage and the ground in series; an intermediate node of the fourth resistor and the fifth resistor outputs the first reference voltage, and an intermediate node of the fifth resistor and the sixth resistor outputs the second reference voltage.
Optionally, the backlight control circuit further comprises: a storage unit for storing the lookup table.
Optionally, the look-up table stored in the storage unit is used to indicate related parameters of the pwm signals corresponding to different gray scales when the refresh rates are different.
Optionally, the memory unit is selected from any one of a programmable read only memory, an erasable programmable read only memory and a charged erasable programmable read only memory.
According to another aspect of the present invention, there is provided a display device, comprising: a display panel, a backlight circuit for providing backlight to the display panel, and a backlight control circuit as described above.
Optionally, the display device further comprises: the display device comprises a grid driving circuit used for providing grid voltage for the display panel, and a source driving circuit used for providing gray scale data for the display panel; the timing control unit is used for controlling the gate driving circuit and the source driving circuit.
When the backlight control circuit of the display device and the display device provided by the utility model switch the screen refresh rate, the time sequence control unit generates a pulse width modulation signal with the frequency or the duty ratio gradually changing to the preset value, namely a dynamic signal, by reading the lookup table, and outputs the dynamic signal as the backlight modulation signal, the backlight driving unit generates the backlight driving signal according to the backlight modulation signal, and drives the backlight circuit to realize the smooth transition of the brightness of the backlight driving signal, so that the problem of screen flicker when the refresh rate is switched in the prior art is effectively solved.
Optionally, when the display device according to the embodiment of the present invention switches the refresh rate, the level of the first refresh rate switching signal is inverted, the switching control signal maintains a low level state for a predetermined time, and the timing control unit gradually changes the frequency or the duty ratio to a pulse width modulation signal of a preset value, that is, a dynamic signal, when the switching control signal is in an effective state, and outputs the dynamic signal as the backlight modulation signal. Within a preset time, the frequency or the duty ratio of the dynamic signal is gradually changed, so that the brightness of a backlight circuit driven by the backlight driving signal is gradually changed, and the smooth transition of the screen brightness of the display device is realized; after a preset time, the switching control signal is turned from a low level to a high level, and the time sequence control unit outputs the original signal as a backlight modulation signal, so that the display device works in a common mode.
Optionally, the predetermined time period may be changed by adjusting the value of the seventh resistor or the first capacitor, so that the display device according to the embodiment of the present invention may adapt to switching between different frequencies, and the application range is wider.
Drawings
The above and other objects, features and advantages of the present invention will become more apparent from the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:
FIG. 1 shows a display device according to an embodiment of the utility model;
FIG. 2 shows a timing diagram of an original signal and a dynamic signal;
fig. 3 shows a circuit configuration diagram of the switching control unit in fig. 1;
fig. 4 shows a timing diagram of the switching control unit in fig. 3.
Detailed Description
Various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. In the various figures, the same elements or modules are denoted by the same or similar reference numerals. For purposes of clarity, the various features in the drawings are not necessarily drawn to scale.
It should be understood that in the following description, "circuitry" may comprise singly or in combination hardware circuitry, programmable circuitry, state machine circuitry, and/or elements capable of storing instructions executed by programmable circuitry. When an element or circuit is referred to as being "connected to" another element or circuit is referred to as being "connected between" two nodes, it may be directly coupled or connected to the other element or intervening elements may be present, and the connection between the elements may be physical, logical, or a combination thereof. In contrast, when an element is referred to as being "directly coupled" or "directly connected" to another element, it is intended that there are no intervening elements present.
Also, certain terms are used throughout the description and claims to refer to particular components. As one of ordinary skill in the art will appreciate, manufacturers may refer to a component by different names. This patent specification and claims do not intend to distinguish between components that differ in name but not function.
In the present application, the term "semiconductor structure" refers to the general term for the entire semiconductor structure formed in the various steps of manufacturing a memory device, including all layers or regions that have been formed. In the following description, numerous specific details of the utility model, such as structure, materials, dimensions, processing techniques and techniques of the devices are described in order to provide a more thorough understanding of the utility model. However, as will be understood by those skilled in the art, the present invention may be practiced without these specific details.
Moreover, it is further noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The present invention may be embodied in various forms, some examples of which are described below.
Fig. 1 shows a display device according to an embodiment of the present invention. The display device 100 includes a display panel 110, a backlight circuit 150 providing a backlight to the display panel 110, a backlight control circuit 120, a source driving circuit 130, and a gate driving circuit 140.
The display panel 110 is implemented, for example, in a vertical electric field driving method such as a Twisted Nematic (TN) mode and a Vertical Alignment (VA) mode or in a horizontal electric field driving manner such as an in-plane switching (IPS) mode and a Fringe Field Switching (FFS) mode. The display device is for example selected from any type of liquid crystal display implemented as including transmissive liquid crystal displays and transflective liquid crystal displays.
As a non-limiting example, the display panel 110 includes a first substrate, a second substrate, and a liquid crystal layer, a first surface of the first substrate being opposite to a second surface of the second substrate, the liquid crystal layer being between the first surface of the first substrate and the second surface of the second substrate. (the first substrate is, for example, a TFT substrate, and the second substrate is, for example, a color filter substrate, but the utility model is not limited thereto). A plurality of gate scan lines G1-Gm and a plurality of source data lines S1-Sn are formed on the first surface of the first substrate to intersect each other, and a pixel unit including a thin film transistor and a pixel electrode is disposed at the intersection of the gate scan lines and the source data lines. And forming a common electrode on the second surface of the second substrate. The liquid crystal layer is included between the pixel electrode and the common electrode, and can be equivalent to a liquid crystal capacitor. To hold the voltage between update periods of the pixel, the liquid crystal capacitance may store the capacitance in parallel for a longer hold time.
The gate driving circuit 140 is connected to the plurality of gate scan lines for providing a gate voltage to sequentially scan the plurality of gate scan lines in each frame period to gate the corresponding thin film transistors. The source driving circuit 130 is connected to a plurality of source data lines for applying voltages corresponding to gray scales to the liquid crystal capacitors via the source data lines, thereby changing the deflection of the liquid crystal molecules.
The backlight circuit 150 includes a backlight source for providing backlight to the display panel 110. The backlight may consist of a single or multiple point light sources. Illustratively, the backlight source is composed of a plurality of LEDs (light Emitting diodes) for providing backlight to the display panel 110. In one embodiment, the display device 100 employs a direct type backlight, the backlight circuit 150 is located at the second surface side of the first substrate of the display panel 110, and the backlight sequentially passes through the first substrate and the second substrate of the display panel 110 to reach the eyes of the viewer when the display device is in use. In another embodiment, the display device 100 employs a side-in type backlight, and the backlight circuit 150 is located on the upper and lower sides or the left and right sides of the display panel 110, and changes the optical path of the backlight through the light guide plate to sequentially pass through the first substrate and the second substrate of the display panel 110 to reach the eyes of the viewer.
The backlight control circuit 120 is used for controlling the brightness of the backlight source in the backlight circuit 150 according to the input image signal and the first refresh rate switching signal SW 1. The backlight control circuit 120 includes a backlight driving unit 121, a timing control unit 122, a switching control unit 123, and a storage unit 124.
The switching control unit 123 receives the first refresh rate switching signal SW1, and generates the switching control signal SWc according to the first refresh rate switching signal SW 1.
The timing control unit 122 is connected to the switching control unit 123, receives the switching control signal SWc, and outputs one of the original signal PWMI and the dynamic signal PWMO as the backlight modulation signal PWM according to an active state of the switching control signal SWc.
Referring to fig. 2, fig. 2 shows a timing diagram of an original signal and a dynamic signal. Fig. 2 is waveform diagrams of the original signal PWMI and the dynamic signal PWMO from top to bottom, respectively, where the duty ratio of the original signal PWMI is the same in each period, and the duty ratio of the dynamic signal PWMO decreases with the increase of the period. It should be appreciated that the duty cycle of the dynamic signal PWMO may increase with increasing period. Likewise, the frequency of the dynamic signal PWMO may also vary with increasing period.
When the timing control unit 122 receives the switching control signal SWc of the high level, the original signal PWMI is output as the backlight modulation signal PWM. The original signal PWMI is a pulse width modulation signal with a fixed frequency or duty ratio.
When the timing control unit 122 receives the low-level switching control signal SWc, the timing control unit 122 reads the lookup table in the storage unit 124, generates the dynamic signal PWMO according to the setting parameters pre-stored in the lookup table, and outputs the dynamic signal PWMO as the backlight modulation signal PWM.
The lookup table in the storage unit 124 is used to indicate the parameters related to the pwm signals corresponding to different gray scales when the refresh rate is different.
Optionally, the storage unit 124 is selected from any one of a programmable rom, an eeprom, and a charged eeprom.
Table 1 shows the brightness and the difference between the brightness for different refresh rates at different gray scales, taking the refresh rates of 60Hz and 48Hz as examples. Under the same gray scale, according to the brightness and the difference value corresponding to different refresh rates, the duty ratio or frequency of a plurality of pulse width modulation signals which are gradually changed and are required for making the brightness of the display panel 110 smoothly transited when the refresh rate changes can be obtained, and the lookup table can be obtained through a plurality of experiments and tests.
TABLE 1
The dynamic signal PWMO is a pwm signal with a variable duty ratio, and in a possible embodiment, the dynamic signal PWMO is a pwm signal with a duty ratio gradually changing to a predetermined value.
The backlight driving unit 121 is connected to the timing control unit 122, and receives the backlight modulation signal PWM to generate a backlight driving signal driver to drive the backlight circuit 150. In one possible embodiment, the backlight driving unit 121 provides a corresponding current, i.e. the backlight driving signal driver, to the backlight circuit 150 according to the backlight modulation signal PWM to adjust the brightness of the backlight circuit 150.
Illustratively, the timing control unit 122 also performs format conversion on the input image signal according to the specification of a predetermined display panel, and supplies various timing signals and gray-scale driving signals to the gate driving circuit 140 and the source driving circuit 130. For example, the timing control unit 122 converts an input image signal (the input image signal includes three types of signals, i.e., RGB data signal, clock signal, and control signal) from an external circuit into an LVDS signal capable of driving the liquid crystal panel after logic processing, and then directly sends the LVDS signal to the gate driving circuit and the source driving circuit at the liquid crystal panel end.
When the display device 100 according to the embodiment of the present invention does not switch the refresh rate, the first refresh rate switching signal SW1 does not generate level inversion, the switching control signal SWc is in a high level state, the timing control unit 122 outputs the original signal PWMI as the backlight modulation signal PWM, and the display panel 110 does not flicker due to the refresh rate switching.
When the display device 100 according to the embodiment of the present invention switches the refresh rate, the switching control unit 123 generates the low-level switching control signal SWc according to the first refresh rate switching signal SW1, the timing control unit 122 detects that the switching control signal SWc is in an active state, reads the lookup table from the storage unit 123, and generates the pulse width modulation signal, i.e., the dynamic signal PWMO, with a frequency or duty ratio varying according to different frames and the setting parameters pre-stored in the lookup table. Preferably, the dynamic signal PWMO is a pulse width modulation signal with a frequency or duty ratio gradually changing to a preset value, and the backlight driving unit 121 generates a backlight driving signal according to the dynamic signal PWMO to drive the backlight circuit 150, so that the screen brightness of the display device 100 smoothly transitions, and human eyes cannot perceive the flicker of the display panel 110.
When the display device 100 according to the embodiment of the present invention switches the screen refresh rate, the timing control unit 122 generates a pulse width modulation signal, that is, a dynamic signal PWMO, whose frequency or duty ratio gradually changes to a preset value by reading the lookup table, and outputs the dynamic signal PWMO as a backlight modulation signal PWM, and the backlight driving unit 121 generates a backlight driving signal driver according to the backlight modulation signal PWM, and drives the backlight circuit 150 to implement smooth transition of luminance, so as to effectively solve the problem of screen flicker when switching the refresh rate in the prior art.
Fig. 3 shows a circuit configuration diagram of the switching control unit in fig. 1. The switching control unit 123 includes first to third resistors R1 to R3, a first comparator 1231, a second comparator 1232, a delay network 1233, and a voltage divider network 1234.
The voltage divider network 1234 receives the operating voltage VDD, and generates a first reference voltage Vref1 and a second reference voltage Vref2 according to the operating voltage VDD, wherein the first reference voltage Vref1 is greater than the second reference voltage Vref 2.
The voltage divider network 1234 includes a fourth resistor R4, a fifth resistor R5, and a sixth resistor R6 connected in series between the operating voltage VDD and ground in that order. The first reference voltage Vref1 is output from the node between the fourth resistor R4 and the fifth resistor R5, and the second reference voltage Vref2 is output from the node between the fifth resistor R5 and the sixth resistor R6.
The delay network 1233 receives the first refresh rate switching signal SW1 and generates the second refresh rate switching signal SW2 according to the first refresh rate switching signal SW 1.
In the embodiment of the present invention, the delay network 1233 is, for example, an RC delay network, the seventh resistor R7 and the first capacitor C1 are connected in series between the input terminal of the first refresh rate switching signal SW1 and the ground, and the intermediate node between the seventh resistor R7 and the first capacitor C1 outputs the second refresh rate switching signal SW 2. It should be appreciated that delay network 1233 may be selected from any suitable delay circuit, including an RC delay circuit, a monostable delay circuit composed of a single operational amplifier, a time base delay circuit, and the like.
The non-inverting input terminal of the first comparator 1231 receives the second refresh rate switching signal SW2, the inverting input terminal receives the first reference voltage Vref1, and the output terminal is connected to the output terminal of the switching control signal SWc through the third resistor R3.
The non-inverting input terminal of the second comparator 1232 receives the second reference voltage Vref2, the inverting input terminal receives the second refresh rate switching signal SW2, and the output terminal is connected to the output terminal of the switching control signal SWc through the first resistor R1.
The first comparator 1231 and the second comparator 1232 are powered by a single power supply, for example, and the power supply voltage is the operating voltage VDD.
In a possible embodiment, the output terminal of the switching control signal SWc is also connected to ground through a pull-down resistor R2 to ensure the stability of the switching control signal SWc.
Fig. 4 shows a timing diagram of the switching control unit in fig. 3. Fig. 4 is a waveform diagram of the first refresh rate switching signal SW1, the second refresh rate switching signal SW2 and the switching control signal SWc from top to bottom, respectively, and the switching control unit will be further described with reference to fig. 3.
At time t0, the switch control signal SWc is high, the first refresh rate switch SW1 is inverted from low to high, the first capacitor C1 in the delay network 1233 is charged, and the level of the second refresh rate switch SW2 rises with a first predetermined slope.
At time t1, the level of the second refresh rate switching signal SW2 rises to the second reference voltage Vref2, and for the first comparator 1231, the level of the second refresh rate switching signal SW2 received by the non-inverting input terminal is less than the level of the first reference voltage Vref1 received by the inverting input terminal, and the first comparator 1231 still outputs a low level; for the second comparator 1232, the level of the second reference voltage Vref2 received by the non-inverting input terminal thereof is less than the level of the second refresh rate switching signal SW2 received by the inverting input terminal thereof, the output terminal of the second comparator 1232 outputs a low level, and the switching control signal SWc is inverted from a high level to a low level.
At time t2, the level of the second refresh rate switching signal SW2 is equal to the level of the first refresh rate switching signal SW1, the level of the second refresh rate switching signal SW2 received by the non-inverting input terminal of the first comparator 1231 is equal to or higher than the first reference voltage Vref1, the second comparator 1231 outputs a high level, and the switching control signal SWc is inverted from a low level to a high level.
At time t3, the first refresh rate switching signal SW1 transitions from high to low, the first capacitor C1 discharges, and the level of the second refresh rate switching signal SW2 decreases with a second predetermined slope. For the first comparator 1231, the level of the second refresh rate switching signal SW2 received by the non-inverting input terminal is less than the first reference voltage Vref1, the second comparator 1231 outputs a low level, and the switching control signal SWc is inverted from a high level to a low level.
At time t4, the level of the second refresh rate switching signal SW2 drops to the second reference voltage Vref2, the level of the second reference voltage Vref2 received by the non-inverting input terminal of the second comparator 1232 is greater than the level of the second refresh rate switching signal SW2 received by the inverting input terminal, the output terminal of the second comparator 1232 outputs a high level, and the switching control signal SWc is inverted from the low level to the high level.
When the display device 100 according to the embodiment of the present invention switches the refresh rate, the level of the first refresh rate switching signal SW1 is inverted, the switching control signal SWc maintains a low level state for a predetermined time, and the timing control unit 122 outputs the dynamic signal PWMO, which is the pulse width modulation signal whose frequency or duty ratio gradually changes to a preset value, as the backlight modulation signal PWM when the switching control signal SWc is in an active state. Within a preset time, the frequency or duty ratio of the dynamic signal PWMO is gradually changed, so that the brightness of the backlight circuit 150 driven by the backlight driving signal driver is gradually changed, thereby realizing smooth transition of the brightness of the backlight circuit 150; after a predetermined period of time, the switching control signal SWc is inverted from the low level to the high level, and the timing control unit 122 outputs the original signal PWMI as the backlight modulation signal PWM, so that the display apparatus 100 operates in the normal mode.
Optionally, the predetermined time period may be changed by adjusting the value of the seventh resistor R7 or the first capacitor C1, so that the display device 100 according to the embodiment of the present invention can adapt to switching between different frequencies, and the application range is wider.
In summary, when the backlight control circuit of the display device and the display device provided by the utility model switch the screen refresh rate, the timing control unit generates a pulse width modulation signal, i.e. a dynamic signal, with a frequency or duty ratio gradually changing to a preset value by reading the lookup table, and outputs the dynamic signal as the backlight modulation signal, the backlight driving unit generates the backlight driving signal according to the backlight modulation signal, and drives the backlight circuit to realize smooth transition of the brightness of the backlight driving signal, so that the problem of screen flicker when the refresh rate is switched in the prior art is effectively solved.
Optionally, when the display device according to the embodiment of the present invention switches the refresh rate, the level of the first refresh rate switching signal is inverted, the switching control signal maintains a low level state for a predetermined time, and the timing control unit gradually changes the frequency or the duty ratio to a pulse width modulation signal of a preset value, that is, a dynamic signal, when the switching control signal is in an effective state, and outputs the dynamic signal as the backlight modulation signal. Within a preset time, the frequency or the duty ratio of the dynamic signal is gradually changed, so that the brightness of the backlight circuit driven by the backlight driving signal is gradually changed, and the smooth transition of the brightness of the backlight circuit is realized; after a preset time, the switching control signal is turned from a low level to a high level, and the time sequence control unit outputs the original signal as a backlight modulation signal, so that the display device works in a common mode.
Optionally, the predetermined time period may be changed by adjusting the value of the seventh resistor or the first capacitor, so that the display device according to the embodiment of the present invention may adapt to switching between different frequencies, and the application range is wider.
It should be noted that as used herein, the words "during", "when" and "when … …" in relation to the operation of a circuit are not strict terms indicating an action that occurs immediately upon the start of a startup action, but rather there may be some small but reasonable delay or delays, such as various transmission delays, between it and the reaction action (action) initiated by the startup action. The words "about" or "substantially" are used herein to mean that the value of an element (element) has a parameter that is expected to be close to the stated value or position. However, as is well known in the art, there is always a slight deviation that makes it difficult for the value or position to be exactly the stated value. It has been well established in the art that a deviation of at least ten percent (10%) for a semiconductor doping concentration of at least twenty percent (20%) is a reasonable deviation from the exact ideal target described. When used in conjunction with a signal state, the actual voltage value or logic state (e.g., "1" or "0") of the signal depends on whether positive or negative logic is used.
In accordance with the present invention, as described above, these embodiments do not set forth all of the details or limit the utility model to only the specific embodiments described. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the utility model and the practical application, to thereby enable others skilled in the art to best utilize the utility model and various embodiments with various modifications as are suited to the particular use contemplated. The scope of the utility model should be determined with reference to the appended claims and their equivalents.
Claims (10)
1. A backlight control circuit of a display device, the display device including a display panel and a backlight circuit that provides backlight to the display panel, the backlight control circuit comprising:
the switching control unit receives a first refresh rate switching signal and generates a switching control signal according to the first refresh rate switching signal;
the time sequence control unit is connected with the switching control unit, receives the switching control signal and outputs one of an original signal and a dynamic signal as a backlight modulation signal according to the effective state of the switching control signal;
the backlight driving unit receives the backlight modulation signal and generates a backlight driving signal according to the backlight modulation signal to drive the backlight circuit so as to enable the brightness of the backlight circuit to be in smooth transition when the refresh rate is switched; wherein the content of the first and second substances,
the dynamic signal is a pulse width modulation signal with a variable duty ratio.
2. The backlight control circuit of claim 1, wherein the timing control unit is configured to:
when receiving a switching control signal in a first state, outputting the original signal as a backlight modulation signal;
when receiving a switching control signal in a second state, reading a set parameter of a pulse width modulation signal in a lookup table, generating a dynamic signal, and outputting the dynamic signal as a backlight modulation signal; wherein
The dynamic signal is a pulse width modulation signal with the duty ratio gradually changing to a preset value.
3. The backlight control circuit according to claim 1, wherein the switching control unit comprises:
the time delay network receives the first refresh rate switching signal and generates a second refresh rate switching signal according to the first refresh rate switching signal;
the voltage divider network receives a working voltage and generates a first reference voltage and a second reference voltage according to the working voltage, wherein the first reference voltage is greater than the second reference voltage;
a non-inverting input terminal of the first comparator receives the second refresh rate switching signal, an inverting input terminal of the first comparator receives the first reference voltage, and an output terminal of the first comparator is connected to an output terminal of the switching control signal through a third resistor;
a non-inverting input terminal of the second comparator receives the second reference voltage, an inverting input terminal of the second comparator receives the second refresh rate switching signal, and an output terminal of the second comparator is connected to an output terminal of the switching control signal through a first resistor;
a second resistor connected between an output terminal of the switching control signal and ground; wherein the content of the first and second substances,
the delay network is configured to generate a second refresh rate switching signal that rises at a first predetermined slope or falls at a second predetermined slope when the first refresh rate switching signal level flips.
4. The backlight control circuit of claim 3, wherein the delay network comprises:
a seventh resistor and a first capacitor connected in series between the input terminal of the first refresh rate switching signal and ground, an intermediate node of the seventh resistor and the first capacitor outputting a second refresh rate switching signal.
5. The backlight control circuit of claim 3, wherein the voltage divider network comprises:
the fourth resistor, the fifth resistor and the sixth resistor are sequentially connected between the working voltage and the ground in series;
an intermediate node of the fourth resistor and the fifth resistor outputs the first reference voltage, and an intermediate node of the fifth resistor and the sixth resistor outputs the second reference voltage.
6. The backlight control circuit of claim 2, further comprising: a storage unit for storing the lookup table.
7. The backlight control circuit of claim 6, wherein the look-up table stored in the storage unit is used to indicate parameters related to pulse width modulation signals corresponding to different gray scales when the refresh rate is different.
8. The backlight control circuit of claim 6, wherein the memory unit is selected from any one of a programmable read only memory, an erasable programmable read only memory and a charged erasable programmable read only memory.
9. A display device, comprising: a display panel, a backlight circuit for providing backlight to the display panel and a backlight control circuit as claimed in any one of claims 1 to 8.
10. The display device according to claim 9, further comprising: the display device comprises a grid driving circuit used for providing grid voltage for the display panel, and a source driving circuit used for providing gray scale data for the display panel; wherein the content of the first and second substances,
the time sequence control unit is used for controlling the grid driving circuit and the source driving circuit.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202122197908.4U CN215933169U (en) | 2021-09-10 | 2021-09-10 | Backlight control circuit of display device and display device |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202122197908.4U CN215933169U (en) | 2021-09-10 | 2021-09-10 | Backlight control circuit of display device and display device |
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| CN215933169U true CN215933169U (en) | 2022-03-01 |
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