CN215813177U - Convenient and adjustable transistor HTRB and HTGB test device - Google Patents

Convenient and adjustable transistor HTRB and HTGB test device Download PDF

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Publication number
CN215813177U
CN215813177U CN202122381094.XU CN202122381094U CN215813177U CN 215813177 U CN215813177 U CN 215813177U CN 202122381094 U CN202122381094 U CN 202122381094U CN 215813177 U CN215813177 U CN 215813177U
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China
Prior art keywords
mounting
transistor
htrb
power supply
htgb
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CN202122381094.XU
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Chinese (zh)
Inventor
谢思朝
蔡正兵
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Hangzhou Taiding Sanjie Testing Technology Co ltd
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Hangzhou Taiding Sanjie Testing Technology Co ltd
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Abstract

A convenient and adjustable transistor HTRB and HTGB test device comprises a mounting plate, wherein a plurality of test areas are arranged on the mounting plate; each test area is internally provided with a mounting seat for mounting a transistor, and three groups of insertion pieces for connecting pins of the transistor are arranged in the mounting seat; a pin group is arranged beside the mounting seat and comprises three pins which are respectively connected with the inserting pieces in a one-to-one corresponding manner; a first wiring terminal group for providing a high level and a second wiring terminal group for providing a low level are arranged beside the pin group. The utility model can simultaneously carry out HTRB and HTGB tests, and even if a certain sample is burnt out in the test process, other samples cannot be influenced.

Description

Convenient and adjustable transistor HTRB and HTGB test device
Technical Field
The utility model relates to a transistor test tool, in particular to a conveniently adjustable transistor HTRB and HTGB test device.
Background
In the prior art, when the transistor is used for HTRB and HTGB tests, the limit is limited by the packaging size of a sample and the type of the test, different test boards are needed during the HTRB and HTGB tests, if the sample is burnt out in the test process, the test boards are damaged and stopped, and the test boards are troublesome to maintain and maintain after the tests.
SUMMERY OF THE UTILITY MODEL
The utility model aims to provide a convenient and adjustable transistor HTRB and HTGB test device, which can simultaneously carry out HTRB and HTGB tests, and can not influence other samples even if a certain sample is burnt in the test process.
In order to achieve the purpose, the utility model provides the following technical scheme:
a convenient and adjustable transistor HTRB and HTGB test device comprises a mounting plate, wherein a plurality of test areas are arranged on the mounting plate; each test area is internally provided with a mounting seat for mounting a transistor, and three groups of insertion pieces for connecting pins of the transistor are arranged in the mounting seat; a pin group is arranged beside the mounting seat and comprises three pins which are respectively connected with the inserting pieces in a one-to-one corresponding manner; a first wiring terminal group for providing a high level and a second wiring terminal group for providing a low level are arranged beside the pin group.
Further, be provided with power supply on the mounting panel, power supply includes the positive and power negative pole of power, first binding post group and the anodal electric connection of power, second binding post and power negative pole electric connection.
Further, a current limiting resistor and a fuse are connected in series between the first wiring terminal group and the positive electrode of the power supply.
Furthermore, the mounting base upper surface is seted up three mounting grooves that are used for installing the inserted sheet, and each group inserted sheet includes the metal conducting strip that two clearances set up.
Furthermore, a plurality of mounting holes are formed in the periphery of the mounting plate; a connecting piece is arranged between two adjacent mounting plates, a threaded section is arranged at the first end of the connecting piece, and a threaded hole is arranged at the second end of the connecting piece; the thread section penetrates through the mounting hole of the mounting plate and is in threaded fit with the threaded hole of the other connecting piece.
Further, the length of the threaded section is larger than the depth of the mounting hole and smaller than the sum of the depths of the mounting hole and the threaded hole.
Compared with the prior art, the utility model has the beneficial effects that: the utility model can connect different levels through three pins to respectively carry out HTRB and HTGB tests; if the source and the gate of the transistor are required to be connected with a low level and the drain is required to be connected with a high level during the HTRB test, the pins of the corresponding source and the corresponding gate beside the mounting seat are communicated with the second wiring terminal group only through the conducting wire, and the pins of the corresponding drain are communicated with the first wiring terminal group; similarly, when the HTGB test is performed, the pins corresponding to the source and the drain need to be connected to the second terminal group, and the pins corresponding to the gate need to be connected to the first terminal group. The scheme of the utility model can realize different types of transistor tests in the same mounting plate, and meanwhile, the utility model is divided into a plurality of test areas, so that even if a certain sample is burnt, other samples cannot be influenced.
Drawings
Fig. 1 is a schematic overall structure diagram of an embodiment of the present invention.
FIG. 2 is a schematic structural diagram of a single test area according to an embodiment of the present invention.
FIG. 3 is a diagram of wire connections during HTRB testing of the present invention.
Fig. 4 is a diagram of the wire connections during HTGB testing of the present invention.
Fig. 5 is a schematic structural diagram of a mounting base according to an embodiment of the utility model.
FIG. 6 is a cross-sectional view of a mounting base according to an embodiment of the utility model.
FIG. 7 is a schematic view of stacking mounting plates according to an embodiment of the utility model.
In the figure: 1. mounting a plate; 11. a test zone; 12. mounting holes;
2. a mounting seat; 21. inserting sheets; 22. mounting grooves;
3. a lead group;
41. a first wiring terminal group; 42. a second wiring terminal group;
5. a power supply;
6. a connecting member; 61. a threaded segment; 62. a threaded bore.
Detailed Description
The technical solutions in the embodiments of the present invention are clearly and completely described below, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, the present embodiment provides a conveniently adjustable transistor HTRB and HTGB test apparatus, which includes a mounting plate 1, and a plurality of test areas 11 arranged in an array are disposed on the mounting plate 1. Each test zone 11 is provided with an independent test unit, specifically:
referring to fig. 2, a mounting base 2 for mounting a transistor is arranged in each test area 11, and three groups of insertion pieces 21 for connecting with pins of the transistor are arranged in the mounting base 2; the side of mount pad 2 sets up pin group 3, pin group 3 including respectively with three pin1, pin2, pin3 that inserted sheet 21 one-to-one is connected. In this embodiment, the number of the lead groups 3 is two, and the two lead groups are respectively disposed on the left and right sides of the mounting base 2.
The side of the pin group 3 is provided with a first connection terminal group 41 for providing a high level and a second connection terminal group 42 for providing a low level, and the connection terminals are electrically connected with the pin group 3 to provide a high level and a low level for three pins of the transistor to be detected.
Referring to fig. 1, in the present embodiment, a power supply 5 for supplying power to all the test units is disposed on the mounting board 1. The power supply 5 comprises a power supply anode V + and a power supply cathode V-; taking one of the test units as an example, the first connection terminal set 41 is electrically connected to the positive power supply V +, and the second connection terminal 42 is electrically connected to the negative power supply V-.
Meanwhile, in order to avoid damage when the first connection terminal group 41 is connected to a high level, the current is limited in this embodiment, specifically, as shown in fig. 2, a current-limiting resistor R1 and a fuse FU1 are connected in series between the first connection terminal group 31 and the positive electrode of the power supply, the resistance of the current-limiting resistor R1 is 10k Ω, so as to prevent the current from being too large, and the fuse FU1 fuses when the current of the circuit is too large in a special situation, so as to protect other electronic components in the circuit.
As shown in fig. 3, when the HTRB test is performed, if the source and the gate of the transistor need to be connected to the low level and the drain needs to be connected to the high level, the pins corresponding to the source and the gate near the mounting base need to be connected to the second terminal group through the wires, and the pin corresponding to the drain needs to be connected to the first terminal group. Similarly, as shown in fig. 4, when the HTGB test is performed, the leads corresponding to the source and the drain need to be connected to the second terminal group, and the lead corresponding to the gate needs to be connected to the first terminal group. It should be noted that, in the mounting seat shown in fig. 3 and 4, the insertion pieces from top to bottom respectively correspond to the gate, the drain and the source of the transistor.
Referring to fig. 5 and 6, three mounting grooves 22 for mounting the inserting pieces 21 are formed in the upper surface of the mounting base 2, each group of inserting pieces 21 includes two metal conducting pieces arranged in a gap, and when a transistor is mounted, only three pins of the transistor need to be inserted into the gaps between the metal conducting pieces respectively.
In order to stack a plurality of mounting plates more reasonably and save space, please refer to fig. 1 and 6, the periphery of the mounting plate 1 is provided with 4 mounting holes 12. A connecting piece 6 is arranged between two adjacent mounting plates 1, a threaded section 61 is arranged at the first end of the connecting piece 6, and a threaded hole 62 is arranged at the second end; the threaded section 61 penetrates through the mounting hole 12 of the mounting plate 1 and is in threaded fit with the threaded hole 62 of the other connecting piece 6, and the mounting plates can be stacked up and down. It is worth mentioning that the length of the threaded section is greater than the depth of the mounting hole and less than the sum of the depths of the mounting hole and the threaded hole.
It will be evident to those skilled in the art that the utility model is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the utility model being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.

Claims (6)

1. A convenient and adjustable transistor HTRB and HTGB test device is characterized by comprising a mounting plate, wherein a plurality of test areas are arranged on the mounting plate; each test area is internally provided with a mounting seat for mounting a transistor, and three groups of insertion pieces for connecting pins of the transistor are arranged in the mounting seat; a pin group is arranged beside the mounting seat and comprises three pins which are respectively connected with the inserting pieces in a one-to-one corresponding manner; a first wiring terminal group for providing a high level and a second wiring terminal group for providing a low level are arranged beside the pin group.
2. The convenient and adjustable transistor HTRB and HTGB test device according to claim 1, wherein a power supply is disposed on said mounting plate, said power supply comprises a positive power supply and a negative power supply, said first terminal set is electrically connected to said positive power supply, and said second terminal set is electrically connected to said negative power supply.
3. The conveniently adjustable transistor HTRB and HTGB test apparatus of claim 2, wherein a current limiting resistor and a fuse are connected in series between said first set of connection terminals and the positive power supply.
4. The convenient and adjustable transistor HTRB and HTGB testing device according to claim 1, wherein the upper surface of said mounting seat is provided with three mounting grooves for mounting inserts, each set of inserts comprises two metal conducting strips arranged at intervals.
5. The convenient adjustable transistor HTRB and HTGB test device according to claim 1, wherein a plurality of mounting holes are formed around said mounting plate; a connecting piece is arranged between two adjacent mounting plates, a threaded section is arranged at the first end of the connecting piece, and a threaded hole is arranged at the second end of the connecting piece; the thread section penetrates through the mounting hole of the mounting plate and is in threaded fit with the threaded hole of the other connecting piece.
6. A conveniently tunable transistor HTRB and HTGB test apparatus according to claim 5, wherein said threaded section has a length greater than the depth of the mounting hole and less than the sum of the depths of the mounting hole and the threaded hole.
CN202122381094.XU 2021-09-29 2021-09-29 Convenient and adjustable transistor HTRB and HTGB test device Active CN215813177U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202122381094.XU CN215813177U (en) 2021-09-29 2021-09-29 Convenient and adjustable transistor HTRB and HTGB test device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202122381094.XU CN215813177U (en) 2021-09-29 2021-09-29 Convenient and adjustable transistor HTRB and HTGB test device

Publications (1)

Publication Number Publication Date
CN215813177U true CN215813177U (en) 2022-02-11

Family

ID=80167900

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202122381094.XU Active CN215813177U (en) 2021-09-29 2021-09-29 Convenient and adjustable transistor HTRB and HTGB test device

Country Status (1)

Country Link
CN (1) CN215813177U (en)

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