CN215728679U - Battery voltage detection circuit - Google Patents
Battery voltage detection circuit Download PDFInfo
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- CN215728679U CN215728679U CN202121903252.7U CN202121903252U CN215728679U CN 215728679 U CN215728679 U CN 215728679U CN 202121903252 U CN202121903252 U CN 202121903252U CN 215728679 U CN215728679 U CN 215728679U
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Abstract
The utility model relates to the technical field of voltage detection, and discloses a battery voltage detection circuit which comprises a reference voltage, a first capacitor voltage division circuit, a second capacitor voltage division circuit, a voltage clamping circuit and a comparator, wherein the reference voltage is input to the comparator through the first capacitor voltage division circuit, the voltage clamping circuit clamps the voltage at the input end of the second capacitor voltage division circuit to the voltage of a single battery, the voltage of the single battery is input to the comparator through the second capacitor voltage division circuit, the comparison between the voltage of the single battery and the reference voltage can be realized through the capacitor voltage division circuit in actual use, the detection precision is improved, and the cost of a chip adopting the utility model is reduced because a detection resistor and a related fuse structure are not required to be arranged.
Description
Technical Field
The utility model relates to the technical field of voltage detection, in particular to a battery voltage detection circuit.
Background
The battery is an independent power supply, can store electric energy firstly, and then can supply power to a load independently without depending on a power grid, and is widely applied to daily life of people, and vehicles such as two-wheel electric vehicles and new energy vehicles are driven by the electric energy released by the battery.
During the use process of the battery, the monitoring protection of the battery is crucial to the safe use of the battery. The battery voltage can be prevented from being in an overcharged state when the battery is charged and being in an overdischarged state when the battery is discharged by knowing the voltage of the battery in time, and the battery can be disconnected from a load in time when the voltage of the battery is abnormal. Most of the existing battery voltage detection is carried out through a resistance voltage division mode, more resistors are needed to be used for detecting the voltage of each battery in a plurality of series-connected batteries by adopting the resistance voltage division mode, and when the high-precision voltage detection of a product is promoted, a multi-section fuse structure also needs to be added, so that the cost of a chip of a voltage detection circuit adopting a voltage division resistance type is increased.
SUMMERY OF THE UTILITY MODEL
In view of the shortcomings of the background art, the utility model provides a battery voltage detection circuit, and the technical problem to be solved is the problem of high cost of a chip of a voltage division resistance type voltage detection circuit.
In order to solve the technical problems, the utility model provides the following technical scheme: a battery voltage detection circuit comprises a reference voltage, a first capacitor voltage division circuit, a second capacitor voltage division circuit, a voltage clamping circuit and a comparator, wherein the reference voltage is input to a first input end of the comparator through the first capacitor voltage division circuit; one electrode of a single battery in the plurality of series-connected batteries is electrically connected with the first capacitor voltage-dividing circuit, the other electrode of the single battery in the plurality of series-connected batteries is electrically connected with the second capacitor voltage-dividing circuit, the voltage clamping circuit clamps the voltage at the input end of the second capacitor voltage-dividing circuit to the voltage of the single battery, and the voltage of the single battery is input to the second input end of the comparator through the second capacitor voltage-dividing circuit.
In one embodiment, the switching circuit further comprises a first switching circuit and a second switching circuit, wherein the first switching circuit comprises a plurality of switching channels, and the second switching circuit comprises a plurality of switching channels; one electrode of a single battery in the plurality of series-connected batteries is electrically connected with the first capacitor voltage division circuit through a single switching channel in the first switching switch circuit, and the other electrode of the single battery in the plurality of series-connected batteries is electrically connected with the second capacitor voltage division circuit through a single switching channel in the second switching switch circuit.
In one embodiment, when one of the switching channels of the first switch circuit is turned on, the remaining switching channels are turned off, and when one of the switching channels of the second switch circuit is turned on, the remaining switching channels are turned off.
In one embodiment, the voltage clamp circuit includes a capacitor V _ CAP, a switch S3, a switch S10, a switch S11, and a switch S12, two ends of the capacitor V _ CAP are electrically connected to an input terminal of the first capacitor voltage divider circuit and an input terminal of the second capacitor voltage divider circuit, two ends of the switch S3 are electrically connected to an input terminal of the first capacitor voltage divider circuit and an input terminal of the second capacitor voltage divider circuit, a first input terminal of the comparator is grounded through a switch S10, a second input terminal of the comparator is grounded through a switch S11, one end of the switch S12 is electrically connected to a terminal of a voltage dividing capacitor at a terminal of the first capacitor voltage divider circuit and a terminal of a voltage dividing capacitor at a terminal of the second capacitor voltage divider circuit, and the switch 10, the switch S11, and the switch S12 are simultaneously closed or simultaneously opened.
In one embodiment, the first capacitance voltage division circuit comprises a capacitor C11, a capacitor C12 and a switch S40 which are sequentially connected in series, a connection point of the capacitor C12 and the capacitor C11 is electrically connected with the first input end of the comparator, and a connection point of the capacitor C12 and the switch S40 is electrically connected with one end of the switch S12; the reference voltage is input to the input terminal of the switch S40; the second capacitance voltage division circuit comprises a capacitor C21, a capacitor C22 and a switch S41 which are sequentially connected in series, one end, which is not electrically connected with the capacitor C22, of the switch S41 is grounded, one end, which is electrically connected with the capacitor C21 and the capacitor C22, of the switch S41 is electrically connected with the second input end of the comparator, the connection point of the capacitor C22 and the switch S41 is electrically connected with one end of the switch S12, and the switch S40 and the switch S41 are simultaneously closed or simultaneously opened.
In one embodiment, one electrode of each of the plurality of series-connected batteries is connected to one switching channel of a first switching circuit, the other electrode of each of the plurality of series-connected batteries is connected to one switching channel of a second switching circuit, one switching channel of the first switching circuit is electrically connected to only one electrode of one battery, and one switching channel of the second switching circuit is electrically connected to only one electrode of one battery.
In one embodiment, the first switching timing signal is input to the first switching circuit, and the second switching timing signal is input to the second switching circuit, so that the battery voltage detection circuit performs voltage detection on the single battery with the lowest battery positive voltage first during voltage detection, and then sequentially detects the voltages at the two ends of each battery according to the increasing order of the battery positive voltage.
In one embodiment, when detecting the voltage of the first battery, the fifth timing signal in the first state is input to the switch S10 and the switch S11 to close the switch S10 and the switch S11, the first switching timing signal is input to the first switching circuit to allow the positive electrode of the first battery to be connected to the first capacitor voltage-dividing circuit, the second switching timing signal is input to the second switching circuit to allow the negative electrode of the first battery to be connected to the second capacitor voltage-dividing circuit, so as to charge the capacitor V _ CAP and the capacitor C11, the second switching timing signal is input to the second switching circuit after the charging to disconnect the connection between the negative electrode of the first battery and the second capacitor voltage-dividing circuit, the fifth timing signal in the second state is input to the switch S10 and the switch S11 to open the switch S10 and the switch S11, and the fourth timing signal in the first state is input to the switch S40 and the switch S41 to close the switch S40 and the switch S41, Inputting the third timing signal of the first state to the switch S3 to close the switch S3;
when detecting the voltage of the battery detected by the second section, inputting a fourth timing signal of the second state to the switch S40 and the switch S41 to open the switch S40 and the switch S41, inputting a fifth timing signal of the first state to the switch S10 and the switch S11 to close the switch S10 and the switch S11, charging the capacitor C11 and the capacitor C21, after the charging is completed, inputting a fifth timing signal of the second state to the switch S10 and the switch S11 to open the switch S10 and the switch S11, inputting a third timing signal of the second state to the switch S3 to open the switch S3, then inputting a second switching timing signal to the second switching switch circuit to connect the positive electrode of the battery detected by the second section to the second capacitor voltage dividing circuit, and then inputting a fourth timing signal of the first state to the switch S40 and the switch S41 to close the switch S40 and the switch S41;
when the voltage of the battery detected by the third section is detected, a first switching time sequence signal is input to the first switching switch circuit to enable the anode of the battery detected by the third section to be connected into the first capacitor voltage division circuit, then, the fourth timing signal of the second state is input to the switch S40 and the switch S41 to turn off the switch S40 and the switch S41, the fifth timing signal of the first state is input to the switch S10 and the switch S11 to turn on the switch S10 and the switch S11, the capacitor C11 is charged, after the charging is completed, inputting the fifth timing signal of the second state to the switch S10 and the switch S11 turns off the switch S10 and the switch S11, inputting a second switching timing signal to the second switching switch circuit to disconnect the negative electrode of the battery detected by the third section from the second capacitor voltage-dividing circuit, inputting a third timing signal in the first state to the switch S3 to close the switch S3, and inputting a fourth timing signal in the first state to the switch S40 and the switch S41 to close the switch S40 and the switch S41;
when the battery detected by the nth section is detected, N is an even number greater than 2, the fourth timing signal in the second state is input to the switch S40 and the switch S41 to turn off the switch S40 and the switch S41, the fifth timing signal in the first state is input to the switch S10 and the switch S11 to turn on the switch S10 and the switch S11, the capacitor C11 and the capacitor C21 are charged, after the charging is completed, the fifth timing signal in the second state is input to the switch S10 and the switch S11 to turn off the switch S10 and the switch S11, the third timing signal in the second state is input to the switch S3 to turn off the switch S3, then the second switching timing signal is input to the second switching switch circuit to connect the positive electrode of the battery detected by the nth section to the second capacitor voltage dividing circuit, and the fourth timing signal in the first state is input to the switch S40 and the switch S41 to turn on the switch S40 and the switch S41;
when the M section of the detected battery is detected, M is an odd number larger than 3, a first switching time sequence signal is input to a first switching switch circuit to enable the anode of the M section of the detected battery to be connected into a first capacitor voltage division circuit, then, the fourth timing signal of the second state is input to the switch S40 and the switch S41 to turn off the switch S40 and the switch S41, the fifth timing signal of the first state is input to the switch S10 and the switch S11 to turn on the switch S10 and the switch S11, the capacitor C11 is charged, after the charging is completed, inputting the fifth timing signal of the second state to the switch S10 and the switch S11 turns off the switch S10 and the switch S11, then, a second switching timing signal is input to the second switching switch circuit to disconnect the negative electrode of the M-th detected battery from the second capacitor voltage-dividing circuit, a third timing signal in the first state is input to the switch S3 to close the switch S3, and a fourth timing signal in the first state is input to the switches S40 and S41 to close the switches S40 and S41. In one embodiment, the digital sequential logic module is configured to generate a first switching timing signal, a second switching timing signal, a third timing signal, a fourth timing signal, and a fifth timing signal, wherein the first state is a high state and the second state is a low state.
In one embodiment, the reference voltage comprises an overdischarge reference voltage and an overcharge reference voltage, the reference voltage module generates the overdischarge reference voltage and the overcharge reference voltage, the overdischarge reference voltage and the overcharge reference voltage are input into the first capacitance voltage division circuit through the dual-channel switch S6, the overdischarge reference voltage is input into the comparator for a time a T/C in a period T in which the reference voltage is input into the comparator, the overcharge reference voltage is input into the comparator for a time B T/C, A, B and C are both positive numbers, and a + B is equal to C.
In one embodiment, the present invention further includes a detection module, wherein an output terminal of the comparator inputs a first detection signal to the detection module, an output terminal of the comparator inputs a second detection signal to the detection module through an inverter, the detection module outputs an overcharge protection signal when the first detection signal is in a first state, and the detection module outputs an overdischarge protection signal when the second detection signal is in the first state.
In one embodiment, the capacitor in the first capacitor voltage divider circuit and the capacitor in the second capacitor voltage divider circuit are MOM capacitor structures.
Compared with the prior art, the utility model has the beneficial effects that: the voltage of a single battery can be compared with the reference voltage through a capacitive voltage division circuit, the detection precision is improved, the cost of the chip adopting the utility model is reduced because a detection resistor and a related fuse structure are not needed to be arranged, in addition, the voltage at two ends of each battery is dynamically detected through a time sequence control mode instead of being electrified and detected to the resistor all the time, and the loss of the utility model in actual use is reduced.
Drawings
FIG. 1 is a diagram of a battery voltage detection circuit according to an embodiment;
FIG. 2 is a diagram of another embodiment of a battery voltage detection circuit in an embodiment;
FIG. 3 is a circuit diagram illustrating the connection of a first capacitor voltage divider circuit, a second capacitor voltage divider circuit, a voltage clamp circuit, a first switch circuit, a second switch circuit, and a comparator according to an embodiment;
FIG. 4 is a diagram illustrating an embodiment of a reference voltage generation module generating a reference voltage;
FIG. 5 is a schematic diagram of the connection between the comparator and the detection module in the embodiment;
FIG. 6 is a view showing a structure of charging five batteries connected in series as detected in the example;
FIG. 7 is a signal flow diagram illustrating the circuit of FIG. 3 when detecting the first battery;
FIG. 8 is a signal flow diagram illustrating the circuit of FIG. 3 when detecting the second battery;
FIG. 9 is a schematic diagram showing the signal flow when the circuit in FIG. 3 detects a third battery;
FIG. 10 is a signal flow diagram illustrating the circuit of FIG. 3 when detecting the fourth battery;
FIG. 11 is a signal flow diagram illustrating the circuit of FIG. 3 for detecting the fifth battery;
FIG. 12 is a timing diagram of all timing signals generated by the digital timing module.
Detailed Description
The present invention will now be described in further detail with reference to the accompanying drawings. These drawings are simplified schematic views illustrating only the basic structure of the present invention in a schematic manner, and thus show only the constitution related to the present invention.
As shown in fig. 1, a battery voltage detection circuit includes a reference voltage VREF, a first capacitor voltage-dividing circuit 1, a second capacitor voltage-dividing circuit 2, a voltage clamp circuit 3, and a comparator CMP, wherein the reference voltage VREF is input to a first input terminal V-of the comparator CMP through the first capacitor voltage-dividing circuit 1; one electrode of a single battery IN the plurality of series-connected batteries is electrically connected with the first capacitor voltage-dividing circuit 1, the other electrode of the single battery IN the plurality of series-connected batteries is electrically connected with the second capacitor voltage-dividing circuit 2, the voltage clamping circuit 3 clamps the voltage of the input end IN2 of the second capacitor voltage-dividing circuit 2 to the voltage of the single battery, and the voltage of the single battery is input to the second input end V + of the comparator CMP through the second capacitor voltage-dividing circuit 2.
IN actual use, the voltage of the input end IN2 of the second capacitor voltage division circuit 2 is clamped to the voltage of a single battery through the voltage clamping circuit 3, then the voltage of the single battery is input to the comparator CMP through the second capacitor voltage division circuit 2, and the comparator CMP compares the voltage obtained by dividing the voltage of the single battery through the second capacitor voltage division circuit 2 with the voltage obtained by dividing the reference voltage VREF through the first capacitor voltage division circuit 1, so as to judge whether the voltage of the single battery is too high or too low.
As shown in fig. 2, in addition to the embodiment of fig. 1, in this embodiment, the present invention further includes a first switch circuit 4 and a second switch circuit 5, where the first switch circuit 4 includes a plurality of switch channels, and the second switch circuit 5 includes a plurality of switch channels; one electrode of a single battery in the plurality of series-connected batteries is electrically connected with the first capacitance voltage division circuit 1 through a single switching channel in the first switching circuit 4, and the other electrode of the single battery in the plurality of series-connected batteries is electrically connected with the second capacitance voltage division circuit 2 through a single switching channel in the second switching circuit 5.
In actual use, two ends of a single battery can be respectively connected to the first capacitance voltage division circuit 1 and the second capacitance voltage division circuit through the first change-over switch circuit 4 and the second change-over switch circuit 5, and then the voltage of the single battery is detected and judged through the voltage clamping circuit 3, the first capacitance voltage division circuit 1, the second capacitance voltage division circuit 2 and the comparator CMP. In addition, in order to ensure that no other battery is connected to the first switch circuit 4 and the second switch circuit 6 when the current single battery is detected, when one switch channel in the first switch circuit 4 is turned on, the other switch channels are turned off, and when one switch channel in the second switch circuit 5 is turned on, the other switch channels are turned off.
As shown in fig. 3, the voltage clamp circuit includes a capacitor V _ CAP, a switch S3, a switch S10, a switch S11, and a switch S12, two ends of the capacitor V _ CAP are electrically connected to an input terminal of the first capacitor voltage divider circuit 1 and an input terminal of the second capacitor voltage divider circuit 2, two ends of the switch S3 are electrically connected to an input terminal of the first capacitor voltage divider circuit 1 and an input terminal of the second capacitor voltage divider circuit 2, respectively, a first input terminal V-of the comparator CMP is grounded through a switch S10, a second input terminal V + of the comparator CMP is grounded through a switch S11, one end of the switch S12 is electrically connected to a terminal of a voltage divider capacitor at a terminal in the first capacitor voltage divider circuit 1 and a terminal of a voltage divider capacitor at a terminal in the second capacitor voltage divider circuit 2, respectively, and the switch 10, the switch S11, and the switch S12 are simultaneously closed or simultaneously opened.
The first capacitance voltage division circuit 1 comprises a capacitor C11, a capacitor C12 and a switch S40 which are sequentially connected in series, wherein a connection point of the capacitor C12 and the capacitor C11 is electrically connected with a first input end V-of the comparator CMP, and a connection point of the capacitor C12 and the switch S40 is electrically connected with one end of the switch S12; the reference voltage VREF is input to the input terminal of the switch S40; the second capacitance voltage division circuit 2 comprises a capacitor C21, a capacitor C22 and a switch S41 which are sequentially connected in series, wherein one end of the switch S41, which is not electrically connected with the capacitor C22, is grounded, one end of the capacitor C21, which is electrically connected with the capacitor C22, is electrically connected with a second input end V + of the comparator CMP, a connection point of the capacitor C22 and the switch S41 is electrically connected with one end of the switch S12, and the switch S40 and the switch S41 are simultaneously closed or simultaneously opened.
In fig. 3, the first switch circuit 4 includes three switch channels, and the second switch circuit 5 includes three switch channels, so that the circuit in fig. 3 can detect the voltage of five batteries connected in series at most. In actual use, the number of the switching channels of the first switching switch circuit 4 and the second switching switch circuit 5 may be determined according to actual detection requirements, and is not limited herein, when voltage detection is performed on seven batteries connected in series, the first switching switch circuit 4 and the second switching switch circuit 5 each include four switching channels, and when voltage detection is performed on 9 batteries connected in series, the first switching switch circuit 4 and the second switching switch circuit 5 each include five switching channels. For the channels in the first changeover switch circuit 4 and the second changeover switch circuit 5, each channel may be a control switch composed of a single MOS transistor.
As shown in fig. 4, in actual use, the reference voltage includes an overdischarge reference voltage and an overcharge reference voltage, the reference voltage module may be used to generate an overdischarge reference voltage and an overcharge reference voltage, which are input to the first capacitive voltage dividing circuit 1 through the dual-channel switch S6, in the period T in which the reference voltage is input to the comparator CMP, the time at which the over-discharge reference voltage is input to the comparator CMP is a T/C, the time at which the over-charge reference voltage is input to the comparator CMP is B T/C, A, B and C are both positive numbers, and a + B is C, preferably, a and B are the same, that is, the over-discharge reference voltage and the over-charge reference voltage are input to the comparator CMP for half of the time in the period T in which the reference voltage VREF is input to the comparator CMP, the comparator CMP compares the voltage across the battery with the overdischarge reference voltage and the overcharge reference voltage in sequence at the time of voltage detection.
In practical use, the comparator CMP outputs a high-level detection signal only when the voltage of the second input terminal V + is greater than the voltage of the first input terminal V-, and the high-level detection signal can only detect one state, and cannot realize the overcharge detection or the overdischarge detection of the battery voltage. Therefore, in fig. 5, the output end of the comparator CMP is further connected with an inverter, when the over-discharge detection is performed, if the voltage of the second output end V + of the comparator CMP is smaller than the voltage of the first input end V-, the comparator CMP outputs a low-level detection signal, the low-level detection signal outputs a high-level signal after passing through the inverter, and the over-discharge detection can be realized according to the high-level signal; during the overcharge detection, if the voltage of the second output end V + of the comparator CMP is greater than the voltage of the first input end V-, the comparator CMP outputs a high-level detection signal, the inverter outputs a low-level detection signal, and the overcharge detection of the battery can be realized according to the high-level detection signal.
In addition, in fig. 5, the output end of the comparator CMP directly inputs the first detection signal to the detection module, the output end of the comparator CMP inputs the second detection signal to the detection module through the inverter, and the detection module outputs the overcharge protection signal to drive the peripheral overcharge protection circuit to operate when the first detection signal is in the first state, i.e., high level, and outputs the overdischarge protection signal to drive the peripheral overdischarge protection circuit to operate when the second detection signal is in the first state, i.e., high level.
During actual voltage detection, one electrode of each battery of the plurality of series-connected batteries is connected to one switching channel of the first switching circuit 4, the other electrode of each battery of the plurality of series-connected batteries is connected to one switching channel of the second switching circuit 5, one switching channel of the first switching circuit 4 is electrically connected with only one electrode of one battery, and one switching channel of the second switching circuit 5 is electrically connected with only one electrode of one battery.
During actual voltage detection, a first switching time sequence signal can be input into the first switching circuit 4, a second switching time sequence signal can be input into the second switching circuit 5, so that the switching channel in the first switching circuit 4 is selected to be conducted, the switching channel in the second switching circuit 5 is selected to be conducted, and further, when the battery voltage detection circuit detects the voltage, the single battery with the lowest battery anode voltage is detected, and then the voltages at two ends of each battery are detected sequentially according to the increasing sequence of the battery anode voltage.
Specifically, the work flow of the first voltage divider circuit 1, the second capacitance divider circuit and the voltage clamp circuit when performing voltage detection is as follows:
when detecting the voltage of the first battery, the fifth timing signal of the first state is input to the switch S10 and the switch S11 to close the switch S10 and the switch S11, the first switching timing signal is input to the first switching circuit 4 to switch the positive electrode of the first battery into the first capacitor voltage-dividing circuit 1, the second switching timing signal is input to the second switching circuit 5 to switch the negative electrode of the first battery into the second capacitor voltage-dividing circuit 2, so that the charging of the capacitor V _ CAP and the capacitor C11 is realized, the second switching timing signal is input to the second switching circuit 5 after the charging to disconnect the connection between the negative electrode of the first battery and the second capacitor voltage-dividing circuit 2, the fifth timing signal of the second state is input to the switch S10 and the switch S11 to disconnect the switches S10 and S11, and the fourth timing signal of the first state is input to the switch S40 and the switch S41 to switch S40 and the switch S41 to close the switch S40 and the switch S3877 to switch S3875 to switch S40 to switch S41 to switch S355 to switch S41 to switch S3 to switch the charging the second switch S3 to charge the battery to charge the battery, Inputting the third timing signal of the first state to the switch S3 to close the switch S3;
when detecting the voltage of the battery detected by the second section, inputting a fourth timing signal of the second state to the switch S40 and the switch S41 to turn off the switch S40 and the switch S41, inputting a fifth timing signal of the first state to the switch S10 and the switch S11 to turn on the switch S10 and the switch S11, charging the capacitor C11 and the capacitor C21, after the charging is completed, inputting a fifth timing signal of the second state to the switch S10 and the switch S11 to turn off the switch S10 and the switch S11, inputting a third timing signal of the second state to the switch S3 to turn off the switch S3, inputting a second switching timing signal to the second switching switch circuit 5 to connect the positive electrode of the battery detected by the second section to the second capacitor voltage dividing circuit 2, and then inputting a fourth timing signal of the first state to the switch S40 and the switch S41 to turn on the switch S40 and the switch S41;
when the voltage of the battery detected by the third section is detected, a first switching time sequence signal is input to the first switching switch circuit 4 to enable the anode of the battery detected by the third section to be connected into the first capacitor voltage division circuit, then, the fourth timing signal of the second state is input to the switch S40 and the switch S41 to turn off the switch S40 and the switch S41, the fifth timing signal of the first state is input to the switch S10 and the switch S11 to turn on the switch S10 and the switch S11, the capacitor C11 is charged, after the charging is completed, inputting the fifth timing signal of the second state to the switch S10 and the switch S11 turns off the switch S10 and the switch S11, then, inputting a second switching timing signal to the second switching switch circuit to disconnect the negative electrode of the battery detected by the third section from the second capacitor voltage-dividing circuit 2, inputting a third timing signal of the first state to the switch S3 to close the switch S3, and inputting a fourth timing signal of the first state to the switch S40 and the switch S41 to close the switch S40 and the switch S41;
when the battery detected by the nth section is detected, N is an even number greater than 2, the fourth timing signal in the second state is input to the switch S40 and the switch S41 to turn off the switch S40 and the switch S41, the fifth timing signal in the first state is input to the switch S10 and the switch S11 to turn on the switch S10 and the switch S11, the capacitor C11 and the capacitor C21 are charged, after the charging is completed, the fifth timing signal in the second state is input to the switch S10 and the switch S11 to turn off the switch S10 and the switch S11, the third timing signal in the second state is input to the switch S3 to turn off the switch S3, the second switching timing signal is input to the second switching switch circuit 5 to connect the positive electrode of the battery detected by the nth section to the second capacitor voltage dividing circuit, and the fourth timing signal in the first state is input to the switch S40 and the switch S41 to turn on the switch S40 and the switch S41;
when the M section of the detected battery is detected, M is an odd number larger than 3, a first switching time sequence signal is input to a first switching switch circuit 4 to enable the anode of the M section of the detected battery to be connected into a first capacitor voltage division circuit 1, then, the fourth timing signal of the second state is input to the switch S40 and the switch S41 to turn off the switch S40 and the switch S41, the fifth timing signal of the first state is input to the switch S10 and the switch S11 to turn on the switch S10 and the switch S11, the capacitor C11 is charged, after the charging is completed, inputting the fifth timing signal of the second state to the switch S10 and the switch S11 turns off the switch S10 and the switch S11, then, the second switching timing signal is input to the second switching switch circuit 5 to disconnect the negative electrode of the mth battery detected from the second capacitive voltage divider circuit 2, the third timing signal in the first state is input to the switch S3 to close the switch S3, and the fourth timing signal in the first state is input to the switches S40 and S41 to close the switches S40 and S41.
Taking voltage detection of five chargeable and dischargeable batteries in fig. 6 as an example, a charger, a load, a discharging path and a charging path are further electrically connected to the five batteries connected in series in fig. 6. Six test points are shared by five batteries for charging and discharging, so that the voltage detection of all the batteries can be just realized by using the circuit in the figure 3. In fig. 3 and 6, the points with the same reference number are the direct connection points in the actual circuit, the battery voltage lowest point node is V1, the voltage between V1 and the ground point, the voltage between V2 and V1, the voltage between V3 and V2, the voltage between V4 and V3, and the voltage between V5 and V4 are sequentially detected in the order of increasing battery voltage, and the specific detection flow is as follows:
first of all, it is to be understood that the capacitance reactance formula:
the capacitive reactance is inversely proportional to the capacitance, and the larger the capacitance is, the smaller the capacitive reactance is;
design definition known quantities: c11 ═ C21, C12 ═ C22, n ═ C11 ═ C12, that is, Xc11 ═ Xc21Xc12 ═ Xc22, Xc11 ═ Xc21 ═ n ═ Xc12 ═ n ═ Xc22, GND is the reference point, and is equal to 0V.
The workflow for detecting the voltage between the point V1 and GND is as follows:
a: the switch S10 and the switch S11 are closed, and the voltage of the first input terminal V-and the second input terminal V + of the comparator CMP is 0V;
b: when the switch S1 is connected to the point V1 and the switch S2 is connected to the point GND, V11-V1 and V22-GND are obtained, and the capacitors V _ CAP and C11 are fully charged by V1;
c: the switch S2 is turned off and suspended, the switch S10 and the switch S11 are turned off, and the switch S3, the switch S40 and the switch S41 are turned on, so that two capacitor charging paths are generated, and fig. 7 can be referred to for the two capacitor charging paths;
passage 1: from V1 → S1 → V11 → S3 → V22 → C21 → C22 → GND, the V + upper voltage is obtained by dividing the voltage by the series capacitor (see the capacitive reactance formula as above):
passage 2: from VREF → C12 → C11 → V11 → S1 → V1, it is known that the V-up voltage is obtained by dividing the voltage by the series capacitor:
according to operational amplifier, V + -V-is obtained:
since GND is 0V, VREF minus GND takes VREF directly, substituting a design definition known quantity yields:
when n is equal to 2, the total content of the N,
thus, the voltage between V1 and GND can be determined:
in actual use, voltage detection with different purposes can be realized by changing the size of the reference voltage VREF. When the reference voltage is generated by the reference voltage module in fig. 4, during the closing period of the switch S40, the reference voltage VREF may be connected to the overcharge reference voltage during one half period, and the reference voltage may be connected to the overdischarge reference voltage during the other half period, so as to implement the overcharge and overdischarge detection of the battery.
When S6 switches to the overcharge reference voltage (assumed to be equal to 2.1V), VREF is equal to 2.1V,
from the above formula
When the voltage V1 is greater than 4.2V, the comparator CMP generates the first detection signal in the first state, i.e. the first detection signal in the high level, and at this time, the detection module in fig. 5 outputs the overcharge protection signal to close the NM2 tube of the charging path, so as to stop charging, thereby implementing overcharge detection protection.
When S6 is switched to the over-discharge reference voltage (assuming 1.3V), VREF equals to 1.3V, which is expressed by the above formula
To solve this, when the voltage V1 is less than 2.6V, the comparator CMP and the inverter generate the second detection signal of the first state, i.e., the second detection signal of the high level,
the discharge protection signal closes the discharge path NM1 tube to stop discharging; at this time, the detection module in fig. 5 outputs an overdischarge protection signal to close the discharge path NM1 tube, so as to stop discharging, thereby realizing overdischarge detection protection.
Through the voltage detection function, a protection signal can be generated for the charging overvoltage or the discharging overvoltage of the storage battery, so that the service life of the storage battery is prolonged;
after the voltage detection between the point V1 and the GND is completed, the workflow for detecting the voltage between the points V2 and V1 is as follows:
a: the switch S1 is kept connected to V1, the switch S3 is kept closed, and V1 ═ V11 ═ V22;
b: switch S40 is open, switch S10 is closed, V + is equal to V — GND, and capacitor C11 and capacitor C21 are fully charged by V1;
c: after the capacitor C11 and the capacitor C21 are charged, the switch S10 and the switch S3 are disconnected;
d: the switch S2 is switched to V2, and the switch S40 is closed, so that two capacitor charging paths are generated, and refer to fig. 8;
passage 1: v2 → S2 → V22 → C21 → C22 → GND, at this time, since the initial potential of V22 is equal to V1, the dynamic voltage is the difference of V2-V1, and the voltage is divided by the series capacitor, namely the V + voltage:
passage 2: from VREF → C12 → C11 → V11 → S1 → V1, the V-voltage is obtained:
the components are obtained by the known amount and the arrangement,
by referring to the illustration of detecting the voltage between the point V1 and the point GND, taking n as 2, the voltage value between V2 and V1 can be detected, and through the voltage detection function, a protection signal can be generated for the charging overvoltage or the discharging overvoltage of the storage battery, so that the service life of the storage battery is prolonged;
after the voltage detection between the point V2 and the point V1 is completed, the workflow for detecting the voltage between the points V3 and V2 is as follows:
a, switching a switch S1 to switch V3, switching the switch S40 and the switch S3 to be off, switching the switch S10 to be on, switching V11 to V3, and fully charging a capacitor C11 by V3;
b: the switch S2 is kept connected to V2, V22 is equal to V2, and the capacitor C21 is fully charged by V2;
c: after the capacitor C21 is fully charged, the switch S10 is turned off;
d: the switch S2 is turned off and suspended, and the switches S3 and S40 are turned on, so that two capacitor charging paths are generated, and fig. 9 is referred to the two capacitor charging paths;
passage 1: v3 → S1 → V11 → S3 → V22 → C21 → C22 → GND, at this time, since the initial potential of V22 is V2, the dynamic voltage is a V3-V2 difference, and the voltage is divided by the series capacitor, that is, the V + voltage is obtained:
passage 2: from VREF → C12 → C11 → V11 → S1 → V3, it is known that the V-up voltage is obtained by dividing the voltage by the series capacitor:
the components are obtained by the known amount and the arrangement,
by referring to the illustration of detecting the voltage between the point V1 and the point GND, taking n as 2, the voltage value between V3 and V2 can be detected, and through the voltage detection function, a protection signal can be generated for the charging overvoltage or the discharging overvoltage of the storage battery, so that the service life of the storage battery is prolonged;
the step of sensing the voltage at point V4 and point V3 refers to the step of sensing the voltage between points V2 and V1, resulting in two battery charging paths as shown in fig. 10, except that in step d, switch S2 is connected to V4.
The step of sensing the voltages at points V5 and V4 refers to the step of sensing the voltage between points V3 and V2, resulting in two battery charging paths as shown in fig. 11, except that in step a, the switch S1 is connected to V5, and in step b, the switch S2 is kept connected to V4 for a while and then disconnected from the air.
When each battery in fig. 6 is detected, the control signals of the switch S1, the switch S2, the switch S3, the switch S40, the switch S10 and the switch S6 in fig. 3 may be generated by a digital sequential logic module to generate different control sequential signals to control the on and off of all the switches, and a specific timing diagram and voltages of relevant nodes in the circuit in fig. 3 are shown in fig. 12.
In practical use, the capacitors in the first capacitor divider circuit 1 and the second capacitor divider circuit and other capacitors in the detection circuit can all adopt MOM capacitor structures, the MOM capacitors utilize capacitance values formed between Metal (Metal) edges on the same layer, the area is saved, multiple layers of Metal can be overlapped, the potentials of the upper and lower electrode plates of the capacitors can be interchanged, the photoetching times are multiple for MIM or PIP capacitors, the design cost is increased, the potentials of the upper and lower electrode plates of the capacitors formed by MOS tubes can not be interchanged, and when the MOM capacitors are applied to be proportional capacitors, the matching performance and the precision are high, and the purpose of high-precision voltage detection can be realized.
In conclusion, the utility model can realize the comparison of the voltage of a single battery with the reference voltage through the capacitive voltage division circuit, improves the detection precision, reduces the cost of the chip adopting the utility model because a detection resistor and a related fuse structure are not needed, and reduces the loss of the utility model in actual use by dynamically detecting the voltage at two ends of each battery in a time sequence control mode instead of always electrifying the resistor for detection.
In light of the above, it is clear that many changes and modifications can be made by the workers in the field without departing from the spirit and scope of the utility model. The technical scope of the present invention is not limited to the content of the specification, and must be determined according to the scope of the claims.
Claims (10)
1. A battery voltage detection circuit is characterized by comprising a reference voltage, a first capacitor voltage division circuit, a second capacitor voltage division circuit, a voltage clamping circuit and a comparator, wherein the reference voltage is input to a first input end of the comparator through the first capacitor voltage division circuit; one electrode of a single battery in the plurality of series-connected batteries is electrically connected with the first capacitor voltage-dividing circuit, the other electrode of the single battery in the plurality of series-connected batteries is electrically connected with the second capacitor voltage-dividing circuit, the voltage clamping circuit clamps the voltage at the input end of the second capacitor voltage-dividing circuit to the voltage of the single battery, and the voltage of the single battery is input to the second input end of the comparator through the second capacitor voltage-dividing circuit.
2. The battery voltage detection circuit according to claim 1, further comprising a first switch circuit and a second switch circuit, wherein the first switch circuit comprises a plurality of switch channels, and the second switch circuit comprises a plurality of switch channels; one electrode of a single battery in the plurality of series-connected batteries is electrically connected with the first capacitor voltage division circuit through a single switching channel in a first switching switch circuit, and the other electrode of the single battery in the plurality of series-connected batteries is electrically connected with the second capacitor voltage division circuit through a single switching channel in a second switching switch circuit; when one switching channel in the first switching switch circuit is switched on, the rest switching channels are switched off, and when one switching channel in the second switching switch circuit is switched on, the rest switching channels are switched off.
3. The battery voltage detecting circuit according to claim 1, wherein the voltage clamping circuit comprises a capacitor V _ CAP, a switch S3, a switch S10, a switch S11 and a switch S12, two ends of the capacitor V _ CAP are electrically connected to an input terminal of the first capacitor voltage dividing circuit and an input terminal of the second capacitor voltage dividing circuit, two ends of the switch S3 are electrically connected to an input terminal of the first capacitor voltage dividing circuit and an input terminal of the second capacitor voltage dividing circuit, respectively, a first input terminal of the comparator is grounded through a switch S10, a second input terminal of the comparator is grounded through a switch S11, one end of the switch S12 is electrically connected to a terminal of a voltage dividing capacitor at a terminal of the first capacitor voltage dividing circuit and a terminal of a voltage dividing capacitor at a terminal of the second capacitor voltage dividing circuit, respectively, and the other end of the switch S12 is grounded, the switch 10, the switch S11 and the switch S12 are simultaneously closed or simultaneously opened; the first capacitance voltage division circuit comprises a capacitor C11, a capacitor C12 and a switch S40 which are sequentially connected in series, wherein a connection point of the capacitor C12 and the capacitor C11 is electrically connected with a first input end of the comparator, and a connection point of the capacitor C12 and the switch S40 is electrically connected with one end of the switch S12; the reference voltage is input to the input terminal of the switch S40; the second capacitance voltage division circuit comprises a capacitor C21, a capacitor C22 and a switch S41 which are sequentially connected in series, one end, which is not electrically connected with the capacitor C22, of the switch S41 is grounded, one end, which is electrically connected with the capacitor C21 and the capacitor C22, of the switch S41 is electrically connected with the second input end of the comparator, the connection point of the capacitor C22 and the switch S41 is electrically connected with one end of the switch S12, and the switch S40 and the switch S41 are simultaneously closed or simultaneously opened.
4. A battery voltage detection circuit according to claim 3, wherein one electrode of each of said plurality of series-connected batteries is connected to a switching channel of a first switching circuit, the other electrode of each of said plurality of series-connected batteries is connected to a switching channel of a second switching circuit, one switching channel of said first switching circuit is electrically connected to an electrode of only one battery, and one switching channel of said second switching circuit is electrically connected to an electrode of only one battery.
5. The battery voltage detection circuit according to claim 4, wherein a first switching timing signal is input to the first switching circuit, and a second switching timing signal is input to the second switching circuit, so that the battery voltage detection circuit performs voltage detection on the single battery having the lowest voltage of the battery positive electrode first, and then sequentially detects the voltages at both ends of each battery in the order of increasing voltage of the battery positive electrode.
6. The battery voltage detection circuit according to claim 5,
when the voltage of the first battery is detected, the fifth time sequence signal of the first state is firstly input into the switch S10 and the switch S11 to close the switch S10 and the switch S11, then the first switching time sequence signal is input into the first switching circuit to enable the positive electrode of the first battery to be connected into the first capacitor voltage division circuit, the second switching time sequence signal is input into the second switching circuit to enable the negative electrode of the first battery to be connected into the second capacitor voltage division circuit, the charging of the capacitor V _ CAP and the capacitor C11 is realized, after the charging is finished, the second switching time sequence signal is input into the second switching circuit to disconnect the negative electrode of the first battery from the second capacitor voltage division circuit, the fifth time sequence signal of the second state is input into the switch S10 and the switch S11 to disconnect the switch S10 and the switch S11, and then the fourth time sequence signal of the first state is input into the switch S40 and the switch S41 to close the switch S40 and the switch S41, Inputting the third timing signal of the first state to the switch S3 to close the switch S3;
when detecting the voltage of the battery detected by the second section, inputting a fourth timing signal of the second state to the switch S40 and the switch S41 to open the switch S40 and the switch S41, inputting a fifth timing signal of the first state to the switch S10 and the switch S11 to close the switch S10 and the switch S11, charging the capacitor C11 and the capacitor C21, after the charging is completed, inputting a fifth timing signal of the second state to the switch S10 and the switch S11 to open the switch S10 and the switch S11, inputting a third timing signal of the second state to the switch S3 to open the switch S3, then inputting a second switching timing signal to the second switching switch circuit to connect the positive electrode of the battery detected by the second section to the second capacitor voltage dividing circuit, and then inputting a fourth timing signal of the first state to the switch S40 and the switch S41 to close the switch S40 and the switch S41;
when the voltage of the battery detected by the third section is detected, a first switching time sequence signal is input to the first switching switch circuit to enable the anode of the battery detected by the third section to be connected into the first capacitor voltage division circuit, then, the fourth timing signal of the second state is input to the switch S40 and the switch S41 to turn off the switch S40 and the switch S41, the fifth timing signal of the first state is input to the switch S10 and the switch S11 to turn on the switch S10 and the switch S11, the capacitor C11 is charged, after the charging is completed, inputting the fifth timing signal of the second state to the switch S10 and the switch S11 turns off the switch S10 and the switch S11, inputting a second switching timing signal to the second switching switch circuit to disconnect the negative electrode of the battery detected by the third section from the second capacitor voltage-dividing circuit, inputting a third timing signal in the first state to the switch S3 to close the switch S3, and inputting a fourth timing signal in the first state to the switch S40 and the switch S41 to close the switch S40 and the switch S41;
when the battery detected by the nth section is detected, N is an even number greater than 2, the fourth timing signal in the second state is input to the switch S40 and the switch S41 to turn off the switch S40 and the switch S41, the fifth timing signal in the first state is input to the switch S10 and the switch S11 to turn on the switch S10 and the switch S11, the capacitor C11 and the capacitor C21 are charged, after the charging is completed, the fifth timing signal in the second state is input to the switch S10 and the switch S11 to turn off the switch S10 and the switch S11, the third timing signal in the second state is input to the switch S3 to turn off the switch S3, then the second switching timing signal is input to the second switching switch circuit to connect the positive electrode of the battery detected by the nth section to the second capacitor voltage dividing circuit, and the fourth timing signal in the first state is input to the switch S40 and the switch S41 to turn on the switch S40 and the switch S41;
when the M section of the detected battery is detected, M is an odd number larger than 3, a first switching time sequence signal is input to a first switching switch circuit to enable the anode of the M section of the detected battery to be connected into a first capacitor voltage division circuit, then, the fourth timing signal of the second state is input to the switch S40 and the switch S41 to turn off the switch S40 and the switch S41, the fifth timing signal of the first state is input to the switch S10 and the switch S11 to turn on the switch S10 and the switch S11, the capacitor C11 is charged, after the charging is completed, inputting the fifth timing signal of the second state to the switch S10 and the switch S11 turns off the switch S10 and the switch S11, then, a second switching timing signal is input to the second switching switch circuit to disconnect the negative electrode of the M-th detected battery from the second capacitor voltage-dividing circuit, a third timing signal in the first state is input to the switch S3 to close the switch S3, and a fourth timing signal in the first state is input to the switches S40 and S41 to close the switches S40 and S41.
7. The battery voltage detection circuit of claim 6, further comprising a digital sequential logic module configured to generate a first switching timing signal, a second switching timing signal, a third timing signal, a fourth timing signal, and a fifth timing signal, wherein the first state is a high state and the second state is a low state.
8. The battery voltage detection circuit of claim 1, wherein the reference voltage comprises an overdischarge reference voltage and an overcharge reference voltage, the reference voltage module generates the overdischarge reference voltage and the overcharge reference voltage, the overdischarge reference voltage and the overcharge reference voltage are input into the first capacitive voltage division circuit through a dual-channel switch S6, the overdischarge reference voltage is input into the comparator for a time a T/C during a period T in which the reference voltage is input into the comparator, the overcharge reference voltage is input into the comparator for a time B T/C, A, B and C are both positive numbers, and a + B is equal to C.
9. The battery voltage detection circuit according to claim 8, further comprising a detection module, wherein the output terminal of the comparator inputs a first detection signal to the detection module, the output terminal of the comparator inputs a second detection signal to the detection module through an inverter, the detection module outputs an overcharge protection signal when the first detection signal is in the first state, and the detection module outputs an overdischarge protection signal when the second detection signal is in the first state.
10. The battery voltage detecting circuit of claim 1, wherein the capacitor of the first capacitor voltage dividing circuit and the capacitor of the second voltage dividing circuit are MOM capacitor structures.
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