CN215575511U - Chip aging testing device - Google Patents
Chip aging testing device Download PDFInfo
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- CN215575511U CN215575511U CN202121632321.5U CN202121632321U CN215575511U CN 215575511 U CN215575511 U CN 215575511U CN 202121632321 U CN202121632321 U CN 202121632321U CN 215575511 U CN215575511 U CN 215575511U
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Abstract
The utility model discloses a chip aging test device, which relates to the technical field of chip testing and comprises a machine body, wherein a door plate is hinged to the lower end of the outer front surface of the machine body, a temperature controller is mounted at the upper end of the outer front surface of the machine body through screws, a test chamber and a heat dissipation chamber are arranged inside the machine body, the test chamber is positioned right above the heat dissipation chamber, a plurality of stepped grooves are formed in the bottom surface inside the test chamber in a centrosymmetric mode, a circuit board is mounted on the bottom surfaces inside the stepped grooves through screws, through holes are formed in the bottom surfaces inside the stepped grooves, heat dissipation fans are embedded inside the through holes, and a lifting platform capable of sliding up and down is arranged at the upper end inside the test chamber. Can carry out the independent control to the inside temperature of every heat preservation cover through temperature controller to make every chip can be in different temperatures, so that carry out the test of different temperature ranges to a plurality of chips simultaneously, can effectively improve efficiency of software testing.
Description
Technical Field
The utility model relates to the technical field of chip testing, in particular to a chip aging testing device.
Background
When the chip works, a large amount of heat is generated, and the chip is aged due to overhigh temperature, so that the service life of the chip is influenced, and the chip is generally required to be subjected to high-temperature aging test.
In the prior art, when the chip high-temperature aging test is performed, the chip is powered on, the chip is enabled to automatically generate heat and raise the temperature, and when the chip automatically generates heat, the temperature raising speed is slow, the time consumption is long, so the chip high-temperature test efficiency is influenced, and the high-temperature aging test device in the prior art can mostly only test a single chip in a certain temperature range, but is difficult to simultaneously test a plurality of chips in different temperature ranges respectively, so the chip test efficiency is also low, so the chip aging test device is provided, and the technical problem provided by the method is solved.
SUMMERY OF THE UTILITY MODEL
The utility model provides a chip aging test device to solve the problem that the chip high-temperature aging test efficiency is low in the chip high-temperature aging test device in the prior art provided by the background art.
In order to achieve the purpose, the utility model adopts the following technical scheme:
a chip aging testing device comprises a machine body, wherein the lower end of the front surface of the outer part of the machine body is hinged with a door plate, the upper end of the front surface of the outer part of the machine body is provided with a temperature controller through screws, the inner part of the machine body is provided with a testing chamber and a heat dissipation chamber, the testing chamber is positioned right above the heat dissipation chamber, the bottom surface of the inner part of the testing chamber is provided with a plurality of step grooves and a plurality of circuit boards through screws, the bottom surface of the inner part of the step grooves is provided with through holes, the inner parts of the through holes are embedded with heat dissipation fans, the upper end of the inner part of the testing chamber is provided with a lifting table capable of sliding up and down, a plurality of electric push rods are arranged between the top of the lifting table and the top surface of the inner part of the testing chamber through screws, a plurality of heat preservation covers are welded on the bottom surface of the inner part of the lifting table in a central symmetry mode, the upper end of the inner circumferential surface of the heat-insulating cover is uniformly bonded with a plurality of heating belts, the lower end of the inner circumferential surface of the heat-insulating cover is welded with a support frame, the center of the bottom of the support frame is welded with a spring telescopic rod, and the bottom of the spring telescopic rod is embedded with a temperature probe.
Further, a plurality of the heat preservation cover is located a plurality of respectively directly over the ladder groove, and the bottom of heat preservation cover inserts the inside upper end of ladder groove.
Furthermore, the bottom of the spring telescopic rod extends out of the heat preservation cover and is positioned right above the circuit board.
Further, a chip is mounted on the upper surface of the circuit board, and the bottom of the temperature probe is in contact with the upper surface of the chip.
Further, the through-hole is located under the circuit board, the bottom of through-hole runs through to between the heat dissipation, both ends are uncovered about between the heat dissipation.
Furthermore, the temperature probe and the heating belt are connected with a temperature controller through leads, and the door plate is positioned right in front of the lower end in the test room.
Compared with the prior art, the utility model has the following beneficial effects:
the plurality of stepped grooves are formed in the test room, the heat-insulating cover is arranged above each stepped groove, and the circuit board with the chip is placed in each stepped groove, so that after the chip is electrified and heated, the heat-insulating cover can move downwards and is buckled above the stepped grooves, heat emitted by the chip cannot drift away, the heat-insulating effect is achieved, the temperature rise of the chip is accelerated, meanwhile, in the temperature rise process of the chip, if the chip cannot reach the required temperature, the heating belt in the heat-insulating cover can be opened to heat, and the chip is heated, so that the temperature rise speed of the chip can be effectively increased, the test time is saved, and the test efficiency of the chip is improved;
And because a chip is independently laid in every ladder groove, and the cover that keeps warm makes all being in an independent space of every chip, so can control alone every temperature that keeps warm the inside of cover through temperature controller to make every chip can be in different temperatures, so that carry out the test of different temperature ranges to a plurality of chips simultaneously, can effectively improve efficiency of software testing.
Drawings
Fig. 1 is an overall external structural view of the present invention.
Fig. 2 is a schematic view of the overall front internal structure of the present invention.
FIG. 3 is an enlarged view of a portion of FIG. 2 according to the present invention.
FIG. 4 is a schematic top view of a test chamber according to the present invention.
Fig. 5 is a bottom view of the supporting frame of the present invention.
In FIGS. 1-5: the method comprises the following steps of 1-machine body, 101-test room, 102-heat dissipation room, 103-step groove, 104-through hole, 2-lifting table, 3-electric push rod, 4-heat preservation cover, 5-temperature controller, 6-heating band, 7-support frame, 8-spring telescopic rod, 9-temperature probe, 10-circuit board, 11-heat dissipation fan and 12-door plate.
Detailed Description
Please refer to fig. 1 to 5:
the utility model provides a chip aging test device, which comprises a machine body 1, wherein the lower end of the outer front surface of the machine body 1 is hinged with a door plate 12, the upper end of the outer front surface of the machine body 1 is provided with a temperature controller 5 through a screw, the interior of the machine body 1 is provided with a test chamber 101 and a heat dissipation chamber 102, the test chamber 101 is positioned right above the heat dissipation chamber 102, the bottom surface of the interior of the test chamber 101 is provided with a plurality of stepped grooves 103 in a centrosymmetric manner, the bottom surfaces of the interior of the plurality of stepped grooves 103 are all provided with a circuit board 10 through screws, the bottom surfaces of the interior of the plurality of stepped grooves 103 are all provided with through holes 104, the interior of the through holes 104 is embedded with a heat dissipation fan 11, the upper end of the interior of the test chamber 101 is provided with a lifting table 2 capable of sliding up and down, a plurality of electric push rods 3 are arranged between the top of the lifting table 2 and the top surface of the interior of the test chamber 101 through screws, and a plurality of heat preservation covers 4 are welded on the bottom surface of the interior of the lifting table 2 in a centrosymmetric manner, the upper end of the inner circumference of the heat-insulating cover 4 is uniformly bonded with a plurality of heating belts 6, the lower end of the inner circumference of the heat-insulating cover 4 is welded with a support frame 7, the central welding of the bottom of the support frame 7 is provided with a spring telescopic rod 8, and the bottom of the spring telescopic rod 8 is embedded with a temperature probe 9.
Specifically, a plurality of keeps warm and covers 4 and be located a plurality of ladder groove 103 directly over respectively, and keep warm and cover 4's bottom and insert the inside upper end in ladder groove 103, spring telescopic rod 8's bottom extends and keeps warm and cover 4 and be located circuit board 10 directly over, circuit board 10's last surface mounting has the chip, and the bottom of temperature probe 9 and the last surface contact of chip, through-hole 104 is located circuit board 10 directly under, the bottom of through-hole 104 runs through to dispel the heat between 102, both ends are uncovered about dispelling the heat between 102, temperature probe 9 and heating tape 6 all meet with temperature controller 5 through the wire, door plant 14 is located the test between 101 the dead ahead of inside lower extreme.
According to above, open door plant 12 and can go up the chip of the required high temperature aging testing of installation toward circuit board 10 in every ladder groove 103, circuit board 10 external power supply, after circuit board 10 circular telegram, the chip also just can be circular telegram, electric putter 3 can promote elevating platform 2 and carry out the oscilaltion, when elevating platform 2 descends down, the bottom of heat preservation cover 4 just can insert in ladder groove 103, temperature probe 9 of 8 bottoms of spring telescopic link just can support the top at the chip simultaneously, then temperature probe 9 can survey the temperature of chip, and convert temperature information into the signal of telecommunication and send to temperature controller 5, thereby temperature controller 5 can monitor the temperature of every chip through every temperature probe 9, spring telescopic link 8 can stretch out and draw back and have a decurrent elasticity, thereby make temperature probe 9 can be inseparable laminating on the chip, and can be alone through temperature controller 5 to every heat dissipation fan 11 and heat-band 6 in every heat preservation cover 4 Performing individual switch control;
According to the above, when the chip on the circuit board 10 is powered on, the chip heats, the heat emitted will drift in the heat-insulating cover 4, the heat-insulating cover 4 prevents the temperature from radiating outward to achieve the heat-insulating effect, thereby accelerating the temperature rise of the chip, when a certain chip can not reach the temperature required to be tested, the heating belt 6 in the current heat-insulating cover 4 is opened through the temperature controller 5, the subsequently opened heating belt 6 generates heat to assist the chip to rise to the required temperature, if the temperature of a certain chip exceeds the temperature required to be tested, the heat-radiating fan 11 below the current chip can be opened through the temperature controller 5, then the heat-radiating fan can cool the circuit board 10 of the current chip by air cooling, thereby cooling the chip, and the heat emitted during the air cooling is discharged through the heat-radiating chamber 102, so that the temperature in each heat-insulating cover 4 can be controlled independently through the controller 5, thereby enabling each chip to be at a different temperature.
In summary, by arranging a plurality of stepped grooves 103 in the test chamber 101, arranging the heat-insulating cover 4 above each stepped groove 103, and placing the circuit board 10 with the chip in each stepped groove 103, when the chip is powered on to generate heat, the heat-insulating cover 4 can move down and buckle above the stepped groove 103, so that the heat emitted by the chip will not drift away, thereby achieving the heat-insulating effect and accelerating the temperature rise of the chip, and meanwhile, in the process of temperature rise of the chip, if the chip can not reach the required temperature, the heating belt 6 in the heat-insulating cover 4 can be opened to heat, thereby heating the chip, and thus, the temperature rise speed of the chip can be effectively increased, thereby saving the test time and improving the test efficiency of the chip, and if the temperature of the chip is too high, the heating belt 6 is closed, the heat-radiating fan 11 is opened and cools the chip, thereby controlling the temperature of the chip;
And because a chip is independently placed in each stepped groove 103, and the heat-insulating cover 4 enables each chip to be in an independent space, the temperature inside each heat-insulating cover 4 can be independently controlled through the temperature controller 5, so that each chip can be in different temperatures, thereby being convenient for simultaneously carrying out aging tests in different temperature ranges on a plurality of chips, and effectively improving the test efficiency.
Claims (6)
1. The utility model provides a chip aging testing device, includes organism (1), its characterized in that:
the lower end of the outer front surface of the machine body (1) is hinged with a door panel (12), the upper end of the outer front surface of the machine body (1) is provided with a temperature controller (5) through a screw, the inner part of the machine body (1) is provided with a test chamber (101) and a heat dissipation chamber (102), the test chamber (101) is positioned right above the heat dissipation chamber (102), the bottom surface of the inner part of the test chamber (101) is provided with a plurality of stepped grooves (103) in a centrosymmetric mode, the bottom surface of the inner part of the stepped grooves (103) is provided with a circuit board (10) through screws, the bottom surface of the inner part of the stepped grooves (103) is provided with a plurality of through holes (104), the inner part of the through holes (104) is embedded with a heat dissipation fan (11), the upper end of the inner part of the test chamber (101) is provided with a lifting table (2) capable of sliding up and down, a plurality of electric push rods (3) are arranged between the top of the lifting table (2) and the top surface of the inner part of the test chamber (101) through screws, a plurality of heat preservation cover (4) is welded with the central symmetry's mode in the inside bottom surface of elevating platform (2), a plurality of the upper end of the interior circumference of heat preservation cover (4) all evenly bonds and has a plurality of heating tape (6), a plurality of support frame (7) is all welded to the lower extreme of the interior circumference of heat preservation cover (4), the central authorities welding of support frame (7) bottom has spring telescopic link (8), the bottom scarf joint of spring telescopic link (8) has temperature probe (9).
2. The chip burn-in test apparatus according to claim 1, wherein: a plurality of heat preservation cover (4) are located a plurality of respectively just over ladder groove (103), and the inside upper end in ladder groove (103) is inserted to the bottom of heat preservation cover (4).
3. The chip burn-in test apparatus according to claim 2, wherein: the bottom of the spring telescopic rod (8) extends out of the heat preservation cover (4) and is positioned right above the circuit board (10).
4. The chip burn-in test apparatus according to claim 3, wherein: the upper surface of the circuit board (10) is provided with a chip, and the bottom of the temperature probe (9) is contacted with the upper surface of the chip.
5. The chip burn-in test apparatus according to claim 1, wherein: the through hole (104) is located under the circuit board (10), the bottom of the through hole (104) penetrates through the heat dissipation chamber (102), and the left end and the right end of the heat dissipation chamber (102) are both open.
6. The chip burn-in test apparatus according to claim 1, wherein: the temperature probe (9) and the heating belt (6) are connected with the temperature controller (5) through leads, and the door panel (12) is positioned right in front of the lower end in the test room (101).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202121632321.5U CN215575511U (en) | 2021-07-16 | 2021-07-16 | Chip aging testing device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202121632321.5U CN215575511U (en) | 2021-07-16 | 2021-07-16 | Chip aging testing device |
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| Publication Number | Publication Date |
|---|---|
| CN215575511U true CN215575511U (en) | 2022-01-18 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
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| CN202121632321.5U Active CN215575511U (en) | 2021-07-16 | 2021-07-16 | Chip aging testing device |
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| CN (1) | CN215575511U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115712056A (en) * | 2023-01-06 | 2023-02-24 | 法特迪精密科技（苏州）有限公司 | Chip temperature cycle aging test bench, key seat and test method |
| CN115754684A (en) * | 2023-01-06 | 2023-03-07 | 法特迪精密科技（苏州）有限公司 | Chip aging test board and key structure and test method thereof |
-
2021
- 2021-07-16 CN CN202121632321.5U patent/CN215575511U/en active Active
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115712056A (en) * | 2023-01-06 | 2023-02-24 | 法特迪精密科技（苏州）有限公司 | Chip temperature cycle aging test bench, key seat and test method |
| CN115754684A (en) * | 2023-01-06 | 2023-03-07 | 法特迪精密科技（苏州）有限公司 | Chip aging test board and key structure and test method thereof |
| CN115712056B (en) * | 2023-01-06 | 2023-04-21 | 法特迪精密科技（苏州）有限公司 | Chip temperature cycle aging test table, key seat and test method |
| CN116224039A (en) * | 2023-01-06 | 2023-06-06 | 法特迪精密科技（苏州）有限公司 | Cooling socket of chip temperature cycle aging test board |
| CN116224037A (en) * | 2023-01-06 | 2023-06-06 | 法特迪精密科技（苏州）有限公司 | Base of chip temperature cycle aging test bench |
| CN116224038A (en) * | 2023-01-06 | 2023-06-06 | 法特迪精密科技（苏州）有限公司 | Chip seat of chip temperature cycle aging test board |
| CN116224037B (en) * | 2023-01-06 | 2023-10-03 | 法特迪精密科技（苏州）有限公司 | Chip temperature cycle aging test method implemented on chip temperature cycle aging test bench |
| CN116224039B (en) * | 2023-01-06 | 2023-10-27 | 法特迪精密科技（苏州）有限公司 | Cooling socket of chip temperature cycle aging test board |
| CN116224038B (en) * | 2023-01-06 | 2023-11-14 | 法特迪精密科技（苏州）有限公司 | Chip seat of chip temperature cycle aging test board |
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