CN215342604U

CN215342604U - LED chip structure and display module

Info

Publication number: CN215342604U
Application number: CN202121164569.3U
Authority: CN
Inventors: 刘召军; 邱成峰; 莫炜静; 刘时彪
Original assignee: Shenzhen Stan Technology Co Ltd
Current assignee: Shenzhen Stan Technology Co Ltd
Priority date: 2021-05-27
Filing date: 2021-05-27
Publication date: 2021-12-28
Anticipated expiration: 2031-05-27

Abstract

The utility model discloses an LED chip structure and a display module, wherein the LED chip structure comprises a conducting layer and an LED column array formed on the conducting layer and composed of a plurality of LED columns, the LED column array is divided into different display areas by insulating fillers filled in gaps among partial LED columns, each display area comprises not less than 2 LED columns, the gaps of the LED columns in each display area are filled with corresponding luminescent materials, the conducting layer is provided with a spacing groove corresponding to the position of the insulating fillers, the spacing grooves are used for enabling the conducting layers of each display area to be not connected with each other, each display area also comprises an N electrode and a P electrode, the N electrode is electrically connected with the conducting layers of each display area, and the P electrode is electrically connected with the P type layers of all the LED columns. The utility model can prepare the LED chip structure with tiny size, higher resolution, more bright color and low power consumption, and the preparation process can overcome the process difficulty caused by tiny size.

Description

LED chip structure and display module

Technical Field

The utility model relates to the technical field of LED display, in particular to an LED chip structure and a display module.

Background

With the pursuit of high definition display by human, micro-leds and nano-leds are attracting great interest. As a novel display technology, the micro led/nano led has many advantages of self-luminescence, high efficiency, long service life, ultrahigh resolution, etc., and since birth, people are keen on it and praised as a next-generation display technology.

In the process of studying full-color LED chips, the inventors found that the full-color LED chips have at least the following problems: the full-color LED chip structure is formed by periodically arranging LED chips with different light-emitting colors, the LED chips with different light-emitting colors usually comprise electroluminescent LED chips and photoluminescent bodies which are compounded on the electroluminescent LED chips and can emit light with different colors, the intensity of exciting light emitted by the electroluminescent LED chips can be controlled by controlling the input current of the electroluminescent LED chips, the photoluminescent bodies can emit light with different wavelengths by being excited by the exciting light with different intensities, so that different light-emitting colors are presented, however, for micro/nano LEDs, especially for nano LEDs, the chip size is smaller than 1 micron and enters the nano level, the independent control of each nano LED is difficult to realize, and the patterning, film coating, photoetching, alloying and the like of each nano LED are difficult.

SUMMERY OF THE UTILITY MODEL

The utility model aims to overcome the defects in the prior art and provide the LED chip structure and the display module, so that the process difficulty is reduced.

In order to achieve the purpose, the technical scheme of the utility model is as follows:

an LED chip structure comprises a conducting layer and an LED column array formed on the conducting layer and composed of a plurality of LED columns, wherein the LED columns comprise an N-type layer, an active layer and a P-type layer which are sequentially laminated to the conducting layer, the LED column array is divided into 2 or more than 2 display areas by insulating fillers filled in gaps among partial LED columns, each display area comprises not less than 2 LED columns, and corresponding luminescent materials are filled in the gaps of the LED columns in each display area, so that the display areas respectively emit light with different colors;

the conducting layer is provided with spacing grooves corresponding to the positions of the insulating fillers, the spacing grooves are used for enabling the conducting layers of the display regions not to be connected with each other, and each display region further comprises an N electrode electrically connected with the conducting layer of each display region;

the LED column structure further comprises a P electrode which is electrically connected with the P type layers of all the LED columns.

The utility model also provides a display module comprising the LED chip structure.

The embodiment of the utility model has the following beneficial effects:

1. according to the utility model, the conductive layer and the LED column array formed on the conductive layer and composed of a plurality of LED columns are arranged, so that large-scale LED columns can be formed in batches;

2. by filling the luminescent material in the gaps between the LED columns, on one hand, a mask with extremely high precision is not needed during filling, so that the process difficulty and the process cost increase caused by over-small size are avoided, and on the other hand, compared with the luminescent material in the prior art, the luminescent material is arranged above the LEDs;

3. the contact area between the luminescent material and the LED column is larger, so that the conversion efficiency of photoluminescence is improved;

4. by dividing different display areas, the light-emitting materials of all the display areas can be filled in batches, and the process difficulty caused by over-small size is avoided due to the fact that the size of each display area is large;

5. by arranging the insulating filler and arranging the spacing grooves on the conducting layer, each display area is electrically isolated, so that the input current of each display area can be independently controlled, and full-color display is realized;

6. the N electrodes electrically connected with the conducting layers of the display regions are arranged, so that the N electrodes can supply power to all the LED columns in the display regions, and the patterning difficulty caused by arranging the N electrodes on each LED column is avoided due to the fact that the area of each display region is large.

In conclusion, the utility model can prepare the LED chip structure with tiny size, higher resolution, more bright color and low power consumption, and the preparation process can overcome the process difficulty caused by tiny size.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.

Wherein:

fig. 1 is a schematic structural diagram of an epitaxial wafer with a current spreading layer formed thereon according to an embodiment of the present invention.

Fig. 2 is a schematic structural view of the structure shown in fig. 1 etched to form an array of LED pillars.

Fig. 3 is a schematic view of the structure of fig. 2 filled with a light emitting material and an insulating filler.

Fig. 4 is a schematic structural view of the P electrode formed by the structure shown in fig. 3.

Fig. 5 is a schematic view of the structure of fig. 4 with the substrate and buffer layer removed.

Fig. 6 is a schematic structural view of roughening the light emitting surface and forming the isolation grooves in the structure shown in fig. 5.

Fig. 7 is a schematic structural view of a passivation layer formed on the structure shown in fig. 6.

Fig. 8 is a schematic structural view of the structure shown in fig. 7 forming an N electrode.

Fig. 9 is a schematic top view of the structure shown in fig. 8.

The LED display device comprises a substrate 10, a buffer layer 20, an N-type layer 30, a first N-type layer 31, a second N-type layer 32, an LED column 40, an active layer 41, a P-type layer 42, a current spreading layer 43, a display region 50, an insulating filler 60, a light-emitting material 70, a P electrode 80, a metal layer 81, a conductive substrate 82, a light-emitting surface 33, a spacing groove 34, a passivation layer 35 and an N electrode 90.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Referring to fig. 8 and 9, the present invention discloses an LED chip structure, including a conductive layer (i.e. a first N-type layer 31) and an LED pillar array formed on the conductive layer and composed of a plurality of LED pillars 40, where the LED pillars 40 include an N-type layer (i.e. a second N-type layer 32), an active layer 41 and a P-type layer 42 sequentially stacked to the conductive layer, the LED pillar array is partitioned into 2 or more display regions 50 by an insulating filler 60 filled in a gap between some of the LED pillars 40, each display region 50 includes no less than 2 LED pillars 40, the gap of the LED pillars 40 in each display region 50 is filled with a corresponding light emitting material 70, so that each display region 50 emits light of different colors, the conductive layer is provided with a partition groove 34 corresponding to the insulating filler 60, the partition grooves 34 are used to make the conductive layers (i.e. the first N-type layers 31) of each display region 50 not connected with each other, each display region 50 also includes an N-electrode 90 electrically connected to the conductive layer of each display region 50, the N-electrode 90 providing power to all of the LED pillars 40 within the display region 50, thereby enabling each display region 50 to be driven individually to emit light.

The present invention can form large-scale LED columns 40 in batch by providing a conductive layer and an LED column array formed on the conductive layer and composed of a plurality of LED columns 40; by filling the luminescent material 70 in the gap between the LED pillars 40, on one hand, a mask with extremely high precision is not needed during filling, thereby avoiding the process difficulty and the process cost increase caused by too small size, and on the other hand, compared with the luminescent material 70 arranged above the LED in the prior art, the luminescent material 70 of the present invention has a larger contact area with the LED pillars 40, thereby improving the conversion efficiency of photoluminescence; by dividing the different display regions 50, the light emitting materials 70 of each display region 50 can be filled in batches, and the process difficulty caused by too small size is avoided due to the large size of each display region 50; by arranging the insulating filler 60 and the spacing grooves 34 on the conductive layer (i.e., the first N-type layer 31), each display region 50 is electrically isolated, so that the input current of each display region 50 can be independently controlled, and full-color display is realized; by providing the N-electrode 90 electrically connected to the conductive layer (i.e., the first N-type layer 31) of each display region 50, the N-electrode 90 can supply power to all the LED pillars 40 in the display region 50, and the difficulty in patterning due to the provision of the N-electrode 90 for each LED pillar 40 is avoided because the area of each display region 50 is large. In conclusion, the utility model can prepare the LED chip structure with tiny size, higher resolution, more bright color and low power consumption, and the preparation process can overcome the process difficulty caused by tiny size.

In each embodiment, the LED pillar array may be a regular array, such as N rows, M columns, or concentric circles, or may be an irregular array, preferably a regular array, which is beneficial to uniform distribution of the LED pillars 40 in each display area 50 and can provide uniform light emitting color.

In various embodiments, the conductive layer may be any conductive material, and in the present invention, in order to simplify the process and reduce the interface effect between the N-electrode and the LED pillar, it is preferable that the material of the conductive layer is the same as the material of the N-type layer of the LED pillar.

Referring to fig. 8, in an embodiment, the LED display further includes a P-electrode 80, and the P-electrode 80 is electrically connected to the P-type layers 42 of all the LED pillars 40 of all the display regions 50, that is, the P-electrode 80 is common to all the display regions 50, which is beneficial to batch preparation of the P-electrode 80 and simplification of the preparation process of the P-electrode 80, and the P-electrode 80 may be any P-electrode structure in the prior art.

Referring to fig. 8, further, in an embodiment, the P-electrode 80 includes a metal layer 81 stacked on all the LED pillars 40 of all the display regions 50, the insulating filler 60, and the light emitting material 70, and a conductive substrate 82 bonded to the metal layer 81, the metal layer 81 is electrically connected to the P-type layers 42 of all the LED pillars 40 of all the display regions 50, and the conductive substrate 82 can provide heat dissipation for the metal layer 81, improve current uniformity, reduce internal resistance, and improve heat dissipation and low power consumption of the whole device.

Further, in one embodiment, the conductive substrate 82 may be a silicon substrate or a copper substrate.

Referring to fig. 5 and 6, the surface of the conductive layer (i.e., the first N-type layer 31) on the side away from the LED pillar 40 is the light exit surface 33, and in order to improve the light extraction efficiency of the light exit surface 33, in one embodiment, the light exit surface 33 is preferably provided as a roughened surface.

Referring to fig. 8, in an embodiment, the display device further includes a passivation layer 35 covering the light emitting surface 33 and filling the spacing groove 34, the passivation layer 35 filling the spacing groove 34 prevents the conductive layers of the display regions 50 from being electrically connected to each other, and the passivation of the light emitting surface 33 and the filling of the spacing groove 34 are implemented through one process step, so that the manufacturing process is optimized, and the cost is saved. Of course, the spacer 34 may be filled with other materials than the passivation layer 35.

Further, in one embodiment, the passivation layer 35 is preferably a transparent insulating material that does not affect light extraction. Specifically, the passivation layer 35 may be silicon dioxide, silicon nitride, or the like.

Referring to fig. 8 and 9, the N electrode 90 is disposed on each display area 50, and since the display area 50 includes a plurality of LED columns 40, the size of the N electrode 90 is not necessarily too small, which reduces the difficulty of the process. The number of the N electrodes 90 per display area 50 is at least 1, and when the number of the N electrodes 90 is plural, the N electrodes 90 are uniformly or symmetrically distributed, for example, the number of the N electrodes 90 may be 1, 2, or 2 or more, and when the number of the N electrodes 90 is 2 or more, the plurality of electrodes may be symmetrically distributed about a central axis or a symmetry axis of the display area 50, may be uniformly distributed about a central axis of the display area 50, or may be uniformly distributed on the display area 50, and since the N electrodes 90 supply power to all the LED columns 40 in the display area 50, the N electrodes 90 are uniformly or symmetrically distributed, uniformity of current distributed to the respective LED columns 40 may be improved.

Referring to fig. 9, in the present embodiment, the number of N electrodes 90 is 2, which are respectively disposed at both ends of the display region 50.

In one embodiment, the insulating filler 60 is a transparent insulating filler, and in particular, the material of the insulating filler 60 may be silicon dioxide or silicon nitride, which also has the function of passivating the sidewalls of the LED pillar 40.

Of course, the insulating filler 60 may be an air layer, and the air layer also has an insulating effect.

Or the insulating filler 60 may also be opaque insulating filler or reflective insulating filler, so as to prevent crosstalk between different colors of light in adjacent display regions.

Specifically, in one embodiment, the material of the opaque insulating filler may be an opaque resin material or the like.

In a specific embodiment, the reflective insulating filler comprises a metal reflective main body and a light-transmitting insulating layer covering the side surfaces and the bottom surface of the metal reflective main body, the light-transmitting insulating layer is in contact with the side walls of the LED columns and the bottoms of the gaps between the adjacent LED columns, so that the LED columns and the metal reflective main body can be electrically insulated, and the metal reflective main body reflects light back to each color block again, thereby avoiding the phenomenon of light crosstalk between different colors of the adjacent color blocks and mutual influence.

The metal light reflecting main body can be made of aluminum, gold and the like, and the light transmitting insulating layer can be made of silicon dioxide, silicon nitride and the like.

The preparation method of the reflective insulation filler can be as follows: a light-transmitting insulating layer is formed on the bottom of a gap between partial LED columns of a provided substrate and the side walls of the LED columns, and then a metal light-reflecting main body is continuously formed on the light-transmitting insulating layer to fill the gap between the LED columns, so that light-reflecting insulating filler filled in the gap between the partial LED columns is formed. The method of forming the light-transmitting insulating layer may be a sputtering method or a deposition method, and the method of forming the metal light-reflecting body may also be a sputtering method or a deposition method.

In a specific embodiment, the diameter of the LED pillar 40 may be 1000nm to 1nm, and the distance between adjacent LED pillars 40 is 10000nm to 100nm, preferably, the diameter of the LED pillar 40 may be 1000nm to 10nm, and the distance between adjacent LED pillars 40 is 1000nm to 100nm, in which case, the LED pillar 40 is an LED nanopillar, and the smaller the diameter of the LED pillar 40 is, the smaller the distance between adjacent LED pillars 40 is, the smaller the size of the manufactured single LED is, and the higher the resolution of the device is.

In a specific embodiment, the luminescent material 70 may be a fluorescent material, a quantum dot material, a transparent material, or the like, and of course, when the luminescent material 70 is a transparent material, the transparent material may be air, that is, an air layer is substituted at the position of the transparent material. For a small size NanoLED, the luminescent material 70 may be a nano-sized quantum dot material, and for a large size MicroLED, the luminescent material 70 may be a micro-sized fluorescent material. Of course, the fluorescent material can also be prepared into a nano size for the preparation of the NanoLED.

In a specific embodiment, the full LED chip structure is obtained by: the LED columns 40 are blue LED columns, the number of the display regions 50 is 3, and the light emitting materials 70 of each display region 50 are a red light emitting material, a green light emitting material, and a transparent material, respectively. In this embodiment, the blue LED pillar can emit blue light, which may be a GaN semiconductor material, for example, including an N-GaN N-type layer, an InGaN/GaN blue light multi-quantum hydrazine active layer, and a P-GaN P-type layer stacked in sequence on the conductive layer, one display region 50 is a blue LED pillar combined with a red light emitting material to obtain a blue light and red light combined light, one display region 50 is a blue LED pillar combined with a green light emitting material to obtain a blue light and green light combined light, one display region 50 is a blue LED pillar combined with a transparent material, blue light emitted by the blue LED pillar is transmitted through the transparent material to mainly obtain light, and input currents of the three display regions 50 are separately controlled, so that RGB full-color display can be realized. For each display area 50, as the compound light is adopted, the color of the light can be richer, and the colorful degree of the device is improved.

Of course, in other embodiments, two display areas 50 or more than 3 display areas 50 may be included. Of course, the LED pillar 40 may emit other colors of light, such as white light, and other semiconductor materials.

In one embodiment, the transparent light emitting material may be silicon dioxide, silicon nitride, or the like.

In order to further simplify the process, the material of the insulating filler 60 and the transparent material may be the same, and thus, the process of filling the transparent material in one display region 50 and the process of filling the insulating filler 60 may be combined in one process. Therefore, the method not only realizes RGB full-color display, but also simplifies the process and reduces the production cost.

In a specific embodiment, the LED pillar 40 further includes a current spreading layer 43 laminated to a side of the P-type layer 42 away from the N-type layer, and the current spreading layer 43 can improve current spreading between the LED pillar 40 and the P-electrode 80, reduce internal resistance, and improve device performance.

The LED chip structure of each of the above embodiments may be a flip chip structure, or may be a vertical chip structure, where the flip chip structure is the same side as the P electrode 80 and the N electrode 90, the vertical chip structure is different sides of the P electrode 80 and the N electrode 90, and the N electrode 90 of the vertical chip structure is disposed on the side of the conductive layer (i.e., the first N-type layer 31) away from the LED pillar 40.

Taking the preparation of the vertical chip structure as an example, the following preparation method of the LED chip structure is provided, and comprises the following steps:

step S1: a base plate is provided, which includes a substrate 10, a conductive layer (i.e., a first N-type layer 31) laminated to the substrate 10, and an LED pillar array formed on the conductive layer (i.e., the first N-type layer 31) and composed of a plurality of LED pillars 40, the LED pillars 40 including an N-type layer (i.e., a second N-type layer 32), an active layer 41, and a P-type layer 42 laminated in this order to the conductive layer (i.e., the first N-type layer 31).

In this step, the LED pillars 40 may be sequentially deposited on the conductive layer (i.e., the first N-type layer 31) by a bottom-up deposition method, or may be formed by a top-down etching method, preferably, the etching method is adopted to form an LED pillar array with a regular shape and a regular distribution, which is beneficial to the uniform distribution of the LED pillars 40 in each display region 50, and can provide a uniform light emitting color.

In one embodiment, the method for preparing a substrate comprises the steps of:

step S11: an epitaxial wafer is provided, which includes a substrate 10, an N-type layer 30, an active layer 41, and a P-type layer 42, which are sequentially stacked. The epitaxial wafer may also include other functional layer structures, for example, a buffer layer 20 may be further disposed between the substrate 10 and the N-type layer 30 to reduce various defects in epitaxial growth, and a current spreading layer 43 may be further disposed outside the P-type layer 42 to improve uniformity of current spreading between the P-type layer 42 and the P-electrode 80, reduce internal resistance loss, and the like.

Referring to fig. 1, in the present embodiment, an epitaxial wafer includes a substrate 10, a buffer layer 20, an N-type layer 30 of N-GaN, an active layer 41 of InGaN/GaN blue light multi-quantum hydrazine, a P-type layer 42 of P-GaN, and a current spreading layer 43, which are sequentially stacked, and the N-type layer 30 of N-GaN, the active layer 41 of InGaN/GaN blue light multi-quantum hydrazine, and the P-type layer 42 of P-GaN constitute an epitaxial material of a blue LED.

Step S12: and forming a patterned mask layer on the P-type layer 42 of the epitaxial wafer, and etching the epitaxial wafer by using the patterned mask layer as a mask until the substrate is inside the N-type layer 30 to obtain the substrate.

In the preparation method, the conducting layer and the N-type layer are made of the same material.

In the present embodiment, a hard thin film layer, which may be, for example, silicon dioxide or silicon nitride, is deposited on the upper surface of the current spreading layer 43, a patterned mask layer is prepared on the upper surface of the hard thin film layer, the hard thin film layer and the current spreading layer 43 are etched using the patterned mask layer as a mask, and then the epitaxial wafer is etched using the current spreading layer 43 as a mask until reaching the inside of the N-type layer 30, so as to obtain an LED pillar array structure including a plurality of LED pillars 40, as shown in fig. 2. The arrangement of the hard thin film layer can improve the pattern transfer accuracy to enable the nano-sized LED pillar 40 to be obtained.

Step 13: in the embodiment, the method further includes a step of passivating the side wall of the LED pillar 40, specifically, the LED pillar 40 is placed in a KOH solution of 1mol/L at 80 ℃ to be soaked for 5min to 10min, and after a side wall damage layer is removed, the LED pillar is cleaned by an HCl solution.

Step S2: referring to fig. 3, an insulating filler 60 is filled in a gap between some of the LED pillars 40 to be spaced into different display regions 50, each display region 50 including a plurality of LED pillars 40.

Step S3: the gaps of the LED columns 40 in each display region 50 are filled with the corresponding light emitting material 70.

The order of filling the insulating filler 60 and the light emitting material 70 filling each display region 50 may be arbitrarily adjusted.

In the present embodiment, the number of the display regions 50 is 3, and the light emitting materials 70 are a red quantum dot material, a green quantum dot material, and a transparent material, respectively.

In order to optimize the manufacturing process, the transparent material is provided as the same material as the insulating filler 60, and the filling of the transparent material and the preparation of the insulating filler 60 are performed in one process.

Silicon nitride or silicon dioxide is a preferable material for the transparent material and the insulating filler 60 because it is an insulating material and also a transparent material.

In this embodiment, the red light quantum dot material, the green light quantum dot material, and the transparent material of silicon nitride or silicon dioxide are sequentially filled, and the transparent material is filled at the position of the corresponding luminescent material 70 and also at the position of the insulating filler 60.

Step S4: referring to fig. 4, a P-electrode 80 is formed, and the P-electrode 80 is electrically connected to the P-type layers 42 of all the LED pillars 40 of all the display regions 50.

Referring to fig. 4, in the present embodiment, the P-electrode 80 includes a metal layer 81 laminated to all the LED pillars 40 of all the display regions 50, the insulating filler 60, and the light emitting material 70, and a conductive substrate 82 bonded to the metal layer 81, the metal layer 81 is electrically connected to the P-type layers 42 of all the LED pillars 40 of all the display regions 50, and specifically, the forming process of the P-electrode 80 includes the following steps:

step S41: the metal layer 81 may be formed by depositing a metal layer 81 having a reflection function by electron beam evaporation, the metal layer 81 may have a single-layer structure, or may be formed by sequentially stacking two or more layers, and the material of each metal layer 81 may be Ni, Ag, Ti, Al, Au, or the like, for example, a Ni/Ag composite layer, a Ti/Al/Ti/Au composite layer, or the like.

Step S42: the conductive substrate 82 is bonded with the metal layer 81, and the conductive substrate 82 is a Si substrate or a Cu substrate, so that the heat dissipation performance is good, and the heat dissipation performance of the chip is improved.

Step S5: referring to fig. 5, the substrate 10 is removed, exposing the first N-type layer 31.

Referring to fig. 5, in the present embodiment, the substrate 10 and the buffer layer 20 are removed to expose the first N-type layer 31, and the substrate 10 and the buffer layer 20 may be removed by laser lift-off, mechanical polishing, chemical etching, or a combination thereof.

Step S6: referring to fig. 6, the exposed surface of the first N-type layer 31 is the light-emitting surface 33, and the light-emitting surface 33 is roughened, so that the light-emitting surface 33 forms a hexagonal cone shape, thereby reducing total reflection of light and improving light extraction efficiency.

In the embodiment, the hot KOH solution is used to roughen the N-type layer surface of the N-GaN layer, so that the light emitting surface 33 forms a hexagonal cone shape, thereby reducing total reflection of light and improving light extraction efficiency.

Step S7: referring to fig. 6, a spacer groove 34 is formed at a position of the conductive layer (i.e., the first N-type layer 31) corresponding to the position of the insulating filler 60, and the spacer groove 34 is used to make the conductive layers (i.e., the first N-type layer 31) of the respective display regions 50 not connected to each other. The spacer grooves 34 may be fabricated by wet etching, dry etching, dicing with a dicing saw, or the like.

Step S8: referring to fig. 7, a passivation layer 35 is formed on the roughened surface and in the spacing groove 34, and the passivation layer 35 in the spacing groove 34 prevents the conductive layers (i.e., the first N-type layer 31) of the display regions 50 from being electrically connected to each other.

The passivation layer 35 may be made of silicon dioxide, silicon nitride, aluminum oxide, or the like, and the passivation layer 35 may be formed by using a PECVD (plasma enhanced chemical vapor deposition) or ALD (atomic layer deposition) method.

Step S9: referring to fig. 8, preparing the N-electrode 90 electrically connected to the conductive layer (i.e., the first N-type layer 31) of each display region 50 specifically includes the steps of:

step S91: openings are made in the passivation layer 35 to expose the conductive layer (i.e., the first N-type layer 31) for deposition of the N-electrode 90.

In this embodiment, an adhesive and an electron beam resist are sequentially spin-coated on the passivation layer 35, and the adhesive improves the bonding strength between the electron beam resist and the passivation layer 35, thereby facilitating the improvement of the lithography precision. Then, the photoresist layer is exposed and developed to form a patterned photoresist layer, and the passivation layer 35 is etched using the patterned photoresist layer as a mask to expose the conductive layer (i.e., the first N-type layer 31).

Then etching is carried out by adopting an RIE (reactive ion etching) method, Ar ions are utilized to bombard the N-GaN surface, the Ga-N bonds are broken, and N vacancies (donors) are formed, so that the carrier concentration in the N-GaN layer is increased, and the ohmic contact performance of the N electrode 90 is improved. Specifically, the device is placed into an RIE reaction chamber, and bombarded for 5min-10min under the power of 100W, so that the hole opening is completed.

Step S92: an N electrode 90 is formed.

The N-electrode 90 may be formed at the opening by evaporation using an electron beam evaporation technique. In this embodiment, the N electrode 90 is a Cr/Pt/Au composite layer.

The utility model also discloses a display module comprising the LED chip structure or the LED chip structure prepared by the preparation method. The display module can be applied to mobile phones, flat panels, notebook computers, televisions, AR/VR equipment, vehicle instruments, central control, outdoor displays, head-up displays (HUDs) and other products.

The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the claims. For example, each color block is not limited to the 4 LED columns disclosed in the drawings of the specification, and may be set according to actual conditions, and this embodiment is not specifically limited. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims

1. An LED chip structure is characterized by comprising a conductive layer and an LED column array formed on the conductive layer and composed of a plurality of LED columns, wherein the LED columns comprise an N-type layer, an active layer and a P-type layer which are sequentially laminated to the conductive layer, the LED column array is divided into 2 or more than 2 display areas by insulating fillers filled in gaps among partial LED columns, each display area comprises not less than 2 LED columns, and corresponding luminescent materials are filled in the gaps of the LED columns in each display area, so that each display area respectively emits light with different colors;

the conducting layer is provided with spacing grooves corresponding to the positions of the insulating fillers, the spacing grooves are used for enabling the conducting layers of the display regions to be disconnected with each other, and each display region further comprises an N electrode electrically connected with the conducting layers of the display regions;

2. The LED chip structure of claim 1, further comprising a passivation layer covering a surface of the conductive layer facing away from the LED pillar and filling the spacing groove, wherein the passivation layer filling the spacing groove electrically disconnects the conductive layers of each display region from each other.

3. The LED chip structure of claim 1, wherein the number of N electrodes is at least 1, and when the number of N electrodes is plural, the N electrodes are uniformly or symmetrically distributed.

4. The LED chip structure of claim 1, wherein the LED pillar is a blue LED pillar, the number of the display regions is 3, and the light emitting material of each display region is a red light emitting material, a green light emitting material, and a transparent material.

5. The LED chip structure of claim 4, wherein the insulating filler is a transparent insulating filler, the material of the transparent insulating filler is silicon nitride or silicon dioxide, and the transparent material is silicon nitride or silicon dioxide;

or the insulating filler is opaque insulating filler or reflective insulating filler, and the transparent material is silicon nitride or silicon dioxide.

6. The LED chip structure of claim 1, wherein the diameter of the LED pillars is 1nm to 1000nm, and the distance between adjacent LED pillars is 100nm to 10000 nm;

the luminescent material is a fluorescent material, a quantum dot material or a transparent material.

7. The LED chip structure of claim 1, wherein the LED pillar further comprises a current spreading layer laminated to a side of the P-type layer facing away from the N-type layer;

the conducting layer and the N-type layer are made of the same material.

8. The LED chip structure according to claim 1, wherein the P-electrode comprises a metal layer laminated over all the LED pillars, the insulating filler, and the light emitting material and a conductive substrate bonded to the metal layer, the metal layer being electrically connected to the P-type layers of all the LED pillars.

9. The LED chip structure according to any one of claims 1 to 8, wherein the LED chip structure is a flip chip structure or a vertical chip structure.

10. A display module comprising the LED chip structure according to any one of claims 1 to 9.