CN209929308U

CN209929308U - Display panel

Info

Publication number: CN209929308U
Application number: CN201921062259.3U
Authority: CN
Inventors: 杜晓松; 杨小龙; 周文斌; 张峰; 孙剑; 高裕弟
Original assignee: Kunshan Mengxian Electronic Technology Co Ltd
Current assignee: Kunshan Mengxian Electronic Technology Co Ltd
Priority date: 2019-07-09
Filing date: 2019-07-09
Publication date: 2020-01-10
Anticipated expiration: 2029-07-09

Abstract

The utility model provides a display panel, be in including drive backplate and setting pixel array on the drive backplate, pixel array includes metal bonding array, luminous array and metal level, metal bonding array sets up on the drive backplate, luminous array sets up metal bonding array keeps away from one side of drive backplate, luminous array includes the multiple quantum well layer, the metal level sets up luminous array is kept away from one side of metal bonding array, display panel is still including setting up metal level top and corresponding at least part the light filter of luminous array to form polychrome demonstration. The utility model discloses a display panel has broken through the high accuracy metal mask plate's of high pixel density physical limit, can realize 2000 and higher pixel density's demonstration.

Description

Display panel

Technical Field

The utility model relates to a display panel especially relates to a display panel of high pixel density.

Background

The existing OLED display screen mostly adopts evaporation of different OLED materials to realize OLED patterning, which is not problematic when the pixel density is lower than 700, but when the pixel density is higher than 800, the existing manufacturing technology will enter into a physical bottleneck.

Therefore, it is a technical problem to be solved urgently to realize a multi-color display with high pixel density.

SUMMERY OF THE UTILITY MODEL

An object of the utility model is to provide a display panel, it forms the light filter in the at least part position that corresponds the pixel array, can realize high resolution display panel's polychrome demonstration.

In order to realize the above object, the utility model provides a display panel, be in including drive backplate and setting pixel array on the drive backplate, pixel array includes metal bonding array, luminous array and metal level, metal bonding array sets up on the drive backplate, luminous array sets up metal bonding array keeps away from one side of drive backplate, luminous array includes the multiple quantum well layer, the metal level sets up luminous array is kept away from one side of metal bonding array, display panel is still including setting up the metal level top corresponds at least part the light filter of luminous array to form polychrome demonstration.

As a further improvement of the present invention, the light emitting array includes a first semiconductor layer and a second semiconductor layer respectively located on both sides of the multiple quantum well layer, the first semiconductor layer is electrically connected to the metal layer, the second semiconductor layer is electrically connected to the metal bonding array.

As a further improvement of the present invention, the first semiconductor layer is an N-type semiconductor layer, and the second semiconductor layer is a P-type semiconductor layer.

As a further improvement of the present invention, the optical filter includes a red filter for emitting red light and a green filter for emitting green light.

As a further improvement of the present invention, the display panel further includes a thin film encapsulation layer, the thin film encapsulation layer completely covers the pixel array, the optical filter is disposed outside the thin film encapsulation layer.

As a further improvement of the present invention, the display panel further includes a black matrix layer formed on the outer side of the top of the thin film encapsulation layer, and the optical filter is located on the same layer as the black matrix layer.

As a further improvement of the present invention, the display panel further comprises a glass cover plate, the glass cover plate is packaged at the top of the optical filter and completely covers the pixel array.

As a further improvement of the present invention, the driving circuit array is disposed on the driving backboard to be electrically connected to the corresponding pixel array, and the pixel array provides the driving voltage.

As a further improvement of the present invention, the display panel further includes an insulating layer formed outside the light emitting array and the metal bonding array, and the insulating layer covers the light emitting array and the metal bonding array, the metal layer is formed outside the insulating layer.

As a further improvement of the present invention, the thickness of the metal layer is 10 nm.

The utility model has the advantages that: the utility model discloses a display panel forms the light filter through the at least partial position that corresponds light emitting array in the metal level top to make this display panel form polychrome demonstration, further adopt yellow light, etching process to realize the display panel graphics of high pixel, broken through the high accuracy metal mask plate's of high pixel density physical limit, can realize 2000 and the demonstration of higher pixel density.

Drawings

Fig. 1 is a schematic diagram of a display panel according to the present invention before bonding a driving back plate and a light-emitting substrate.

Fig. 2 is a schematic diagram of the display panel shown in fig. 1 after bonding of the driving backplane and the light-emitting substrate.

Fig. 3 is a schematic view of the light emitting base plate of fig. 2 with the substrate removed.

Fig. 4 is a schematic view of forming a photoresist layer on the display panel shown in fig. 3.

Fig. 5 is a schematic diagram of a light emitting array and a metal bonding array arranged correspondingly on the display panel shown in fig. 4.

Fig. 6 is a schematic view illustrating an insulating layer formed on a metal bonding array corresponding to a light emitting array of the display panel shown in fig. 5.

Fig. 7 is a schematic view of forming an opening on an insulating layer of the display panel shown in fig. 6.

Fig. 8 is a schematic view of forming a metal layer on an insulating layer of the display panel shown in fig. 7.

Fig. 9 is a schematic view of forming a thin film encapsulation layer on the display panel shown in fig. 8.

Fig. 10 is a schematic diagram illustrating a filter and a black matrix layer formed on top of a thin film encapsulation layer of the display panel shown in fig. 9.

FIG. 11 is a schematic view of a cover glass plate encapsulating the filter and black matrix layers shown in FIG. 10.

Detailed Description

In order to make the purpose, technical solution and effect of the present application clearer and clearer, the present application is further described in detail below with reference to the accompanying drawings and examples.

Referring to fig. 1 to 11, the present application provides a method for manufacturing a display panel 100, where the following method steps are a preferred embodiment of the method for manufacturing the display panel 100, and in this embodiment, the method for manufacturing the display panel 100 mainly includes the following steps:

a driving backplane 10 and a light emitting substrate 20 are provided. The driving backplane 10 includes a driving circuit array 101, a first bonding metal layer 31 is disposed on the driving backplane 10, and a second bonding metal layer 32 is disposed on the light-emitting substrate 20. Specifically, the Light-Emitting substrate 20 used in the present application is based on Micro Light Emitting Diode (Micro-LED) technology, and adopts a Multi Quantum Well (MQW) structure to emit Light, which has the advantages of high brightness, high response speed, low power consumption, long service life, and the like.

And carrying out metal bonding on the first bonding metal layer 31 of the driving back plate 10 and the second bonding metal layer 32 of the light-emitting substrate 20 to form a metal bonding layer 30. The thicknesses of the first bonding metal layer 31 and the second bonding metal layer 32 are the same or different, and the thickness of the metal bonding layer 30 formed after bonding may be two times or three times the thickness of one of the first bonding metal layer 31 or the second bonding metal layer 32. The utility model discloses choose for use the mode of metallic bond to connect drive backplate 10 with luminescent substrate 20 compares the current technique of having done earlier Micro-LED device and shifting to on the drive backplate again, has avoided the counterpoint precision scheduling problem in shifting in batches.

Patterning the light-emitting substrate 20 and the metal bonding layer 30 to form a desired pixel array 210 and a metal bonding array 301 corresponding to the pixel array 210, wherein the metal bonding array 301 can serve as an anode. Wherein the light emitting substrate 20 and the metal bonding layer 30 may be patterned using yellow light and an etching process to form a desired pixel array 210. Compared with the existing scheme of realizing OLED imaging by using a mask plate and adopting an evaporation process, the method can realize Pixels with smaller size, and can improve the pixel density (Pixel Per Inc, PPI) under the condition that the sizes of the display panels are the same.

A metal layer 40 is formed on the pixel array 210, and the metal layer 40 may serve as a cathode.

A filter 50 is formed over the metal layer 40 corresponding to at least a portion of the pixel array 210 to form a multi-color display. Wherein, the light emitted from the light-emitting substrate 20 passes through the optical filter 50 and then emits light of different colors, thereby realizing multicolor display. Specifically, the filter 50 of this embodiment includes a red filter 51 capable of emitting red light R and a green filter 52 capable of emitting green light G, and the light-emitting substrate 20 can directly emit blue light B, so that the display panel 100 has RGB three-color display.

The following describes the manufacturing method and structure of the display panel 100 in detail.

Referring to fig. 1, the driving backplane 10 is provided with a driving circuit array 101 corresponding to the pixel array 210, and is used for being electrically connected to the corresponding pixel array 210 to provide a driving voltage for the pixel array 210, so as to control the light emission of the pixel array 210. The driving backplate 10 may be a flexible backplate or a rigid backplate, which is not limited herein.

The driving backplate 10 has a first bonding metal layer 31 formed thereon. The material of the first bonding metal layer 31 may be gold (Au), copper (Cu), Gallium (GA), nickel (Ni), or an alloy of these metals, such as a nickel-gold alloy. The thickness of the first bonding metal layer 31 is 800-1200 nm. The first bonding metal layer 31 may be formed by deposition or evaporation, and specifically, the deposition may be Atomic Layer Deposition (ALD), Chemical Vapor Deposition (CVD), Physical Vapor Deposition (PVD), or other suitable methods.

The light-emitting substrate 20 includes a substrate 21 and a light-emitting layer 22 disposed on the substrate 21, and the second bonding metal layer 32 is disposed on the other side of the light-emitting layer 22 opposite to the substrate 21. The light emitting layer 22 includes a first semiconductor layer 220 disposed on the substrate 21, a multiple quantum well layer 221 disposed on the first semiconductor layer 220, and a second semiconductor layer 222 disposed on the multiple quantum well layer 221 in this order. The second semiconductor layer 222 is electrically connected to the second bonding metal layer 32.

In the present embodiment, the first semiconductor layer 220 is an N-type semiconductor layer, and the second semiconductor layer 222 is a P-type semiconductor layer. In various embodiments, the semiconductor material may be selected from different semiconductor materials, such as N-type gallium nitride (GaN), P-type gallium nitride (GaN), N-type aluminum (Al) -doped gallium nitride (AlGaN), P-type magnesium (Mg) -doped gallium nitride, N-type silicon (Si) -doped gallium nitride, and the like. The mqw layer 221 may be a gallium nitride quantum well layer composed of indium gallium nitride/gallium nitride (InGaN/GaN) layers repeatedly arranged in sequence. In other embodiments, the materials of the first semiconductor layer 220, the second semiconductor layer 222 and the mqw layer 221 may also be set according to actual requirements of the display panel, and are not limited herein.

The P-type second semiconductor layer 222, the multiple quantum well layer 221 and the N-type first semiconductor layer 220 form a light-emitting PN junction, and the light-emitting PN junction can be electrically connected to a driving circuit by electrically connecting the second semiconductor layer 222 and the first semiconductor layer 220 with electrodes on both sides, so that voltage can be applied to the light-emitting PN junction through the driving circuit. When the driving circuit applies a voltage to the light emitting PN junction, electrons are generated in the N-type first semiconductor layer 220 and injected into the multiple quantum well layer 221, and holes are generated in the P-type second semiconductor layer 222 and injected into the multiple quantum well layer 221; subsequently, in the mqw layer 221, the electrons and the holes recombine to emit photons, and conversion of electric energy into optical energy is completed, so that light emission of the light emitting layer 22 is realized.

Because the gallium nitride-based material is difficult to directly grow on the glass substrate, the substrate 21 is generally a sapphire substrate, and because sapphire has good stability and high mechanical strength, the gallium nitride-based material can be applied to a high-temperature growth process, and crystals with good crystal quality can be obtained when crystals are epitaxially grown on the sapphire substrate; and the production technology of the sapphire substrate is mature, the device quality is good, and the processing and cleaning are easy. Of course, in other embodiments, a silicon-based substrate (such as a silicon carbide (SiC) substrate or a silicon (Si) substrate) or a gallium nitride (GaN) substrate, etc. may be selected, and other usable substrate materials may also be used, which are not limited herein.

The second bonding metal layer 32 and the first bonding metal layer 31 may be the same or different in material and thickness, and preferably, the second bonding metal layer 32 and the first bonding metal layer 31 are the same in material, so that the bonding strength between the second bonding metal layer 32 and the first bonding metal layer 31 can be enhanced, interlayer separation is prevented, and the stability of the device is improved. Similarly, the second bonding metal layer 32 may also be formed by deposition or evaporation, which is specifically referred to the description of the above embodiments and is not repeated herein.

Referring to fig. 1 and fig. 2, the first bonding metal layer 31 of the driving backplane 10 is attached to the second bonding metal layer 32 of the light-emitting substrate 20, and the first bonding metal layer 31 and the second bonding metal layer 32 are bonded together under the action of a predetermined temperature and pressure to form the metal bonding layer 30.

Fig. 3 is a schematic diagram illustrating the substrate 21 of the light-emitting substrate 20 being removed. When the substrate 21 of the light emitting substrate 20 is removed, the substrate 21 may be peeled off by, for example, laser peeling, but the substrate 21 may be peeled off by other methods, which is not limited herein.

Referring to fig. 4 and 5, fig. 4 is a schematic diagram illustrating the light-emitting substrate 20 after the substrate 21 is removed and a photoresist layer 223 is formed on the first semiconductor layer 220, and fig. 5 is a schematic diagram illustrating the light-emitting substrate 20 is further patterned by a photolithography process. Specifically, a photoresist layer 223 is formed on the first semiconductor layer 220, and then exposed and developed to obtain the photoresist layer pattern, wherein the photoresist layer pattern corresponds to the arrangement manner of the pixel array 210. And then, etching the light-emitting substrate 20 and the metal bonding layer 30 by using the patterned photoresist layer 223 as a mask to form a light-emitting array 201 and a correspondingly arranged metal bonding array 301, wherein the metal bonding array 301 can be used as an anode. Specifically, the light-emitting substrate 20 and the metal bonding layer 30 may be etched by Reactive Ion Etching (RIE), and during Etching, the positioning may be performed by using a self-alignment principle. Of course, in other embodiments, other etching methods may be selected.

Referring to fig. 6, an insulating layer 224 is formed over the light emitting array 201 and the corresponding metal bonding array 301. The insulating layer 224 covers the light emitting array 201 and the metal bonding array 301, and the insulating layer 224 may be formed by Atomic Layer Deposition (ALD), Chemical Vapor Deposition (CVD), Physical Vapor Deposition (PVD), or the like. The material of the insulating layer 224 may be an inorganic material, and the inorganic material may be one or more of the following materials: al2O3, TiO2, ZrO2, MgO, HFO2, Ta2O5, Si3N4, AlN, SiN, SiNO, SiO2, SiC, SiCNx, ITO, IZO and the like.

Referring to fig. 7, an opening 225 is formed in the insulating layer 224. preferably, the opening 225 is formed in the insulating layer 224 by the yellow light process and RIE method. The specific method is similar to the above and is not described herein again.

Referring to fig. 8, a metal layer 40 is formed on the insulating layer 224, wherein the metal layer 40 has a thickness of 10nm and can be formed by Atomic Layer Deposition (ALD), Chemical Vapor Deposition (CVD), or Physical Vapor Deposition (PVD). The material of the metal layer 40 may be aluminum (Al), silver (Ag), or the like, and the metal layer 40 may serve as a cathode.

In this embodiment, the patterning of the pixel array 210 is realized by using a yellow light and etching process, so that pixels with smaller size can be manufactured. In this way, the width of the patterned metal bonding layer 30 can be as narrow as 5 μm, the obtained pixel pitch is 24 μm, and the sub-pixel pitch is 8 μm, so as to obtain a display panel with a PPI as high as 3000. The conventional method for realizing OLED imaging by evaporating different OLED materials can only achieve 700-800 PPI. This is because a high-precision Metal Mask (FMM) is required to be used when the OLED material is evaporated, but the FMM has a physical limit, and the minimum opening distance can only be 10 to 15 μm. And the utility model discloses when utilizing the graphical pixel array of yellow light technology, the nanometer rank can be accomplished to the interval between the figure, through this method, can make high PPI's display panel under the certain circumstances of display panel size.

Fig. 9 is a schematic diagram illustrating the formation of a thin film encapsulation layer 60. The thin film encapsulation layer 60 may be formed to completely cover the pixel array 210 to block moisture and oxygen and protect the pixel array 210. The film encapsulation layer 60 generally comprises an organic encapsulation layer and an inorganic encapsulation layer, and the inorganic encapsulation layer has good barrier property to water vapor and oxygen; the existence of the organic packaging layer can ensure that the surface flatness of the device is better, which is beneficial to the formation of a subsequent inorganic packaging layer, and meanwhile, the bending resistance of the organic packaging layer is better.

Referring to fig. 10, a filter 50 and a Black Matrix layer 70 (BM) are formed on top of the thin film encapsulation layer 60 by the yellow light process described above. The filter 50 is disposed on the same layer as the black matrix layer 70, and the filter 50 is disposed directly above a portion of the opening 225. The filter 50 includes a red filter 51 capable of emitting red light R and a green filter 52 capable of emitting green light G. In this embodiment, the light emitting color of the mqw layer 221 is blue, so that a light emitting region where the filter 50 is not disposed can directly emit blue light B, and RGB three-color display is realized.

Specifically, the multiple quantum well layer 221 is made of an inorganic material, and there are no problems of short lifetime and poor stability. Especially, the multiple quantum well layer 221 based on gallium nitride (GaN) material, GaN as a wide bandgap semiconductor, has inherent advantages in a blue light emitting part, can achieve a light emitting efficiency of 400lM/w, has high brightness, low power consumption and long service life, and is an optimal blue light emitting material.

Referring to fig. 11, a glass cover plate 80 is further encapsulated on top of the filter 50 and the black matrix layer 70. The glass cover plate 80 is adhesively fixed by coating UV glue 90 on the periphery of the black matrix layer 70 to further protect the pixel array 210.

In the above manner, the manufacturing method of the display panel 100 provided by the present application, in combination with the high resolution driving backplane 10, can realize the manufacturing of the high resolution display panel 100 with the PPI of 2000PPI or above, and in the manufacturing process, yellow light and etching processes are selected to realize the patterning of the pixel array with high PPI, which is not limited by the physical limit of FMM, and at the same time, the red filter 51 and the green filter 52 are formed on the top of the thin film encapsulation layer 60 to realize red and green light emission, thereby realizing RGB three-color display. In addition, the method provided by the application directly bonds the driving back plate 10 and the light-emitting substrate 20, and compared with the prior art that Micro-LED devices are manufactured firstly and then transferred onto the driving back plate, the problems of alignment precision and the like in batch transfer are avoided.

Based on this, this application still provides a display panel 100, display panel 100 includes drive backplate 10 and sets up pixel array 210 on the drive backplate 10, pixel array 210 includes metal bonding array 301, light emitting array 201 and metal layer 40, metal bonding array 301 sets up on the drive backplate 10, light emitting array 201 sets up metal bonding array 301 keeps away from the one side of drive backplate 10, metal layer 40 sets up the one side that metal bonding array 201 kept away from metal bonding array 301. The display panel 100 further includes a filter 50 disposed above the metal layer 40 and corresponding to at least a portion of the light emitting array 201, thereby forming a multi-color display.

The light emitting array 201 comprises a multiple quantum well layer 221, and a first semiconductor layer 220 and a second semiconductor layer 222 which are respectively located on two sides of the multiple quantum well layer 221, wherein the first semiconductor layer 220 is electrically connected with the metal layer 40, and the second semiconductor layer 222 is electrically connected with the metal bonding array 301. The first semiconductor layer 220 is an N-type gallium nitride layer, the second semiconductor layer 222 is a P-type gallium nitride layer, and the multiple quantum well layer 221 is a gallium nitride quantum well layer. The filter 50 includes a red filter 51 capable of emitting red light R and a green filter 52 capable of emitting green light G. The light emission color of the multiple quantum well layer 221 is blue B.

The display panel 100 further includes a thin film encapsulation layer 60, the thin film encapsulation layer 60 completely covers the pixel array 210, and the optical filter 50 is disposed outside the thin film encapsulation layer 60.

The display panel 100 further includes a glass cover plate 80, and the glass cover plate 80 is encapsulated on top of the optical filter 50 by UV glue 90 and completely covers the pixel array 210. For a detailed structure, please refer to fig. 11, and for a detailed structure description, please refer to the description of the above embodiments, which is not repeated herein.

The utility model discloses a display panel 100 has high PPI, and display effect is better, can regard as the display screen of equipment such as AR and VR.

The above description is only an embodiment of the present application, and not intended to limit the scope of the present application, and all modifications of equivalent structures and equivalent processes performed by the content of the present specification and the attached drawings, or directly or indirectly applied to other related technical fields, are also included in the scope of the present invention.

Claims

1. A display panel comprises a driving backboard and a pixel array arranged on the driving backboard, wherein the pixel array comprises a metal bonding array, a light emitting array and a metal layer, the metal bonding array is arranged on the driving backboard, the light emitting array is arranged on one side, away from the driving backboard, of the metal bonding array, the light emitting array comprises a multi-quantum well layer, the metal layer is arranged on one side, away from the metal bonding array, of the light emitting array, and the display panel is characterized in that: the display panel further comprises a filter which is arranged above the metal layer and corresponds to at least part of the light emitting array so as to form multicolor display.

2. The display panel according to claim 1, characterized in that: the light emitting array comprises a first semiconductor layer and a second semiconductor layer which are respectively positioned on two sides of the multiple quantum well layer, the first semiconductor layer is electrically connected with the metal layer, and the second semiconductor layer is electrically connected with the metal bonding array.

3. The display panel according to claim 2, characterized in that: the first semiconductor layer is an N-type semiconductor layer, and the second semiconductor layer is a P-type semiconductor layer.

4. The display panel according to claim 1, characterized in that: the filter comprises a red filter for emitting red light and a green filter for emitting green light.

5. The display panel according to claim 1, characterized in that: the display panel further comprises a thin film packaging layer, the thin film packaging layer completely covers the pixel array, and the optical filter is arranged on the outer side of the thin film packaging layer.

6. The display panel according to claim 5, wherein: the display panel further comprises a black matrix layer formed on the outer side of the top of the thin film packaging layer, and the optical filter and the black matrix layer are located on the same layer.

7. The display panel according to claim 1, characterized in that: the display panel further comprises a glass cover plate which is packaged on the top of the optical filter and completely covers the pixel array.

8. The display panel according to claim 1, characterized in that: and the driving backboard is provided with a driving circuit array so as to be electrically connected with the corresponding pixel array and provide driving voltage for the pixel array.

9. The display panel according to claim 1, characterized in that: the display panel further comprises an insulating layer formed on the outer sides of the light emitting array and the metal bonding array, the insulating layer covers the light emitting array and the metal bonding array, and the metal layer is formed on the outer side of the insulating layer.

10. The display panel according to claim 9, wherein: the thickness of the metal layer is 10 nm.