CN215300149U

CN215300149U - DCDC enabling circuit of multiple protection

Info

Publication number: CN215300149U
Application number: CN202121237419.0U
Authority: CN
Inventors: 吴智声; 杨庆宏; 邓通杭
Original assignee: Fujian Scud Power Technology Co Ltd
Current assignee: Fujian Scud Power Technology Co Ltd
Priority date: 2021-06-03
Filing date: 2021-06-03
Publication date: 2021-12-24
Anticipated expiration: 2031-06-03

Abstract

The utility model discloses a DCDC enabling circuit of multiple protection, including under-voltage closing circuit, excessive pressure clamp circuit, DCDC opening circuit, short-circuit protection trigger circuit, DCDC module, charging switch circuit, singlechip MCU, input Vin, 3.3V power, the utility model discloses possess degree of depth under-voltage closing and short-circuit protection function, degree of depth under-voltage has the advantage of low-power consumption; the utility model has the function of overvoltage clamping; the utility model discloses possess input short-circuit protection function and MCU alarm function, the utility model discloses used high-end MOS pipe Q5, MOS pipe Q6 to carry out the realization of switch and quick charge-discharge, the internal resistance is little, and the overcurrent capacity is big, so the stress of bearing is big, is difficult to damage, damages when MOS pipe Q5, and MOS pipe Q6 also can the retention function. The drive adopts the optical coupling isolation to enable, has improved the security greatly.

Description

DCDC enabling circuit of multiple protection

Technical Field

The utility model relates to a DCDC enable circuit of multiple protection.

Background

The existing general DCDC uses a P tube as a high-end switch, the high-voltage signal tube has few signals and high price, the impact of an input capacitor is limited by a general input end and a current-limiting resistor, the rapid charge and discharge of the capacitor is influenced, the DCDC does not have a deep under-voltage protection function, the borne stress is small, and the DCDC is easy to damage.

SUMMERY OF THE UTILITY MODEL

The utility model aims at overcoming the not enough among the prior art, provide the DCDC enable circuit of a plurality of protections.

In order to achieve the purpose, the utility model is realized by the following technical scheme:

the DCDC enabling circuit comprises an under-voltage closing circuit, an over-voltage clamping circuit, a DCDC opening circuit, a short-circuit protection trigger circuit, a DCDC module, a charging switch circuit, a single chip Microcomputer (MCU), an input Vin and a 3.3V power supply, wherein the under-voltage closing circuit, the over-voltage clamping circuit, the DCDC opening circuit, the short-circuit protection trigger circuit and the DCDC module are all connected with the charging switch circuit, the under-voltage closing circuit, the short-circuit protection trigger circuit and the over-voltage clamping circuit are all connected with the DCDC opening circuit, the short-circuit protection trigger circuit is connected with the DCDC module, the DCDC opening circuit and the DCDC module are all connected with the MCU, the charging switch circuit is connected with the input Vin, and the under-voltage closing circuit and the DCDC opening circuit are all connected with the 3.3V power supply.

Preferably, the undervoltage shutdown circuit includes a resistor R1, a resistor R2, a resistor R3, a resistor R4, a transistor Q1, and a MOS transistor Q2, one end of the resistor R1 is connected to the charging switch circuit, the other end of the resistor R1 is connected to one end of a resistor R3 through a resistor R2, the other end of the resistor R3 is connected to the ground signal GND, one end of the resistor R3 is connected to the base of the transistor Q1, the emitter of the transistor Q1 is connected to the ground signal GND, the collector of the transistor Q1 is connected to the 3.3V power supply through a resistor R4, the G-pole of the MOS transistor Q2 is connected to the collector of the transistor Q1, the S-pole of the transistor Q2 is connected to the ground signal GND, and the G-pole of the MOS transistor Q2 is connected to the DCDC startup circuit.

Preferably, the MOS transistor Q2 is an N-channel MOS transistor, and the transistor Q1 is an NPN transistor.

Preferably, the overvoltage clamping circuit comprises a resistor R8, a zener diode ZD1 and a zener diode ZD2, one end of the resistor R8 is connected with the charging switch circuit, the other end of the resistor R8 is connected with the DCDC open circuit, the other end of the resistor R8 is connected with the cathode of the zener diode ZD2 through a zener diode ZD1, and the anode of the zener diode ZD2 is connected with the ground signal GND.

Preferably, the DCDC switching-on circuit includes an optocoupler G1, a resistor R5, a resistor R6, a resistor R7 and a triode Q3, a 2 pin of the optocoupler G1 is connected to a ground signal GND, a 1 pin of the optocoupler G1 is connected to an undervoltage switching-off circuit, a 4 pin of the optocoupler G1 is connected to an overvoltage clamping circuit, a 3 pin of the optocoupler G1 is connected to a charging switching circuit, a 1 pin of the optocoupler G1 is connected to one end of the resistor R7 through a resistor R6, one end of the resistor R7 is connected to a short-circuit protection trigger circuit, the other end of the resistor R7 is connected to a collector of the triode Q3, an emitter of the triode Q3 is connected to a 3.3V power supply, a base of the triode Q3 is connected to the MCU through a resistor R5, and one end of the resistor R7 is connected to the MCU.

Preferably, the transistor Q3 is a PNP transistor.

Preferably, the short-circuit protection trigger circuit comprises a transistor Q4, a diode D2 and a resistor R12, wherein the collector of the transistor Q4 is connected with the DCDC module and the charging switch circuit, the emitter of the transistor Q4 is connected with the DCDC turn-on circuit, the base of the transistor Q4 is connected with one end of the resistor R12 through a diode D2, and the other end of the resistor R12 is connected with the collector of the transistor Q4.

Preferably, the transistor Q4 is a PNP transistor.

Preferably, the DCDC module includes a DCDC chip U1, a capacitor C2, a capacitor C3, a diode D4, and an inductor L1, an input terminal IN of the DCDC chip U1 is connected to one end of the capacitor C3 through a capacitor C2, the other end of the capacitor C3 is connected to the ground signal GND, an output terminal OUT of the DCDC chip U1 is connected to the ground signal GND through a diode D4, and an output terminal OUT of the DCDC chip U1 is connected to the MCU through an inductor L1.

Preferably, the charge switch circuit includes a diode D1, a diode D3, a diode D5, a resistor R9, a resistor R10, a resistor R11, a resistor R14, a zener diode ZD 14, a transistor Q14, a MOS transistor Q14, a large capacitor C14, and a large capacitor C14, wherein a positive electrode of the diode D14 is connected to the input Vin, a negative electrode of the diode D14 is connected to the undervoltage shutdown circuit, a negative electrode of the diode D14 is connected to a collector of the transistor Q14 through the diode D14, a collector of the transistor Q14 is connected to the overvoltage clamp circuit, a collector of the transistor Q14 is connected to a base of the transistor Q14 through the diode D14, an emitter of the transistor Q14 is connected to one end of the large capacitor C14 through the resistor R14, the other end of the large capacitor C14 is connected to the ground GND, an emitter of the transistor Q14 is connected to a D pole of the MOS transistor Q14, one end of the resistor R14 is connected to the resistor R14, the other end of the resistor R9 is connected with a DCDC open circuit, the S pole of the MOS transistor Q6 is connected with the D pole of the MOS transistor Q5, the S pole of the MOS transistor Q5 is connected with a short-circuit protection trigger circuit and a DCDC module, the G pole of the MOS transistor Q5 is connected with one end of a resistor R9 through a resistor R10, the G pole of the MOS transistor Q5 is connected with the S pole of the MOS transistor Q5 through a zener diode ZD3, the resistor R11 is connected with a zener diode ZD3 in parallel, the triode Q7 is an NPN triode, and the MOS transistor Q5 and the MOS transistor Q6 are both N-channel MOS transistors.

The utility model has the advantages as follows: the utility model has the functions of deep under-voltage closing and short-circuit protection, and the deep under-voltage has the advantage of low power consumption; the utility model has the function of overvoltage clamping; the utility model discloses possess input short-circuit protection function and MCU alarm function, the utility model discloses used high-end MOS pipe Q5, MOS pipe Q6 to carry out the realization of switch and quick charge-discharge, the internal resistance is little, and the overcurrent capacity is big, so the stress of bearing is big, is difficult to damage, damages when MOS pipe Q5, and MOS pipe Q6 also can the retention function. The drive adopts the optical coupling isolation to enable, has improved the security greatly.

Drawings

FIG. 1 is a block diagram of the present invention;

fig. 2 is a schematic circuit diagram of the present invention.

Detailed Description

The technical scheme of the utility model is further explained by combining the attached drawings of the specification:

as shown in fig. 1, a DCDC enabling circuit with multiple protections includes an under-voltage shutdown circuit 1, an over-voltage clamp circuit 2, a DCDC shutdown circuit 3, a short-circuit protection trigger circuit 4, a DCDC module 5, a charging switch circuit 6, a single-chip MCU8, an input Vin7, and a 3.3V power supply 9, where the under-voltage shutdown circuit 1, the over-voltage clamp circuit 2, the DCDC shutdown circuit 3, the short-circuit protection trigger circuit 4, and the DCDC module 5 are all connected to the charging switch circuit 6, the under-voltage shutdown circuit 1, the short-circuit protection trigger circuit 4, and the over-voltage clamp circuit 2 are all connected to the DCDC shutdown circuit 3, the short-circuit protection trigger circuit 4 is connected to the DCDC module 5, the DCDC shutdown circuit 3, and the DCDC module 5 are all connected to the single-chip MCU8, the charging switch circuit 6 is connected to the input Vin7, and the under-voltage shutdown circuit 1 and the DCDC shutdown circuit 3 are all connected to the 3.3V power supply 9.

The input Vin7 is the voltage provided by the battery cell, which is 56-84V under normal working condition and exceeds 93V under abnormal condition.

As shown in fig. 2, the undervoltage shutdown circuit 1 includes a resistor R1, a resistor R2, a resistor R3, a resistor R4, a transistor Q1, and a MOS transistor Q2, one end of the resistor R1 is connected to the charge switch circuit 6, the other end of the resistor R1 is connected to one end of the resistor R3 through the resistor R2, the other end of the resistor R3 is connected to the ground signal GND, one end of the resistor R3 is connected to the base of the transistor Q1, the emitter of the transistor Q1 is connected to the ground signal GND, the collector of the transistor Q1 is connected to the 3.3V power supply 9 through the resistor R4, the G-pole of the MOS transistor Q2 is connected to the collector of the transistor Q1, the S-pole of the MOS transistor Q2 is connected to the ground signal GND, and the G-pole of the MOS transistor Q2 is connected to the DCDC startup circuit 3.

As shown in fig. 2, the MOS transistor Q2 is an N-channel MOS transistor, and the transistor Q1 is an NPN transistor.

As shown in fig. 2, the overvoltage clamping circuit 2 includes a resistor R8, a zener diode ZD1, and a zener diode ZD2, one end of the resistor R8 is connected to the charging switch circuit 6, the other end of the resistor R8 is connected to the DCDC open circuit 3, the other end of the resistor R8 is connected to the cathode of the zener diode ZD2 through a zener diode ZD1, and the anode of the zener diode ZD2 is connected to the ground signal GND.

As shown in fig. 2, the DCDC open circuit 3 includes an optical coupler G1, a resistor R5, a resistor R6, a resistor R7, and a transistor Q3, wherein a 2 pin of the optical coupler G1 is connected to a ground signal GND, a 1 pin of the optical coupler G1 is connected to an undervoltage close circuit 1, a 4 pin of the optical coupler G1 is connected to an overvoltage clamping circuit 2, a 3 pin of the optical coupler G1 is connected to a charging switch circuit 6, a 1 pin of the optical coupler G1 is connected to one end of a resistor R7 through a resistor R6, one end of the resistor R7 is connected to a short-circuit protection trigger circuit 4, the other end of the resistor R7 is connected to a collector of a transistor Q3, an emitter of the transistor Q3 is connected to a 3.3V power supply 9, a base of the transistor Q3 is connected to a single-chip MCU8 through a resistor R5, and one end of the resistor R7 is connected to the single-chip MCU 8.

As shown in fig. 2, the transistor Q3 is a PNP transistor.

As shown in fig. 2, the short-circuit protection trigger circuit 4 includes a transistor Q4, a diode D2, and a resistor R12, wherein a collector of the transistor Q4 is connected to the DCDC module 5 and the charging switch circuit 6, an emitter of the transistor Q4 is connected to the DCDC open circuit 3, a base of the transistor Q4 is connected to one end of the resistor R12 through a diode D2, and the other end of the resistor R12 is connected to a collector of the transistor Q4. The triode Q4 is a PNP triode.

As shown IN fig. 2, the DCDC module 5 includes a DCDC chip U1, a capacitor C2, a capacitor C3, a diode D4, and an inductor L1, an input terminal IN of the DCDC chip U1 is connected to one end of the capacitor C3 through a capacitor C2, the other end of the capacitor C3 is connected to the ground signal GND, an output terminal OUT of the DCDC chip U1 is connected to the ground signal GND through a diode D4, and an output terminal OUT of the DCDC chip U1 is connected to the MCU8 through the inductor L1.

As shown in fig. 2, the charge switch circuit 6 includes a diode D1, a diode D3, a diode D5, a resistor R9, a zener diode ZD 9, a transistor Q9, a MOS transistor Q9, a large capacitor C9, and a large capacitor C9, wherein an anode of the diode D9 is connected to the input Vin 9, a cathode of the diode D9 is connected to the undervoltage shutdown circuit 1, a cathode of the diode D9 is connected to a collector of the transistor Q9 through the diode D9, a collector of the transistor Q9 is connected to the overvoltage clamp circuit 2, a collector of the transistor Q9 is connected to a base of the transistor Q9 through the diode D9, an emitter of the transistor Q9 is connected to one end of the large capacitor C9 through the resistor R9, the other end of the large capacitor C9 is connected to the ground GND, an emitter of the MOS transistor Q9 is connected to a D9 of the MOS transistor Q9, the other end of the resistor R9 is connected with the DCDC open circuit 3, the S pole of the MOS transistor Q6 is connected with the D pole of the MOS transistor Q5, the S pole of the MOS transistor Q5 is connected with the short-circuit protection trigger circuit 4 and the DCDC module 5, the G pole of the MOS transistor Q5 is connected with one end of the resistor R9 through a resistor R10, the G pole of the MOS transistor Q5 is connected with the S pole of the MOS transistor Q5 through a zener diode ZD3, the resistor R11 is connected with the zener diode ZD3 in parallel, the triode Q7 is an NPN triode, and the MOS transistor Q5 and the MOS transistor Q6 are both N-channel MOS transistors.

The working principle is as follows:

1: when the input voltage VCC is lower than a certain degree, the input voltage VCC is determined by the voltage division of a resistor R1, a resistor R2 and a resistor R3, the voltage of the resistor R3 is lower than 0.7, the triode Q1 is cut off, the grid of the MOS transistor Q2 is pulled high by R4 to be conducted, so that the G1A in the G1 of the optical coupler is closed without obtaining current, and at the moment, the DCDC module is closed, and the undervoltage closing function is realized. 2: when the input overvoltage VCC exceeds 93V, the voltage stabilizing tube ZD1 and the voltage stabilizing tube ZD2 are clamped, so that the control ends input to the MOS tube Q5 and the MOS tube Q6 are clamped, the linear voltage reduction function is realized, the Q5 and the Q6 are conducted, and the DCDC module works normally. 3: when input is short-circuited for some reason (such as welding short circuit, tin slag falling, power failure error short circuit and the like), the resistor R12 and the diode D2 are short-circuited to GND, the triode Q4 is conducted, at the moment, even if the MCU outputs high level through the resistor R5 and the triode Q3, a primary signal of the optocoupler G1 is short-circuited, so that no current is cut off at a primary stage of the optocoupler G1, and the DCDC module is closed, so that the short-circuit protection function is realized. 4: when the utility model discloses last electricity, resistance R14 current-limiting charges for electric capacity C1, electric capacity C4, generally the utility model discloses last electricity is never power off, because electric capacity C1, electric capacity C4 have been full of this moment, just calculate MOS pipe Q5, MOS pipe Q6 and switch on for the back level is electric altogether, also can not appear strikeing this moment DCDC module normal work. 5: when the protection does not occur, during normal work, the MCU only needs to output high level through a resistor R5 triode Q3, the triode Q3 is conducted, 3V can be sent to an optocoupler G1 primary, an MOS tube Q5 and an MOS tube Q6 are conducted, due to the bidirectional conduction principle of the MOS tube, the rear end can also pass through Q5 even if heavy load exists, the fast charging and discharging energy storage of Q6 can be realized, and the DCDC module normally works at the moment.

1: possess the under-voltage function of closing of degree of depth, the utility model discloses normally can oneself turn-off, but prerequisite control circuit is normal, adds the one-level hardware shut-off then and just more necessary. 2: the deep undervoltage needs to have low power consumption, the circuit meets the requirement that the resistors R1, R2 and R3 are designed by adopting total resistors which are connected in series by about 10M, so when 20 strings and 84V are fully charged, the leakage is 8.4uA, almost no influence is caused on a battery cell, and the resistor R4 can also use M-level resistors because MOS is voltage-driven and does not need large maintaining current, and the power supply of the resistor R4 is 3.3V, so that the voltage is low, the large consumed current of the resistor is smaller, and the continuous maintaining and turning-off after the undervoltage are met. 3: the DCDC module has an overvoltage clamping function, and the DCDC module generally has a small current on the high-voltage side due to energy transfer, and can meet most requirements in a 20mA range, when an external short circuit occurs, the voltage of the input Vin is raised by inductive energy, although the Vin is 56-84V under the normal working condition of the system, the Vin may rise to 110-120V, and at this time, ZD1 and ZD2 voltage regulators are turned on, and clamped to 75+ 18V-93V, and R8 current-limiting voltage regulator values, when G1B of the optocoupler G1 is turned on, the control stages of Q5 and Q6 are kept at 93V, and at this time, the input stages of Q5 and Q6 are larger than the control stage, and cannot be completely turned on and are both in a linear conduction region, and the instantaneous power consumption on the DCDC module can also bear the instantaneous power when SOT23-3 is used for Q5 and Q6. 4: the device has the input short-circuit protection function and MCU alarm, and because the requirement on safety is high, the situation of continuous heating cannot be caused even if devices are damaged due to various reasons, the timely closing of a problematic circuit is important, when the input short circuit of the DCDC module causes large current, so that the front stage is damaged, the failure model can be only in misoperation and can be recovered, and if the device is not protected, the device replacement action is inevitably generated. If fall the tin dross, the paster short circuit, the clearance can be recovered and can not produce and change device time and hardware cost, can intervene 5 by software and hardware simultaneously after short-circuit protection: most of DCDC module's input capacitance all can directly be connected at the chip input, can in time replenish the electric quantity in the rear end heavy load condition, but the switch all can produce conduction loss to the switch at every turn, if the surplus still probably causes the damage inadequately, lead to unable shutoff DCDC module return circuit and continue to discharge, thereby can only trigger the degree of depth under-voltage function, the experiment shows that big electric capacity C1, C4 can be put before switch Q5, as long as rationally walk the line, make to reach the chip distance after the switch good, the performance can not discount, so this design adjusts this mode according to experience and requires layout line at 2mm width and reduce length, thereby only the first time of production is gone up electric R14, Q7 bears the impact once, when normal work back electric capacity charge-discharge directly through Q5, Q6 does not influence the energy storage effect. 6: the high-end N tube with double Q5 and Q6 is used for realizing switching and rapid charging and discharging, the internal resistance is small, the overcurrent capacity is large, the stress is large, the damage is not easy to occur, and when the Q5 is damaged, the Q6 can also keep the function. And 7, the drive is enabled by optical coupling isolation, so that the use is safer.

The utility model has the functions of deep under-voltage closing and short-circuit protection, and the deep under-voltage has the advantage of low power consumption; the utility model has the function of overvoltage clamping; the utility model discloses possess input short-circuit protection function and MCU alarm function, the utility model discloses used high-end MOS pipe Q5, MOS pipe Q6 to carry out the realization of switch and quick charge-discharge, the internal resistance is little, and the overcurrent capacity is big, so the stress of bearing is big, is difficult to damage, damages when MOS pipe Q5, and MOS pipe Q6 also can the retention function. The drive adopts the optical coupling isolation to enable, has improved the security greatly.

It should be noted that the above list is only one specific embodiment of the present invention. Obviously, the present invention is not limited to the above embodiments, and many modifications can be made, and in short, all modifications that can be directly derived or suggested by the person skilled in the art from the disclosure of the present invention should be considered as the protection scope of the present invention.

Claims

1. The DCDC enabling circuit with multiple protections is characterized by comprising an undervoltage closing circuit (1), an overvoltage clamping circuit (2), a DCDC opening circuit (3), a short-circuit protection trigger circuit (4), a DCDC module (5), a charging switch circuit (6), a single-chip microcomputer MCU (8), an input Vin (7) and a 3.3V power supply (9), wherein the undervoltage closing circuit (1), the overvoltage clamping circuit (2), the DCDC opening circuit (3), the short-circuit protection trigger circuit (4) and the DCDC module (5) are all connected with the charging switch circuit (6), the undervoltage closing circuit (1), the short-circuit protection trigger circuit (4) and the overvoltage clamping circuit (2) are all connected with the DCDC opening circuit (3), the short-circuit protection trigger circuit (4) is connected with the DCDC module (5), and the DCDC opening circuit (3) and the DCDC module (5) are all connected with the MCU (8), the charging switch circuit (6) is connected with an input Vin (7), and the under-voltage closing circuit (1) and the DCDC opening circuit (3) are both connected with a 3.3V power supply (9).

2. The DCDC enabling circuit for multiple protections according to claim 1, wherein the under-voltage shutdown circuit (1) comprises a resistor R1, a resistor R2, a resistor R3, a resistor R4, a transistor Q1 and a MOS transistor Q2, wherein one end of the resistor R1 is connected to the charging switch circuit (6), the other end of the resistor R1 is connected to one end of a resistor R3 through a resistor R2, the other end of the resistor R3 is connected to the ground signal GND, one end of the resistor R3 is connected to the base of the transistor Q1, the emitter of the transistor Q1 is connected to the ground signal GND, the collector of the transistor Q1 is connected to the 3.3V power supply (9) through a resistor R4, the G pole of the MOS transistor Q2 is connected to the collector of the transistor Q1, the S pole of the MOS transistor Q2 is connected to the ground signal, and the G pole of the MOS transistor Q2 is connected to the DCDC startup circuit (3).

3. The DCDC enable circuit for multiple protections of claim 2, wherein said MOS transistor Q2 is an N-channel MOS transistor and said transistor Q1 is an NPN transistor.

4. The DCDC enabling circuit for multiple protections according to claim 1, wherein said overvoltage clamping circuit (2) comprises a resistor R8, a Zener diode ZD1 and a Zener diode ZD2, one end of said resistor R8 is connected with a charging switch circuit (6), the other end of said resistor R8 is connected with a DCDC open circuit (3), the other end of said resistor R8 is connected with the cathode of Zener diode ZD2 through Zener diode ZD1, and the anode of said Zener diode ZD2 is connected with a ground signal GND.

5. The multi-protected DCDC enable circuit of claim 1, the DCDC opening circuit (3) comprises an optocoupler G1, a resistor R5, a resistor R6, a resistor R7 and a triode Q3, a pin 2 of the optical coupler G1 is connected with a ground signal GND, a pin 1 of the optical coupler G1 is connected with an undervoltage shutdown circuit (1), 4 pins of the optical coupler G1 are connected with an overvoltage clamping circuit (2), 3 pins of the optical coupler G1 are connected with a charging switch circuit (6), a 1 pin of the optical coupler G1 is connected with one end of a resistor R7 through a resistor R6, one end of the resistor R7 is connected with a short-circuit protection trigger circuit (4), the other end of the resistor R7 is connected with the collector of a triode Q3, the emitter of the triode Q3 is connected with a 3.3V power supply (9), the base electrode of the triode Q3 is connected with the single chip microcomputer MCU (8) through a resistor R5, and one end of the resistor R7 is connected with the single chip microcomputer MCU (8).

6. The multi-protection DCDC enable circuit of claim 5, wherein the transistor Q3 is a PNP transistor.

7. The DCDC enabling circuit for multiple protections according to claim 1, wherein said short-circuit protection trigger circuit (4) comprises a transistor Q4, a diode D2 and a resistor R12, wherein the collector of said transistor Q4 is connected to the DCDC module (5) and the charging switch circuit (6), the emitter of said transistor Q4 is connected to the DCDC turn-on circuit (3), the base of said transistor Q4 is connected to one end of the resistor R12 through a diode D2, and the other end of said resistor R12 is connected to the collector of a transistor Q4.

8. The multi-protection DCDC enable circuit of claim 7, wherein the transistor Q4 is a PNP transistor.

9. The DCDC enabling circuit for multiple protections according to claim 1, wherein said DCDC module (5) comprises a DCDC chip U1, a capacitor C2, a capacitor C3, a diode D4 and an inductor L1, an input end IN of said DCDC chip U1 is connected to one end of a capacitor C3 through a capacitor C2, the other end of said capacitor C3 is connected to a ground signal GND, an output end OUT of said DCDC chip U1 is connected to the ground signal GND through a diode D4, and an output end OUT of said DCDC chip U1 is connected to the MCU (8) through an inductor L1.

10. The DCDC enabling circuit for multiple protections according to claim 1, wherein said charge switch circuit (6) comprises a diode D1, a diode D3, a diode D5, a resistor R9, a resistor R10, a resistor R11, a resistor R14, a zener diode ZD3, a transistor Q7, a MOS transistor Q5, a MOS transistor Q6, a large capacitor C1, and a large capacitor C4, wherein the anode of said diode D1 is connected to the input Vin (7), the cathode of said diode D1 is connected to the undervoltage shutdown circuit (1), the cathode of said diode D1 is connected to the collector of said transistor Q7 through a diode D3, the collector of said transistor Q7 is connected to the overvoltage clamp circuit (2), the collector of said transistor Q7 is connected to the base of said transistor Q7 through a diode D5, the emitter of said transistor Q7 is connected to one end of a large capacitor C1 through a resistor R14, and the other end of said large capacitor C1 is connected to the ground GND signal GND through a capacitor C4, an emitter of the triode Q7 is connected with a D pole of a MOS transistor Q6, a G pole of the MOS transistor Q6 is connected with one end of a resistor R9, the other end of the resistor R9 is connected with a DCDC open circuit (3), an S pole of the MOS transistor Q6 is connected with a D pole of a MOS transistor Q5, an S pole of the MOS transistor Q5 is connected with a short-circuit protection trigger circuit (4) and a DCDC module (5), a G pole of the MOS transistor Q5 is connected with one end of the resistor R9 through a resistor R10, a G pole of the MOS transistor Q5 is connected with an S pole of the MOS transistor Q5 through a zener diode ZD3, the resistor R11 is connected in parallel with the zener diode 3, the triode Q7 is an NPN triode, and the MOS transistors Q5 and Q6 are N-channel ZD transistors.